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检索条件"任意字段=13th IEEE International Symposium on Parallel and Distributed Processing with Applications"

共 2574 条记录，以下是31-40 订阅

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Applicability of the Imprecise Computation Approach for the QoS Enhancement in distributed RTDBMS 13

Applicability of the Imprecise Computation Approach for the ...

引用

13th ieee international symposium on parallel and distributed Computing (ISPDC)

作者： Ben Salem, Malek Bouazizi, Emna Hamdi, Issam Bouaziz, Rafik Sfax Univ Higher Inst Comp Sci & Multimedia MIRACL Lab Sfax Tunisia

ISBN: (纸本)9781479959198

Large amounts of real-time data is used by geographically distributed real-time applications. Using DRTDBMS1 is more and more needed to better manage the large amount of real-time data. In order to take account of unpredictable workload, Quality of Service (QoS) based approaches are the most appropriate. In the case of distributed real-time applications, it is necessary to take into account the problems of load balancing for user transactions between different nodes. Feedback Scheduling based approaches can manage the unpredictable workload variations. Further, the imprecise computation technique has been defined as a technique to enhance the Quality of Service QoS) in centralized RTDBMS. In this paper, we propose to apply the imprecise computation approach in a distributed feedback control scheduling architecture to improve the QoS in DRTDBMS. then, we focus on two ways of optimization in DRTDBMS, 1) the space optimization in which we propose to apply three replication data policies, and 2) the QoS optimization in which we propose an improvement of the imprecise computation to ensure a better quality of the service.

关键词： Computational modeling Computer architecture Data models distributed databases Processor scheduling Quality of service Real-time systems Quality of service distributed databases scheduling of multiprocessor data models Computer Architecture real-time systems Computational modeling real-time application program real-time data arithmetic

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FemtoCore enabled quasi-distributed Control for Modular Multilevel Converters 13

FemtoCore enabled quasi-distributed Control for Modular Mult...

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13th international symposium on Power Electronics for distributed Generation Systems (PEDG)

作者： Savi, Filippo Barater, Davide Franceschini, Giovanni Buticchi, Giampaolo Univ Modena & Reggio Emilia Dept Engn Enzo Ferrari Modena Italy Univ Nottingham Ningbo China Zhejiang Key Lab More Elect Aircraft Technol Ningbo Peoples R China

ISBN: (数字)9781665466189

ISBN: (纸本)9781665466189

the development of the processing capability has enabled the implementation of advanced control systems for power electronics converters. In this framework, the modular multilevel converter has attracted the attention of industry and academia, thanks to the good performance in terms of power quality, wide voltage capability, and fault tolerance, which are key requirement for high power applications. this paper proposes a quasi distribute control architecture based on a FemtoCore platform, an optimized soft-core designed for modular power electronics applications. Latency estimates and simulation results shows the potential of this solution for the control of modular multilevel converters.

关键词： modular multilevel converter soft-core field-programmable-gate-array distributed control

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Influence of optimization techniques on software performance for subsequent generations of CUDA architecture 19

Influence of optimization techniques on software performance...

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19th ieee international symposium on parallel and distributed processing with applications (ieee ISPA)

作者： Gambrych, Jacek Warsaw Univ Technol Inst Elect Syst Warsaw Poland

ISBN: (纸本)9781665435741

From the very beginning of the CUDA technology, it was essential to apply state-of-the-art optimization techniques. Only then was it possible to fully utilize the enormous computational power of graphic processing units. However, with the development of the CUDA architecture, the impact of typical optimization techniques on software performance has changed significantly. this article shows how the impact of several optimization techniques on the performance of the image filtering algorithm has changed for the subsequent generations of CUDA architecture. then, based on the results obtained, it attempts to answer whether tedious and time-consuming optimization of the CUDA software is still necessary.

关键词： parallel processing GPGPU CUDA optimization techniques

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Heterogeneous parallel and distributed Optimization of K-means Algorithm on Sunway Supercomputer 15

Heterogeneous Parallel and Distributed Optimization of K-mea...

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15th ieee international symposium on parallel and distributed processing with applications (ISPA) / 16th ieee international Conference on Ubiquitous Computing and Communications (IUCC)

作者： Chen, Jiawei Tan, Rong Zhang, Yiwen Washington Univ St Louis MO 63130 USA Cornell Univ Ithaca NY USA Carnegie Mellon Univ Pittsburgh PA 15213 USA

ISBN: (纸本)9781538637906

Clustering plays an essential role in large-volume data analysis areas such as bioinformatics, statistic, pattern recognition and so on. K-means is one of most effective clustering algorithms, which is relatively easy to implement. Most real world applications usually involve a huge amount of data. thus, how to improve applications' efficiency while maintaining accuracy becomes a significant and considerable issue. In this paper, a K-means clustering algorithm, which uses heterogeneous parallel computing technology on Computing processing elements and distributed computing technology, is proposed. this algorithm is applied in unique Sunway architecture based on "Sunway TaihuLight" Supercomputer-the world's fastest supercomputer with peak performance over 100PFLOPS. the testing results suggest that this improved algorithm is stable, fast and efficient. Conclusively, it has a great improvement in computation performance, especially with large volumes of data.

关键词： Clustering algorithms Computer architecture Computational modeling Program processors Supercomputers Big Data Data models

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TDAG: A Tunable distributed Data processing Model for Data Stream 15

TDAG: A Tunable Distributed Data Processing Model for Data S...

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15th ieee international symposium on parallel and distributed processing with applications (ISPA) / 16th ieee international Conference on Ubiquitous Computing and Communications (IUCC)

作者： Tang, Jintao Lin, Xuelian Shen, Yang Wo, Tianyu Beihang Univ Sch Comp Sci & Engn Inst Adv Comp Technol Beijing Peoples R China

ISBN: (纸本)9781538637906

As the Internet of Vehicles (IoV) becomes flourishing and the data generated by sensors be ubiquitous, there exist various kinds of IoV applications with different performance requirements. Hence, different distributed data processing systems (DDPS) clusters will coexist, e.g., a stream processing system cluster for real-time tasks and a batch one for statistics based data mining tasks, to meet the requirements of such IoV applications. However, it is not an economical or convenient way to maintain varied systems clusters, as the developers and/or administrators have to be familiar with all of these DDPSs, and of course, the deployment of multiple DDPS means a waste of resources compared to the deployment of one DDPS. Based on these observations, this paper proposes the TDAG as a solution. TDAG allows users to adjust the data processing from the streaming style to the batch style by encapsulating the input data with specific packing strategies. We have implemented TDAG in a prototype called TStream. the experimental tests show that our TStream is both effective and efficient.

关键词： Data Stream Data processing Model Tunable

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Design and Analysis of A Class of Simple Networks

Design and Analysis of A Class of Simple Networks

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13th international Conference on parallel and distributed Computing, applications, and Technologies (PDCAT)

作者： Li, Tao Du, Huimin Zhang, Liguo Han, Jungang Xian Univ Posts & Telecom Sch Elect Engn Xian Peoples R China Xian Univ Posts & Telecom Sch Comp Sci Xian Peoples R China

ISBN: (纸本)9780769548791

A class of simple network topologies is proposed and analyzed in this paper as part of the research on a polymorphous array architecture for graphics and image processing. the topologies are extended from the mesh network topology and are amenable to VLSI implementation. Simulation and theoretical analyses show that these topologies have many advantages over the mesh and Xmesh topologies. Routing algorithms are also proposed and analyzed for these new network topologies.

关键词： Interconnection network topology mesh topology message passing parallel architecture number of edges diameter biesection width

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Graph transformations and derivation of scheduling constraints applied to the mapping of real-time distributed applications 13

Graph transformations and derivation of scheduling constrain...

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ieee 13th international symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSoC)

作者： Louise, Stephane CEA LIST PC172Bat 862 F-91191 Gif Sur Yvette France

ISBN: (纸本)9781728148823

Synchronous Data-Flow as a deterministic variation of Khan Process Networks is a good model for distributed applications that allows for verification of the properties of the applications both at the design level and at run-time. Real-Time extensions exist which allow to specify Real-Time clocks for some of the processes in the graph. With the addition of Real-Time clocks, the behavior of the complete system can be easily differentiated from a nominal Real-Time mode where all the required data for processing is available when a clock tick occurs, and an error mode can be triggered when the condition is not met. Our contribution in this paper is -first- to show a set of graph transformations that allow to account for the execution and communication time on a real platform while at the same time maximizing the parallelism of execution and -second-on top of these transformations to provide the execution constraints as a linear program that must be met at run-time to guarantee the real-time requirements. It is illustrated on a subset of a real-life automotive example.

关键词： distributed and Heterogeneous systems Synchronous Data-Flow Graph Transformations

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A parallel Task-based Approach to Linear Algebra 13

A Parallel Task-based Approach to Linear Algebra

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13th ieee international symposium on parallel and distributed Computing (ISPDC)

作者： Tousimojarad, Ashkan Vanderbauwhede, Wim Univ Glasgow Sch Comp Sci Glasgow G12 8QQ Lanark Scotland

ISBN: (纸本)9781479959198

Processors with large numbers of cores are becoming commonplace. In order to take advantage of the available resources in these systems, the programming paradigm has to move towards increased parallelism. However, increasing the level of concurrency in the program does not necessarily lead to better performance. parallel programming models have to provide flexible ways of defining parallel tasks and at the same time, efficiently managing the created tasks. OpenMP is a widely accepted programming model for shared-memory architectures. In this paper we highlight some of the drawbacks in the OpenMP tasking approach, and propose an alternative model based on the Glasgow parallel Reduction Machine (GPRM) programming framework. As the main focus of this study, we deploy our model to solve a fundamental linear algebra problem, LU factorisation of sparse matrices. We have used the SparseLU benchmark from the BOTS benchmark suite, and compared the results obtained from our model to those of the OpenMP tasking approach. the TILEPro64 system has been used to run the experiments. the results are very promising, not only because of the performance improvement for this particular problem, but also because they verify the task management efficiency, stability, and flexibility of our model, which can be applied to solve problems in future many-core systems.

关键词： Benchmark testing Concurrent computing Instruction sets Object oriented modeling parallel processing Programming Sparse matrices Sparse matrix instruction sets Object oriented modeling Benchmark testing Programming parallel processing (COMPUTERS) parallel programming Linear algebra Large Numbers performance boost

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RITA: Efficient Memory Allocation Scheme for Containerized parallel Systems to Improve Data processing Latency 13

RITA: Efficient Memory Allocation Scheme for Containerized P...

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ieee 13th international Conference on Cloud Computing (CLOUD)

作者： Jia, Danlin Bayati, Mahsa Lee, Ron Mi, Ningfang Northeastern Univ Boston MA 02115 USA Samsung Semicond San Jose CA USA

ISBN: (纸本)9781728187808

the emerging resource-sharing container-based virtualization is prevalent in IT, as it is a much lighter deployment in the cloud environment compared to VM-based virtualization. distributed data-processing workloads executing in parallel take advantages of resource sharing, fast delivery, and excellent portability of containerization, but also suffer from resource competition and performance interference. Especially for memory virtualization, data-processing frameworks allocate physical memory (i.e., RAM) and swap to applications specified by users, without considering cache-characteristics and parallelism of applications, which induces performance degradation and significantly protracted latency which is worse given over-provisioning. We design an efficient memory allocation scheme (RITA) for containerized parallel systems to improve data processing latency. RITA monitors memory usage and cache characteristics of applications, and dynamically re-allocates memory resources. We implement RITA in a real-world system, which can easily migrate to other container-based virtualization environments. Our experimental results show that RITA provides remarkable latency improvement for memory intensive distributed data-processing workloads.

关键词： Containerization distributed Data-processing Latency Memory Allocation

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From MultiTask to MultiCore: Design and Implementation Using an RTOS 13

From MultiTask to MultiCore: Design and Implementation Using...

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13th ieee international symposium on parallel and distributed Computing (ISPDC)

作者： Moron, Celio Estevan Ideguchi, Antonio Fernandes, Marcio Merino Malony, Allen D. Univ Fed Sao Carlos Dept Comp BR-13560 Sao Carlos SP Brazil Univ Oregon Dept Comp & Informat Sci Eugene OR 97403 USA

ISBN: (纸本)9781479959198

Practice has shown that programming a new multicore system is a greater challenge than previously thought. the challenge is to produce the resulting system in a way, which is as easy as sequential programming. this new trend has changed the way we think about the whole development process. the aim of this work is to show that it is possible to develop a multicore embedded system application using existing tools, while at the same time, obtaining reuse. this process is carried out in a cyclic and increasing manner, generating a more refined version of the application at each iteration. the development process consists of five phases: Multitask Modelling, Code Generation, Test/Debugging, Mapping Tasks to Cores and Tuning the Application. the three initial ones are carried out using the VisualRTXC tool, whereas the last two use the performance tool TAU. Using a small application, a Case Study shows how the proposed development process works and the steps involved in the implementation of an embedded system.

关键词： Debugging Embedded systems Multicore processing Programming Real-time systems Visualization Embedded systems Debugging real-time systems Programming Visualization PROCESS DEVELOPMENT Multi-core processors parallel processing (COMPUTERS) real time operating system Road

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