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检索条件"任意字段=13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"

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A Low-Cost Cold Plasma Generator circuits designed for Laboratory Applications 13

A Low-Cost Cold Plasma Generator Circuits Designed for Labor...

引用

13th Latin America symposium on circuits and System (LASCAS)

作者： Diaz, Sergio Guzman, Johan Tenreiro, Claudio Ramirez, Roberto Hernandez, Oscar Univ Talca Electromech Dept Talca Chile Univ Bio Bio Elect & Elect Dept Concepcion Chile

ISBN: (纸本)9781665420082

the generation of cold plasma is applied to different processes as grinding of rocks, hardening of metals and sterilization of food. To obtain cold plasma in a vacuum chamber, it is necessary to partially ionize the gas between the electrodes, generating high voltage pulses of the order of microseconds. the repetition frequencies of these pulses depend on the specific application. the design of the power sources can include a synthetic pulse formation line (PFN) triggered or using vacuum valves or static converter arrays. In laboratory applications where applications for cold plasma are studied, it is convenient for safety to design automatized systems for plasma characterization. this work presents the design of a pulsating source and its attached measurements systems, presenting the procedures and auxiliary circuits for real time plasma characterization on a digital based system.

关键词： Cold plasma Langmuir probes sensors

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Functional Verification of Arithmetic circuits: Survey of Formal Methods 25

Functional Verification of Arithmetic Circuits: Survey of Fo...

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Ciesielski, Maciej Yasin, Atif Dasari, Jiteshri Univ Massachusetts Amherst MA 01003 USA

ISBN: (纸本)9781665494311

this paper gives a brief survey of current stateof-the-art techniques for formal verification of arithmetic circuits with suggestions for future work. In contrast to standard BDD or SAT-based approach that require a reference circuit it concentrates on Symbolic Computer Algebra (SCA) and related techniques that verify the circuits w.r.t. its abstract arithmetic specification. We examine the original computer algebra method;review the algebraic techniques of forward and backward rewriting;and AIG rewriting. We also propose a "hardware rewriting" method, which replaces algebraic rewriting by hardware synthesis of the circuit under verification appended with an inverse of the circuit, expecting it to be reduced to a redundant one.

关键词： Algebra Hardware Standards electronic circuits Arithmetic Formal verification

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Correlation Power Analysis of SipHash 25

Correlation Power Analysis of SipHash

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Oleksak, Matus Miskovsky, Vojtech Czech Tech Univ Dept Digital Design Fac Informat Technol Prague Czech Republic

ISBN: (纸本)9781665494311

SipHash is ARX-based pseudorandom function optimized for short inputs. It was developed as a hash table lookup function, but it is also used for MAC generation. At the time of writing, there was no side-channel attack on SipHash known to us. this work is about application of CPA attack on SipHash. Attack was performed on ChipWhisperer CW308 UFO Board with STM32F0 target. Approximately 800 power traces were needed for succesful attack. Leakage information from XOR was used to attack cipher key. the main contribution of this work is power model of binary addition including carry propagation.

关键词： CPA SipHash ARX side-channel Chipwhisperer

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Virtual Prototype driven design, Implementation and Evaluation of RISC-V Instruction Set Extensions 25

Virtual Prototype driven Design, Implementation and Evaluati...

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Funck, Milan Herdt, Vladimir Drechsler, Rolf DFKI GmbH Cyber Phys Syst D-28359 Bremen Germany Univ Bremen Inst Comp Sci D-28359 Bremen Germany

ISBN: (纸本)9781665494311

RISC-V is a modern open source Instruction Set Architecture (ISA) and designed in a very extendable manner, which allows for highly application specific solutions. However, the identification of suitable instruction set extensions usually requires a significant manual effort and therefore is a very challenging process. In this paper we propose a lightweight alternative methodology to find suitable application-specific RISC-V extensions, using a Virtual Prototype (VP). this is done, purely by observing the used instructions during the execution of the targeted application on the VP. therefore, no further information about the application itself are needed. In this context the advantages and the flexibility of a VP and the straightforward extendability of the RISC-V ISA are demonstrated.

关键词： Instruction sets Prototypes Manuals electronic circuits

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design of Asynchronous Pipelines with QDI Template Using Commercial FPGA 13

Design of Asynchronous Pipelines with QDI Template Using Com...

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13th Latin America symposium on circuits and System (LASCAS)

作者： Duarte, Gabriel C. Oliveira, Duarte L. Batista, Gracieth C. Inst Tecnol Aeronaut ITA Div Engn Eletron IEEA Sao Jose Dos Campos Brazil

ISBN: (纸本)9781665420082

the asynchronous paradigm has interesting features due to the lack of the clock signal and is another option for project of digital systems. this paradigm has several design styles, where the asynchronous pipeline style is interesting due to its high performance and the simplicity of its control. there are two classes of an asynchronous pipeline: Bundled-data and Quasi Delay Insensitive (QDI). the QDI circuit class is notable for its robustness and high modularity. In this paper, we propose two new asynchronous architectures in the pipeline style for QDI circuits. Unlike many QDI proposals, these architectures focus on platforms FPGA (Field Programmable Gate Array) and VLSI (Very Large-Scale Integration) standard cell. the two new architectures were prototyped in FPGAs devices, applied in a set of benchmarks, and compared with the literature's QDI pipeline architecture, which is also focused on FPGA. From the results obtained by the three architectures, we highlight the increase in throughput of 51.2% of the proposed architecture compared to the literature's architecture.

关键词： QDI asynchronous logic dual-rail code pipeline

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Autocalibration Approach for Improving Robustness of Analog ICs 25

Autocalibration Approach for Improving Robustness of Analog ...

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Maljar, David Arbet, Daniel Kovac, Martin Ondica, Robert Stopjakova, Viera Slovak Univ Technol Bratislava Inst Elect & Photon Bratislava Slovakia

ISBN: (纸本)9781665494311

this work presents a dedicated method of analog integrated circuit (IC) autocalibration, which was used to calibrate a voltage reference with the output voltage value of 96 mV. the reference accuracy might be significantly influenced by fluctuations in the manufacturing process. the essence of this technique is to suppress this undesired influence of process variations in terms of the corner conditions of 130 nm CMOS technology. All analog parts of the proposed autocalibration system are presented at the transistor level. the output of the calibration subcircuit is a digital signal controlling the autocalibration.

关键词： digital autocalibration process variations voltage reference analog design ultra-low voltage design CMOS

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Technical and pedagogical challenges in micronanoelectronics for facing upcoming digital society 13

Technical and pedagogical challenges in micronanoelectronics...

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13th Latin America symposium on circuits and System (LASCAS)

作者： Bonnaud, Olivier Univ Rennes 1 Rennes Inst Elect & Technol NumeR Rennes France GIP CNFM Grenoble France

ISBN: (纸本)9781665420082

the worldwide evolution towards a digital society is strongly underway, thanks in particular to the incredible increase in the performance of electronics and micronanoelectronics in all their compartments, from elementary components to circuits and systems. this accelerating evolution, especially in terms of data flow corresponding to the multiplication of connected objects, raises new challenges of two kinds: technical/technological and human. On the technical side, we need to reduce the size of systems and their energy consumption by controlling elementary devices and circuit architectures. On the human level, we need to adapt skills to the new technical and technological challenges and above all to increase the pool of talent due to the extremely rapid development of applications, despite the growing assistance provided by all the design and manufacturing assistance tools. After having developed the global context, this paper focuses on the different limitations and associated challenges and on the approach brought by the French microelectronics training network for the learning of the know-how in connection with the recovery plans dedicated to the electronics industry.

关键词： electronics circuits and systems micronanoelectronics challenges of connected society electronics engineering education

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A Highly Compact 1W Ku-Band Power Amplifier 13

A Highly Compact 1W Ku-Band Power Amplifier

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13th Latin America symposium on circuits and System (LASCAS)

作者： Coquillas, B. Kerherve, E. Amiaud, Ac Roussel, L. Redois, S. Louis, B. Merlet, T. Petit, V Univ Bordeaux IMS Lab Bordeaux France THALES LAS Elancourt France THALES DMS Elancourt France

ISBN: (纸本)9781665420082

this paper presents a highly compact double-balanced two-stage Ku-Band SiGe power amplifier. Four power cells are combined in a balanced architecture which occupies less than 2mm(2). As a proof of concept, the power amplifier was designed with a 0.13-mu m SiGe BiCMOS technology. the simulated performances at 18GHz exhibit a saturated power higher than 30dBm up to 90 degrees C, a linear gain of 21.2dB and a peak power added efficiency of 26.5%.

关键词： defense industry design methodology directional coupler power amplifier temperature simulation

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Analyzing Multilevel Stochastic circuits using Correlation Matrices 25

Analyzing Multilevel Stochastic Circuits using Correlation M...

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Hoffend, Owen Hayes, John P. Univ Michigan Dept Elect Engn & Comp Sci Ann Arbor MI 48109 USA

ISBN: (纸本)9781665494311

Stochastic computing (SC) is a digital design paradigm that foregoes the conventional binary encoding in favor of pseudo-random bitstreams. Stochastic circuits operate on the probability values of bitstreams, and often achieve low power, low area, and fault-tolerant computation. Most SC designs rely on the input bitstreams being independent or uncorrelated to obtain the best results. However, circuits have also been proposed that exploit deliberately correlated bitstreams to improve area or accuracy. In such cases, different sub-circuits may have different correlation requirements. A major barrier to multi-layer or hierarchical stochastic circuit design has been understanding how correlation propagates while meeting the correlation requirements for all its sub-circuits. In this paper, we introduce correlation matrices and extensions to probability transfer matrix (PTM) algebra to analyze complex correlation behavior, thereby alleviating the need for computationally intensive bit-wise simulation. We apply our new correlation analysis to two multi-layer SC image processing and neural network circuits and show that it helps designers to systematically reduce correlation error.

关键词： Stochastic computing signal correlation correlation matrix error analysis stochastic circuit design

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A design Space Exploration Framework for Memristor-Based Crossbar Architecture 25

A Design Space Exploration Framework for Memristor-Based Cro...

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25th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Barbareschi, Mario Bosio, Alberto O'Connor, Ian Fiser, Petr Traiola, Marcello Univ Naples Federico II Dept Elect Engn & Informat Technol Naples Italy Univ Lyon UMR5270 INL ECLINSA LyonCNRSUCBLCPE Lyon F-69130 Ecully France Czech Tech Univ Prague Czech Republic Univ Rennes INRIA CNRS IRISAUMR6074 Rennes France

ISBN: (纸本)9781665494311

In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. the main goal of this paper is to perform a design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. the results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. the presented results can also be considered as a reference (benchmarking) for comparing future work.

关键词： Emerging Technologies Memristor crossbar design Space Exploration Boolean Functions Logic Synthesis

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