the H. 264/AVC standard supports intra prediction in order to reduce spatial redundancy in the video frame. the intra prediction process for one macro block requires reconstructing the left and top neighbor macro bloc...
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ISBN:
(纸本)9781467361361;9781467361354
the H. 264/AVC standard supports intra prediction in order to reduce spatial redundancy in the video frame. the intra prediction process for one macro block requires reconstructing the left and top neighbor macro blocks where the reconstruction path includes a number of processing units such as integer transform, quantization, inverse quantization and inverse integer transform. In order to meet the real time performance constraints of different video standards, a high throughput through this path is necessary. In this paper we propose architecture for real time implementation of the reconstruction path used in the H. 264/AVC where the hardware is designed to be used as part of a complete H. 264 video coding system. Each processing block executes in a single clock cycle for all calculations required for one 4x4 block. In order to minimize area cost while maintaining the performance, dynamic partial reconfiguration is employed in the quantization and inverse quantization modules such that an area - efficient solution is found without impairing the throughput.
this paper presents current-mode first-order allpass filter using three operational transconductance amplifiers (OTAs) and grounded capacitor. the use of grounded capacitor makes the circuit more suitable for integrat...
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ISBN:
(纸本)9781467355803;9781467355780
this paper presents current-mode first-order allpass filter using three operational transconductance amplifiers (OTAs) and grounded capacitor. the use of grounded capacitor makes the circuit more suitable for integrated circuit implementation. the current gain and phase shift can be independently controlled withelectronic method. the circuit has high output impedance which enables easy cascading in the current mode circuits. the PSpice simulation results are depicted. the given results agree well withthe theoretical anticipation.
Transmit and receive Ku-band phased array designs are described for testing an airborne sense and avoid radar. the arrays are small with a size of 24 cm x 9 cm and operate from 13 to 17 GHz withelectronic scanning fr...
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ISBN:
(纸本)9781467311274
Transmit and receive Ku-band phased array designs are described for testing an airborne sense and avoid radar. the arrays are small with a size of 24 cm x 9 cm and operate from 13 to 17 GHz withelectronic scanning from plus or minus 45 degrees in azimuth and plus or minus 30 degrees in elevation. A novel design architecture allows the use of multiple multilayered printed circuit boards and simple air cooling.
In this study, a single-input multiple-outputs current-mode analog biquadratic filter, based on current differencing transconducatance amplifier (CDTA) is presented. the proposed filter uses two CDTAs, one resistor an...
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ISBN:
(纸本)9781467355803;9781467355780
In this study, a single-input multiple-outputs current-mode analog biquadratic filter, based on current differencing transconducatance amplifier (CDTA) is presented. the proposed filter uses two CDTAs, one resistor and two grounded capacitors, which is well suited for integrated circuit implementation. the circuit simultaneously gives 3 standard transfer functions, namely, lowpass, highpass and bandpass filters with independent control of quality factor and pole frequency by electronic method. By summing of IHP and ILP, the notch filter can be also achieved. Moreover, the circuit possesses low input and high output impedance which would be an ideal choice for current-mode cascading. the PSPICE simulation results are included verifying the workability of the proposed filter. the given results agree well withthe theoretical anticipation.
We cordially welcome all participants of DDECS 2013 to Karlovy Vary - the most famous spa town of the Czech Republic. the DDECS symposium series has been organized by the Czech Republic (1997, 2002, 2006, 2009), Polan...
We cordially welcome all participants of DDECS 2013 to Karlovy Vary - the most famous spa town of the Czech Republic. the DDECS symposium series has been organized by the Czech Republic (1997, 2002, 2006, 2009), Poland (1998, 2003, 2007), Slovakia (2000, 2004, 2008), Hungary (2001, 2005), Austria (2010), Germany (2011) and Estonia (2012). After our very successful event in Tallinn, Estonia, we are back in the Czech Republic.
Multiple constant multiplier (MCM) is a digital circuit which multiplies its single input by N constants. As MCMs are composed of adders and shifters, their implementation cost is relatively low. In this paper, we pro...
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ISBN:
(纸本)9781467361354
Multiple constant multiplier (MCM) is a digital circuit which multiplies its single input by N constants. As MCMs are composed of adders and shifters, their implementation cost is relatively low. In this paper, we propose a method for design of approximate multiple constant multipliers where the requirement on functional equivalence between the specification and implementation is relaxed in order to further reduce the area on a chip or minimize delay. the proposed method is based on multiobjective Cartesian Genetic Programming. It provides many trade-off solutions among accuracy, area and delay.
Proton beam characterization was performed at the Oslo Cyclotron Laboratory (OCL) in order to evaluate the beam properties and asses its usability for radiation testing of electronic devices. the characterization was ...
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ISBN:
(纸本)9781467361354
Proton beam characterization was performed at the Oslo Cyclotron Laboratory (OCL) in order to evaluate the beam properties and asses its usability for radiation testing of electronic devices. the characterization was performed withthe aim of establishing good guidelines for reliable radiation tolerance testing at the OCL. A dosimetry measurement and calibration setup is proposed as well as a beam-to-target alignment and beam profile measurement setup. the beam characterization was performed using 30 MeV protons.
this paper presents a numerical approach to DC fault analysis of analog circuitsthat improves the total computational time and reduces the total complexity of such analysis. the reduction is achieved by utilization o...
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ISBN:
(纸本)9781467361354
this paper presents a numerical approach to DC fault analysis of analog circuitsthat improves the total computational time and reduces the total complexity of such analysis. the reduction is achieved by utilization of calculus that can substitute conventional simulations and thus, significantly reducing computational time. A detailed description of the approach including its mathematical background is presented. Accuracy and time efficiency are demonstrated on a test circuit.
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