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检索条件"任意字段=13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"

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DSP and ASIC implementation of a channel filter for a 3G UTRA-TDD system

DSP and ASIC implementation of a channel filter for a 3G UTR...

引用

ieee International symposium on Personal, Indoor and Mobile Radio Communications (PIMRC)

作者： R. Veljanovski J. Singh M. Faulkner Centre of Telecommunications and Microelectronics Victoria University Melbourne VIC Australia

this paper describes the design, simulation and implementation of a high performance low power pulse-shaping FIR filter. the filter is for an UTRA-TDD transmitter. the pulse-shaping filter was implemented on a DSP and as an ASIC. A performance analysis and comparison using industry standard EDA tools was performed. A proposed reconfigurable pulse-shaping filter architecture for the receiver in the mobile terminal is also presented. this novel architecture can drastically reduce power dissipation dependant on adjacent channel interference. It automatically scales the number of filter coefficients by monitoring the in-band and out-of-band powers. this new filter performance was evaluated in a simulation UTRA-TDD environment because of the large near far problem caused by adjacent channel interference from adjacent mobiles and base stations.

关键词： Digital signal processing Application specific integrated circuits Finite impulse response filter Interchannel interference Transmitters Performance analysis electronic design automation and methodology Power dissipation Computerized monitoring Base stations

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Routability estimation analysis for MCM designs

Routability estimation analysis for MCM designs

引用

9th International symposium on Integrated circuits, Devices and systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated systems

作者： Chew, Ho Choy, Paul Chuek, Chua Hong Sun Java Center Sun Professional Services Sun Microsystems Pte Ltd 1 Magazine Rd #07-01/13 Central Mall Singapore 059567 Singapore Division of Circuits and Systems School of Elec. and Electronic Eng. Nanyang Technological University Nanyang Avenue Singapore 639798 Singapore

Information on routability estimation is critical to MCM design both as a prediction factor as well as a preventive measure. Early prediction of unroutability could potentially save needless iterations and resource. Routability estimation can also give a prediction to the estimated number of routing layers to achieve success for the design, thus preventing unnecessary introduction of routing layers which could potentially be costly both to production and yield. Routability estimation can also be used as an indication of routing density of the design. Densely routed design often result in low fabrication yield or even resulting to a non-manufacturable design. Routability is the probabilistic measure of the success of a design to be routed completely given the placement of modules, the amount of wiring space and the set of connections to be made. However, the expression of routability is often fleeting. We proposed an unroutability expression as an estimation to the actual unroutability taking into account of routing resources and constraints. this work is a pluggable module, which fits into an overall MCM automated design framework. Our results shows a sharp difference between taking into consideration of the actual routing resources available (constraints) and one without in the estimation of routability.

关键词： Multichip modules

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the future of electronics in automobiles

The future of electronics in automobiles

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International symposium on Power Semiconductor Devices and Ics (ISPSD)

作者： J.G. Kassakian D.J. Perreault Laboratory for Electromagnetic and Electronic Systems Massachusetts Institute of Technology USA

ISBN: (纸本)4886860567

the present 14 V automotive electrical system will soon become 42 V. New electrical features and electrification of present mechanically driven functions will provide commercial opportunities for a new high volume application of power electronics. Cost and the thermal environment present difficult challenges to device designers. SiC is shown as a promising material for this environment. A new high efficiency power supply design using the existing automotive alternator is presented.

关键词： Automobiles Automotive engineering Power electronics Control systems Automatic voltage control Costs Engines Driver circuits Power generation economics Environmental economics

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design consideration of 1000 V merged PiN Schottky diode using superjunction sustaining layer

Design consideration of 1000 V merged PiN Schottky diode usi...

引用

International symposium on Power Semiconductor Devices and Ics (ISPSD)

作者： E. Napoli A.G.M. Strollo Department of Electronic and Telecommunication Engineering University of Napoli Federico II Naples Italy

ISBN: (纸本)4886860567

the paper presents a novel rectifier structure based on superjunction technique, the Superjunction Merged PiN Schottky diode. Optimal diode design is obtained exploiting a two-dimensional analytical model, able to correctly estimate electric field, for the calculation of breakdown voltage of power superjunction devices. Device performances are analyzed with 2D numerical simulations and compared to standard PiN and Schottky diodes.

关键词： Schottky diodes Rectifiers Analytical models circuits Electrostatics Poisson equations Numerical simulation MOSFETs Virtual reality Telecommunications

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Resizing rules for the reuse of MOS analog designs 13

Resizing rules for the reuse of MOS analog designs

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13th symposium on Integrated circuits and systems design

作者： Montoro, CG Schneider, MC Univ Fed Santa Catarina BR-88040900 Florianopolis SC Brazil

this paper presents a redesign procedure for analog circuits based on a scalable model of the MOSFET. A set of very simple expressions allows the calculation of transistor dimensions and bias for a given circuit in a ... 详细信息

ISBN: (纸本)076950843X

关键词： Analog circuits CMOS technology Digital circuits electronic mail Equations Intellectual property MOSFET circuits System-on-a-chip Time to market Voltage

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JPEG decoding in an electronic voting machine 13

JPEG decoding in an electronic voting machine

引用

13th symposium on Integrated circuits and systems design

作者： Jacobi, RP Trindade, F de Carvalho, JPA Cantanhede, R Univ Brasilia Dept Ciencia Comp BR-70910900 Brasilia DF Brazil

ISBN: (纸本)076950843X

Since 1996 an electronic Voting Machine (EVM) was introduced in Brazilian Electrons. it is based on a PC motherboard, containing a small keypad and a LCD display which shows messages and candidate's pictures. We are studing the introduction of programmable devices in the EVM in order to make it more flexible and to improve secury issues. this paper presents part of this work, the implementation of a JPEG decoding algorithm in FPGA in the context of the EVM. It presents the decoding process and shows the first results obtained in the implementation of the IDCT (inverse discrete cosine transform) and Huffmann decoding.

关键词： Availability Decoding electronic voting electronic voting systems Field programmable gate arrays Hardware Jacobian matrices Libraries Nominations and elections Space exploration

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Net by net routing with a new path search algorithm 13

Net by net routing with a new path search algorithm

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13th symposium on Integrated circuits and systems design

作者： Johann, M Reis, R Univ Fed Rio Grande do Sul Inst Informat BR-91501970 Porto Alegre RS Brazil

ISBN: (纸本)076950843X

Net by net routing is still a very important technique used to make connections in VLSI circuits. the maze routing algorithms used for this purpose correspond to shortest path searches derived from basic BFS or from A*, with many dedicated improvements. this paper proposes the use of a new path search algorithm. LCS*, for routing individual connections in VLSI circuits. LCS* is a generic and simultaneous bidirectional heuristic algorithm which is faster than A* in most graph domains, such as VLSI routing grids. this is achieved by using dynamic estimation with the separation of computed values for open and closed nodes. Results show that the running time is reduced and little storage space is needed.

关键词： Artificial intelligence circuits Cost function Delay electronic design automation and methodology Heuristic algorithms Informatics Routing Shortest path problem Very large scale integration

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Fault models and compact test vectors for MOS OpAmp circuits 13

Fault models and compact test vectors for MOS OpAmp circuits

引用

13th symposium on Integrated circuits and systems design

作者： Calvano, JV Alves, VC Lubaszewski, MS Mesquita, AC Brazilian Navy Research Institute Brazil Federal University of Rio de Janeiro Brazil Federal University of Rio Grande do Sul Brazil

ISBN: (纸本)076950843X

the analog VLSI technology processes are reaching the matureness, nevertheless, there is a big constraint, regarding their use on complex electronic products: "the test". the "Deisgn for Testability" paradigm were developed to permit the test plan implementation early on in the design cycle. However to succeed onto this strategy, the fault simulation should be carried out in order to evaluate appropriate test patterns, fault grade and so forth. Consequently adequate fault models must be established. Due to the lack of fault models, suitable to fault simulation on OpAmps, we propose in this work a methodology for functional modeling, and a method for test pattern generation. A fault dictionary for AmpOps is built and a procedure for compact test vector construction is proposed. Preliminary results have shown that high level OpAmp requirements, as slow-rate, common mode rejection ration etc, can be checked by this approach with good compromise among the fault modeling problem, the analog nature of this circuit complexity by itself.

关键词： operational amplifiers analog test fault model fault models test pattern

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Iddt testing of continuous-time filters

Iddt testing of continuous-time filters

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VLSI Test symposium

作者： J. Arguelles M.J. Lopez J. Blanco M. Martinez S. Bracho Electronics Departmentm University of Cantabria Santander Spain

A design-for-Test (DfT) methodology is proposed to perform an analysis of the dynamic supply current consumption as a testing methodology for continuous time filters. A built-in current sensor has been developed to analyze the dynamic current and a partitioning methodology, based on this sensor, has been developed to improve test reliability on large circuits under test. the DfT proposal allows one to use a conventional digital automatic test equipment (ATE) on this analog circuit type. Some experimental results are reported to illustrate the proposed DfT method.

关键词： Circuit testing Circuit faults Filters design for testability Analog circuits Current supplies electronic equipment testing Automatic testing Integrated circuit reliability Automatic test equipment

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the importance of testing complex electronics 12

The importance of testing complex electronics

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12th International electronic Manufacturing Technology symposium, IEMT 1992

作者： Sinnadurai, N. Ambleside Corder Road Ipswich SuffolkIP42XD United Kingdom

ISBN: (纸本)0780306295

the increasing functionality of modern electronics systems is being achieved through more complex integrated circuits, dense surface mount assemblies and increasingly through the use of multiple complex ICs interconnected to form multi-chip modules, all of which have progressively increased the cost of testing and its share of production cost, so that test costs are dominant today. Initiatives taken in Europe by leading corporations and recently adopted as ieee standards for logic circuit testability, are now enabling electronic access for in-circuit testing and diagnostics at IC and board and MCM level, thereby improving quality and throughput in the manufacture of electronics. various proprietary solutions are also being introduced very effectively for analogue circuits, and for specialised computing and telecommunications systems, some using expert systems to aid diagnostics and improving the quality and throughput of testing. the solutions are most cost-effectively introduced at the design stage when maximum impact can be achieved on subsequent life-cycle costs. © 1992 ieee.

关键词： ieee Standards

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