In the realm of programming education, students often face challenges such as syntax and logic errors, necessitating resilience to persevere through programming problems. programming resilience is essential for school...
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ISBN:
(数字)9798350367416
ISBN:
(纸本)9798350367423
In the realm of programming education, students often face challenges such as syntax and logic errors, necessitating resilience to persevere through programming problems. programming resilience is essential for school students as it nurtures problem-solving abilities, perseverance, creativity, adaptability, confidence, and essential life skills that extend beyond coding. To address this, the present study introduces the programming Resilience Scale for Secondary Schools (PR3S) tailored for secondary school students in Malaysia engaging with robotics education through mobile robot programming. For the PR3S, 13 items were retained for the five constructs, namely: persistence, perceived value, difficulty cognition, incremental belief, and building networks. Data was collected from 90 secondary students participating in robotics programs. Validity assessments demonstrated the scale's efficacy in measuring programming resilience among secondary school students engaging with robotics education. Notably, findings revealed no significant differences were observed among gender, location, age, and background knowledge. Students' preferences have an impact on the resilience of students in learning programming, students who have an interest in robotics and programming achieved higher scores compared to students who do not have an interest. the PR3S is anticipated to serve as a valuable tool for educators and researchers in identifying students encountering challenges in programming, facilitating early interventions, and promoting resilience-building activities within the context of robotics programming education in Malaysian secondary schools.
An approach to simulating and analysing sensor events in a boxed beef supply chain is presented. the simulation component reflects our industrial partner's transport routes and parameters under normal and abnormal...
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the proceedings contain 17 papers. the special focus in this conference is on Reversible Computation. the topics include: A Tangled Web of 12 Lens Laws;splitting Recursion Schemes into Reversible and Classical Interac...
ISBN:
(纸本)9783030798369
the proceedings contain 17 papers. the special focus in this conference is on Reversible Computation. the topics include: A Tangled Web of 12 Lens Laws;splitting Recursion Schemes into Reversible and Classical Interacting threads;reversibility of Executable Interval Temporal logic Specifications;efficient Construction of Functional Representations for Quantum Algorithms;Finding Optimal Implementations of Non-native CNOT Gates Using SAT;fast Swapping in a Quantum Multiplier Modelled as a Queuing Network;OR-Toffoli and OR-Peres Reversible Gates;variational Quantum Eigensolver and Its Applications;reversible Functional Array programming;Compiling Janus to RSSA;causal-Consistent Debugging of Distributed Erlang Programs;towards a Unified Language Architecture for Reversible Object-Oriented programming;Towards a Truly Concurrent Semantics for Reversible CCS;Forward-Reverse Observational Equivalences in CCSK;explicit Identifiers and Contexts in Reversible Concurrent Calculus.
the proceedings contain 16 papers. the special focus in this conference is on Frontiers of Combining Systems. the topics include: Vampire with a Brain Is a Good ITP Hammer;optimization Modulo Non-linear Arithmetic via...
ISBN:
(纸本)9783030862046
the proceedings contain 16 papers. the special focus in this conference is on Frontiers of Combining Systems. the topics include: Vampire with a Brain Is a Good ITP Hammer;optimization Modulo Non-linear Arithmetic via Incremental Linearization;Quantifier Simplification by Unification in SMT;algorithmic Problems in the Symbolic Approach to the Verification of Automatically Synthesized Cryptosystems;formal Analysis of Symbolic Authenticity;Formal Verification of a Java Component Using the RESOLVE Framework;non-disjoint Combined Unification and Closure by Equational Paramodulation;symbol Elimination and Applications to Parametric Entailment Problems;on the Copy Complexity of Width 3 Horn Constraint Systems;Restricted Unification in the DL FL0;combining Event Calculus and Description logic Reasoning via logicprogramming;semantic Forgetting in Expressive Description logics;improving Automation for Higher-Order Proof Steps;JEFL: Joint Embedding of Formal Proof Libraries.
In this paper the reversibility of executable Interval Temporal logic (ITL) specifications is investigated. ITL allows for the reasoning about systems in terms of behaviours which are represented as non-empty sequence...
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ISBN:
(纸本)9783030798369;9783030798376
In this paper the reversibility of executable Interval Temporal logic (ITL) specifications is investigated. ITL allows for the reasoning about systems in terms of behaviours which are represented as non-empty sequences of states. It allows for the specification of systems at different levels of abstraction. At a high level this specification is in terms of properties, for instance safety and liveness properties. At concrete level one can specify a system in terms of programming constructs. One can execute these concrete specification, i.e., test and simulate the behaviour of the system. In this paper we will formalise this notion of executability of ITL specifications. ITL also has a reflection operator which allows for the reasoning about reversed behaviours. We will investigate the reversibility of executable ITL specifications, i.e., how one can use this reflection operator to reverse the concrete behaviour of a particular system.
the addition of a 16-bit unsigned divider to Xilinx's Kintex and Virtex FPGA devices improves digital design and computational performance. Developers may divide nonnegative 16-bit integers withthe 16-bit unsigne...
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ISBN:
(数字)9798350305463
ISBN:
(纸本)9798350305470
the addition of a 16-bit unsigned divider to Xilinx's Kintex and Virtex FPGA devices improves digital design and computational performance. Developers may divide nonnegative 16-bit integers withthe 16-bit unsigned divider for precision numerical operations. Due to their hardware versatility and efficiency, FPGAs may speed complicated algorithms in numerous application industries. Recognizable logic gates and programmable interconnects make FPGAs versatile for digital signal processing, telecommunications, and fast prototyping. Xilinx's Kintex and Virtex series, known for customized designs and outstanding performance, get a 16-bit unsigned divider capability. Engineers may execute complex algorithms faster and more precisely withthis innovation, opening up new possibilities in embedded systems, telecommunications, and more. Using HDLs like Verilog and VHDL makes FPGA programming easy, like software. When efficiency and speed are crucial, FPGAs are essential in highperformance computing and real-time processing. Xilinx's Kintex and Virtex FPGA processors' 16-bit unsigned divider integration marks a major FPGA technical milestone. It simplifies calculation and widens digital designs, enabling designers to reach new possibilities. In this development, Xilinx's dedication to cutting-edge solutions shows how FPGAs are becoming essential tools for a wide range of applications. Xilinx, FPGA, 16-bit unsigned division, computational efficiency, digital design, hardware acceleration, and highperformance computing are keywords for this work.
the paper deals with a systematic approach to programming a program for safety PLC (Programmable logic Controllers) based on the description of the required function by the UML (Unified Modeling Language) statechart. ...
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ISBN:
(纸本)9781728175423
the paper deals with a systematic approach to programming a program for safety PLC (Programmable logic Controllers) based on the description of the required function by the UML (Unified Modeling Language) statechart. this procedure can be used to achieve systematic safety integrity of the control system withthe safety PLC. Rhapsody tool is used as software support for UML and the application example is implemented on safety PLC Simatic.
the proceedings contain 14 papers. the special focus in this conference is on Verified Software. the topics include: An Efficient Floating-Point Bit-Blasting API for Verifying C Programs;rigorous Enclosure of Round-Of...
ISBN:
(纸本)9783030636173
the proceedings contain 14 papers. the special focus in this conference is on Verified Software. the topics include: An Efficient Floating-Point Bit-Blasting API for Verifying C Programs;rigorous Enclosure of Round-Off Errors in Floating-Point Computations;towards Numerical Assistants: Trust, Measurement, Community, and Generality for the Numerical Workbench;combining Zonotope Abstraction and Constraint programming for Synthesizing inductive Invariants;QPR Verify: A Static Analysis Tool for Embedded Software Based on Bounded Model Checking;Verified Translation Between Purely Functional and Imperative Domain Specific Languages in HELIX;automatic Detection and Repair of Transition- Based Leakage in Software Binaries;BanditFuzz: A Reinforcement-Learning Based Performance Fuzzer for SMT Solvers;synthesis of Solar Photovoltaic Systems: Optimal Sizing Comparison;verified Transformations and Hoare logic: Beautiful Proofs for Ugly Assembly Language;MCBAT: Model Counting for Constraints over Bounded Integer Arrays;Verification of an Optimized NTT Algorithm;vstte 2020 preface.
Social Media have changed the conditions and rules of Social Networking (SNet) where it comes from people intermingling with each other, i.e., SNet is to be understood as a process that works on the principl...
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the proceedings contain 11 papers. the special focus in this conference is on Rewriting logic and Its Applications. the topics include: Automated Construction of Security Integrity Wrappers for Industry 4.0 Applicatio...
ISBN:
(纸本)9783030635947
the proceedings contain 11 papers. the special focus in this conference is on Rewriting logic and Its Applications. the topics include: Automated Construction of Security Integrity Wrappers for Industry 4.0 Applications;connecting Constrained Constructor Patterns and Matching logic;Analysis of the Runtime Resource Provisioning of BPMN Processes Using Maude;a Rule-Based System for Computation and Deduction in Mathematica;variants in the Infinitary Unification Wonderland;variant Satisfiability of Parameterized Strings;inductive Reasoning with Equality Predicates, Contextual Rewriting and Variant-Based Simplification;a Simplified Application of Howard’s Vector Notation System to Termination Proofs for Typed Lambda-Calculus Systems;strategies, Model Checking and Branching-Time Properties in Maude.
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