A long-standing problem in logic programming is how to cleanly separate logic and control. While solutions exist, they fall short in one of two ways: some are too intrusive, because they require significant changes to...
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ISBN:
(纸本)9781450329477
A long-standing problem in logic programming is how to cleanly separate logic and control. While solutions exist, they fall short in one of two ways: some are too intrusive, because they require significant changes to Prolog's underlying implementation;others are lacking a clean semantic grounding. We resolve both of these issues in this paper. We derive a solution that is both lightweight and principled. We do so by starting from a functional specification of Prolog based on monads, and extend this withthe effect handlers approach to capture the dynamic search tree as syntax. Effect handlers then express heuristics in terms of tree transformations. Moreover, we can declaratively express many heuristics as trees themselves that are combined with search problems using a generic entwining handler. Our solution is not restricted to a functional model: we show how to implement this technique as a library in Prolog by means of delimited continuations.
We present a translation scheme from a pure functional domain-specific language (DSL) to C. the over-arching idea of this scheme is to preserve the structure of the input program as much as possible. this includes, am...
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ISBN:
(纸本)9781450329477
We present a translation scheme from a pure functional domain-specific language (DSL) to C. the over-arching idea of this scheme is to preserve the structure of the input program as much as possible. this includes, among other things, to refrain from inlining user-written functions and to retain variable names as much as possible. We apply this translation scheme to GDSL, a DSL used for the specification of decoders for machine instructions. GDSL offers non-trivial language features such as monadic actions that our translation scheme maps one-to-one to C statements, resulting in code that closely resembles hand-written C code. Indeed, it is feasible to debug and profile the program at the C level and to interface the generated code with existing C code without marshaling data. Our translation scheme is therefore an attractive starting point for a light-weight DSL since no other language-specific tools besides the compiler are necessary. Moreover, the generated code is amenable to compiler optimizations found in off-the-shelf C compilers. this is illustrated by the performance achieved by a decoder for x86 machine instructions implemented in GDSL which is as fast as a production-quality decoding library shipped by Intel.
Higher-order constructs extend the expressiveness of firstorder (Constraint) Logic programming ((C) LP) both syntactically and semantically. At the same time assertions have been in use for some time in (C) LP systems...
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ISBN:
(纸本)9781450329477
Higher-order constructs extend the expressiveness of firstorder (Constraint) Logic programming ((C) LP) both syntactically and semantically. At the same time assertions have been in use for some time in (C) LP systems helping programmers detect errors and validate programs. However, these assertion-based extensions to (C) LP have not been integrated well with higher-order to date. this paper contributes to filling this gap by extending the assertion-based approach to error detection and program verification to the higher-order context within (C) LP. We propose an extension of properties and assertions as used in (C) LP in order to be able to fully describe arguments that are predicates. the extension makes the full power of the assertion language available when describing higher-order arguments. We provide syntax and semantics for (higher-order) properties and assertions, as well as for programs which contain such assertions, including the notions of error and partial correctness. We also discuss several alternatives for performing run-time checking of such programs.
Different XML formats are widely used for data exchange and processing, being often necessary to mutually convert between them. Standard XML transformation languages, like XSLT or XQuery, are unsatisfactory for this p...
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ISBN:
(纸本)9781450329477
Different XML formats are widely used for data exchange and processing, being often necessary to mutually convert between them. Standard XML transformation languages, like XSLT or XQuery, are unsatisfactory for this purpose since they require writing a separate transformation for each direction. Existing bidirectional transformation languages mean to cover this gap, by allowing programmers to write a single program that denotes both transformations. However, they often 1) induce a more cumbersome programming style than their traditionally unidirectional relatives, to establish the link between source and target formats, and 2) offer limited configurability, by making implicit assumptions about how modifications to both formats should be translated that may not be easy to predict. this paper proposes a bidirectional XML update language called BIFLUX (BIdirectional FunctionaL Updates for XML), inspired by the FLUX XML update language. Our language adopts a novel bidirectional programming by update paradigm, where a program succinctly and precisely describes how to update a source document with a target document, in an intuitive way, such that there is a unique " inverse" source query for each update program. BIFLUX extends FLUX with bidirectional actions that describe the connection between source and target formats. We introduce a core BIFLUX language, with a clear and well-behaved bidirectional semantics and a decidable static type system based on regular expression types.
the industry shift emerging forms of parallel and distributed computing (PDC), including multi-core CPUs, cloud computing, and general-purpose use of GPUs, have naturally led to increased presence of PDC elements unde...
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ISBN:
(纸本)9781450326056
the industry shift emerging forms of parallel and distributed computing (PDC), including multi-core CPUs, cloud computing, and general-purpose use of GPUs, have naturally led to increased presence of PDC elements undergraduate Computer Science curriculum recommendations, such as the new and substantial "PD" knowledge area in the joint acm/IEEE CS2013 recommendations[1]. How can undergraduate students grasp the extensive and complex range of PDC principles and practices, and apply that knowledge in problem solving, while PDC technologies continue to evolve rapidly? parallel design patterns are descriptions of effective solutions to recurring parallelprogramming problems in particular contexts and have emerged from long-standing industry practice. parallel patterns occur at all computational levels, ranging from low-level concurrent execution patterns (such as message passing or thread pool patterns) to high-level software design patterns suitable for organizing entire systems or their components (such as model-view-control or pipe and filter patterns). the sheer number of parallel patterns, which reflect the full breadth and complexity of PDC, can be quite daunting for a newcomer. However, the ubiquity of parallel patterns in all forms of parallel and distributed computation makes these patterns relevant and illuminating at all undergraduate levels. Knowledge of parallel patterns, being reusable elements of parallel design, guides problem-solving during the creation of parallel programs;and those enduring design patterns remain relevant and useful as new PDC infrastructure emerges in this rapidly evolving field. this panel presents four viewpoints representing various approaches for teaching parallel patterns to CS undergraduates at multiple academic levels. Moderator Dick Brown co-directs (with Adams and Shoop) the CSinparallel project (***), which produces and shares modular materials for incrementally adding parallelism to existing undergraduate comp
Today, almost all computer architectures are parallel and heterogeneous; a combination of multiple CPUs, GPUs and specialized processors. this creates a challenging problem for application developers who want to devel...
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ISBN:
(纸本)9781450326568
Today, almost all computer architectures are parallel and heterogeneous; a combination of multiple CPUs, GPUs and specialized processors. this creates a challenging problem for application developers who want to develop high performance programs without the effort required to use low-level, architecture specific parallelprogramming models (e.g. OpenMP for CMPs, CUDA for GPUs, MPI for clusters). Domain-specific languages (DSLs) are a promising solution to this problem because they can provide an avenue for high-level application-specific abstractions with implicit parallelism to be mapped directly to low level architecture-specific programming models; providing both high programmer productivity and high execution *** this talk I will describe an approach to building high performance DSLs, which is based on DSL embedding in a general purpose programming language, metaprogramming and a DSL infrastructure called Delite. I will describe how we transform DSL programs into efficient first-order low-level code using domain specific optimization, parallelism and locality optimization withparallel patterns, and architecture-specific code generation. All optimizations and transformations are implemented in Delite: an extensible DSL compiler infrastucture that significantly reduces the effort required to develop new DSLs. Delite DSLs for machine learning, data querying, graph analysis, and scientific computing all achieve performance competitive with manually parallelized C++ code.
We present a simple yet effective technique for improving performance of lock-based code using the hardware lock elision (HLE) feature in Intel's upcoming Haswell processor. We also describe how to extend Haswell&...
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ISBN:
(纸本)9781450319225
We present a simple yet effective technique for improving performance of lock-based code using the hardware lock elision (HLE) feature in Intel's upcoming Haswell processor. We also describe how to extend Haswell's HLE mechanism to achieve a similar effect to our lock elision scheme entirely in hardware.
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