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检索条件"任意字段=14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

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Space-efficient implementation of nested parallelism

Space-efficient implementation of nested parallelism

引用

Proceedings of the 1997 6th acm sigplan symposium on principles and practice of parallel programming

作者： Narlikar, Girija J. Blelloch, Guy E. CMU Sch of Computer Science Pittsburgh United States

Many of today's high level parallel languages support dynamic, fine-grained parallelism. these languages allow the user to expose all the parallelism in the program, which is typically of a much higher degree than the number of processors. Hence an efficient scheduling algorithm is required to assign computations to processors at runtime. Besides having low overheads and good load balancing, it is important for the scheduling algorithm to minimize the space usage of the parallel program. this paper presents a scheduling algorithm that is provably space-efficient and time-efficient for nested parallel languages. In addition to proving the space and time bounds of the parallel schedule generated by the algorithm, we demonstrate that it is efficient in practice. We have implemented a runtime system that uses our algorithm to schedule parallel threads. the results of executing parallel programs on this system show that our scheduling algorithm significantly reduces memory usage compared to previous techniques, without compromising performance.

关键词： parallel processing systems

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Impala: a middleware system for managing autonomic, parallel sensor systems 03

Impala: a middleware system for managing autonomic, parallel...

引用

9th acm sigplan symposium on principles and practice of parallel programming

作者： Liu, T Martonosi, M Princeton Univ Dept Comp Sci Princeton NJ 08544 USA Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)9781581135886

Sensor networks are long-running computer systems with many sensing/compute nodes working to gather information about their environment, process and fuse that information, and in some cases, actuate control mechanisms in response. Like traditional parallel systems, communication between nodes is of fundamental importance, but is typically accomplished via wireless transceivers. One further key attribute of sensor networks is that they are almost always long-running systems, intended to operate in situ, with minimal direct human intervention, for months or years. this requirement for long-running autonomy mandates careful design of the runtime system that manages applications on each node, to ensure reliability and ease of upgrades over the life of the system. this paper describes Impala, a middleware architecture that enables application modularity, adaptivity, and repair-ability in wireless sensor networks. Impala allows software updates to be received via the node's wireless transceiver and to be applied to the running system dynamically. In addition, Impala also provides an interface for on-the-fly application adaptation in order to improve the performance, energy-efficiency, and reliability of the software system. Impala has been designed to be a part of the ZebraNet mobile sensor network, but we are also prototyping it within HP/Compaq iPAQ Pocket PC handhelds. We present performance data for both real system measurements of the Pocket PC version as well as simulations of a full mobile sensor system deployment. Overall, Impala is a lightweight runtime system that can greatly improve system reliability, performance, and energy-efficiency. the ideas introduced here for sensor networks have applicability more broadly in other long-running autonomous parallel systems as well.

关键词： design experimentation performance sensor networks middleware system software adaptation software update

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Helper Locks for Fork-Join parallel programming

Helper Locks for Fork-Join Parallel Programming

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Agrawal, Kunal Leiserson, Charles E. Sukha, Jim Washington Univ St Louis MO 63130 USA

ISBN: (纸本)9781605587080

Helper locks allow programs with large parallel critical sections, called parallel regions, to execute more efficiently by enlisting processors that might otherwise be waiting on the helper lock to aid in the execution of the parallel region. Suppose that a processor p is executing a parallel region A after having acquired the lock L protecting A. If another processor p' tries to acquire L, then instead of blocking and waiting for p to complete A, processor p' joins p to help it complete A. Additional processors not blocked on L may also help to execute A. the HELPER runtime system can execute fork-join computations augmented with helper locks and parallel regions. HELPER supports the unbounded nesting of parallel regions. We provide theoretical completion-time and space-usage bounds for a design of HELPER based on work stealing. Specifically, let V be the number of parallel regions in a computation, let T-1 be its work, and let (T) over tilde (infinity) be its "aggregate span" - the sum of the spans (critical-path lengths) of all its parallel regions. We prove that HELPER completes the computation in expected time O(T-1/P + (T) over tilde (infinity) + PV) on P processors. this bound indicates that programs with a small number of highly parallel critical sections can attain linear speedup. For the space bound, we prove that HELPER completes a program using only O(P (S) over tilde (1)) stack space, where e (S) over tilde (1) is the sum, over all regions, of the stack space used by each region in a serial execution. Finally, we describe a prototype of HELPER implemented by modifying the Cilk multithreaded runtime system. We used this prototype to implement a concurrent hash table with a resize operation protected by a helper lock.

关键词： Algorithms Performance theory Cilk fork-join multithreading helper lock nested parallelism parallel region scheduling work stealing

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Well-structured futures and cache locality 14

Well-structured futures and cache locality

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2014 19th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2014

作者： Herlihy, Maurice Liu, Zhiyu Computer Science Department Brown University United States

ISBN: (纸本)9781450326568

In fork-join parallelism, a sequential program is split into a directed acyclic graph of tasks linked by directed dependency edges, and the tasks are executed, possibly in parallel, in an order consistent with their dependencies. A popular and effective way to extend fork-join parallelism is to allow threads to create futures. A thread creates a future to hold the results of a computation, which may or may not be executed in parallel. that result is returned when some thread touches that future, blocking if necessary until the result is ready. Recent research has shown that while futures can, of course, enhance parallelism in a structured way, they can have a deleterious effect on cache locality. In the worst case, futures can incur Ω(PT ∞ +tT∞) deviations, which implies Ω(CPT∞+CtT∞) additional cache misses, where C is the number of cache lines, P is the number of processors, t is the number of touches, and T∞ is the computation span. Since cache locality has a large impact on software performance on modern multicores, this result is troubling. In this paper, however, we show that if futures are used in a simple, disciplined way, then the situation is much better: if each future is touched only once, either by the thread that created it, or by a later descendant of the thread that created it, then parallel executions with work stealing can incur at most O(CPT2∞ ) additional cache misses, a substantial improvement. this structured use of futures is characteristic of many (but not all) parallel applications. Copyright © 2014 acm.

关键词： parallel programming

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Scaling Graph Traversal to 281 Trillion Edges with 40 Million Cores 22

Scaling Graph Traversal to 281 Trillion Edges with 40 Millio...

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Cao, Huanqi Wang, Yuanwei Wang, Haojie Lin, Heng Ma, Zixuan Yin, Wanwang Chen, Wenguang Tsinghua Univ Dept Comp Sci & Technol Beijing Peoples R China Tsinghua Univ BNRist Beijing Peoples R China Peking Univ Sch Comp Sci Beijing Peoples R China Natl Supercomp Ctr Wuxi Wuxi Jiangsu Peoples R China

ISBN: (纸本)9781450392044

Graph processing, especially high-performance graph traversal, plays a more and more important role in data analytics. the successor of Sunway TaihuLight, NEW SUNWAY, is equipped with nearly 10 PB memory and over 40 million cores, which brings the opportunity to process hundreds of trillions of edges graphs. However, the graph with an unprecedented scale also brings severe performance challenges, including load imbalance, poor locality, and irregular access of graph traversal workload. To address the scalability problem, we propose a novel 3-level degree-aware 1.5D graph partitioning, which benefits from both delegated 1D and 2D partitioning. By delegating extremely heavy vertices globally and other heavy vertices on columns and rows in the processes mesh, we break the scalability wall of previous partitioning methods. Together with sub-iteration direction optimization, core group -aware core subgraph segmenting, and a new on-chip sorting mechanism using RMA, we achieve 180,792 GTEPS on a graph with 281 trillion edges, using 103,912 processors with over 40 million cores, achieving 1.75x performance and 8x capacity compared to the previous state of the art and conforming to the Graph 500 BFS benchmark[14].

关键词： massively parallel algorithm breadth-first search heterogeneous architecture

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Scalable parallel debugging with statistical assertions 12

Scalable parallel debugging with statistical assertions

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17th acm sigplan symposium on principles and practice of parallel programming, PPoPP'12

作者： Dinh, Minh Ngoc Abramson, David Jin, Chao Gontarek, Andrew Moench, Bob DeRose, Luiz Monash University Clayton 3800 VIC Australia Cray Inc. Saint Paul MN 55101-2987 United States

ISBN: (纸本)9781450311601

Traditional debuggers are of limited value for modern scientific codes that manipulate large complex data structures. this paper discusses a novel debug-time assertion, called a "Statistical Assertion", that allows a user to reason about large data structures, and the primitives are parallelised to provide an efficient solution. We present the design and implementation of statistical assertions, and illustrate the debugging technique with a molecular dynamics simulation. We evaluate the performance of the tool on a 12,000 cores Cray XE6.

关键词： Data structures

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Griffin: Uniting CPU and GPU in Information Retrieval Systems for Intra-Query parallelism 18

Griffin: Uniting CPU and GPU in Information Retrieval System...

引用

23rd acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Liu, Yang Wang, Jianguo Swanson, Steven WDC Res Chippenham Wilts England Univ Calif San Diego San Diego CA USA

ISBN: (纸本)9781450349826

Interactive information retrieval services, such as enterprise search and document search, must provide relevant results with consistent, low response times in the face of rapidly growing data sets and query loads. these growing demands have led researchers to consider a wide range of optimizations to reduce response latency, including query processing parallelization and acceleration with co-processors such as GPUs. However, previous work runs queries either on GPU or CPU, ignoring the fact that the best processor for a given query depends on the query's characteristics, which may change as the processing proceeds. We present Griffin, an IR systems that dynamically combines GPU- and CPU-based algorithms to process individual queries according to their characteristics. Griffin uses state-of-the-art CPU-based query processing techniques and incorporates a novel approach to GPU-based query evaluation. Our GPU-based approach, as far as we know, achieves the best available GPU search performance by leveraging a new compression scheme and exploiting an advanced merge-based intersection algorithm. We evaluate Griffin with real world queries and datasets, and show that it improves query performance by 10x compared to a highly optimized CPU-only implementation, and 1.5x compared to our GPU-approach running alone. We also find that Griffin helps reduce the 95th-, 99th-, and 99.9th-percentile query response time by 10.4x, 16.1x, and 26.8x, respectively.

关键词： Information Retrieval Search Engines Query Processing GPU parallel Algorithms

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DATA-FLOW EQUATIONS FOR EXPLICITLY parallel PROGRAMS 93

DATA-FLOW EQUATIONS FOR EXPLICITLY PARALLEL PROGRAMS

引用

4th SYMP ON principles AND practice OF parallel programming ( PPOPP )

作者： GRUNWALD, D SRINIVASAN, H UNIV COLORADO DEPT COMP SCIBOULDERCO 80309

ISBN: (纸本)9780897915892

We present a solution to the reaching definitions problem for programs with explicit lexically specified parallel constructs, such as cobegin/coend or parallel-sections, both with and without explicit synchronization operations, such as Post, Wait or Advance. the reaching definitions information for sequential programs is used to solve many standard optimization problems. In parallel programs, this information can also be used to explicitly direct communication and data ownership. Although work has been done on analyzing parallel programs to detect data races, little work has been done on optimizing such programs. We show how the memory consistency model specified by an explicitly parallel programming language can influence the complexity of the reaching definitions problem. By selecting the ''weakest'' memory consistency semantics, we can efficiently solve the reaching definitions problem for correct programs.

关键词： Computer software

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A framework for practical parallel fast matrix multiplication 2015

A framework for practical parallel fast matrix multiplicatio...

引用

20th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2015

作者： Benson, Austin R. Ballard, Grey Institute for Computational and Mathematical Engineering Stanford University StanfordCA United States Sandia National Laboratories LivermoreCA United States

ISBN: (纸本)9781450332057

Matrix multiplication is a fundamental computation in many scientific disciplines. In this paper, we show that novel fast matrix multiplication algorithms can significantly outperform vendor implementations of the classical algorithm and Strassen's fast algorithm on modest problem sizes and shapes. Furthermore, we show that the best choice of fast algorithm depends not only on the size of the matrices but also the shape. We develop a code generation tool to automatically implement multiple sequential and shared-memory parallel variants of each fast algorithm, including our novel parallelization scheme. this allows us to rapidly benchmark over 20 fast algorithms on several problem sizes. Furthermore, we discuss a number of practical implementation issues for these algorithms on shared-memory machines that can direct further research on making fast algorithms practical. Copyright 2015 acm.

关键词： Matrix algebra

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Architectural Support for Cilk Computations on Many-core Architectures

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acm sigplan NOTICES 2009年第4期44卷 285-286页

作者： Long, Guoping Fan, Dongrui Zhang, Junchao Chinese Acad Sci Inst Comp Technol Key Lab Comp Syst & Architecture Beijing 100864 Peoples R China

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