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检索条件"任意字段=14th International Conference on Field-Programmable Logic and Applications"

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Leveraging HBM2 for Accelerating k-mer Counting with oneAPI on FPGAs 34

Leveraging HBM2 for Accelerating k-mer Counting with oneAPI ...

引用

34th international conference on field-programmable logic and applications (FPL)

作者： Lucas, Owen P. George, Alan D. Univ Pittsburgh NSF SHREC Ctr ECE Pittsburgh PA 15260 USA

ISBN: (纸本)9798331530082;9798331530075

Counting substrings of an arbitrary length k (k-mers) is the single most time-consuming step of de novo genome sequencing. Sequencing machines generate large quantities of data (>100s of GBs per genome), which need to be processed using frequent memory accesses into data structures considerably larger than available cache, leading to a memory-bound runtime. Stemming from the gap between processor and memory speed, this bottleneck requires alternative architectures. Recent FPGA devices, equipped with on-chip High-Bandwidth Memory (HBM), enable custom architectures to employ highcapacity, high-bandwidth memory to address memory-bound tasks. this research investigates accelerating k-mers counting with one such device, the BittWare 520N-MX, a Stratix 10 FPGA with 16 GB of on-chip HBM2. the architecture was designed using Intel's oneAPI, which enables high-level synthesis for FPGA programming. the accelerator architecture was able to leverage inherent parallelism in the algorithm via the multiple parallel hash functions, along with partitioning data structure across multiple memory banks, and employing multiple independent parallel processing pipelines on the device to maximize throughput. the accelerator achieved 42.67M k-mers per second, 2.80x more than the throughput-optimized CPU version and 4.31x more than the original CPU app. Despite this speedup, the architectures saw diminishing returns when attempting to incorporate additional HBM2 banks. OneAPI was able to achieve speedup over the CPU using the FPGA and emerging memory, but it's somewhat limited in its current scaling capabilities.

关键词： field programmable gate arrays bioinformatics high level synthesis hardware acceleration design tools memory management reconfigurable architectures

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Efficient FPGA Floating-Point Multiplier with ATM and XOR-MUX 14

Efficient FPGA Floating-Point Multiplier with ATM and XOR-MU...

引用

14th international conference on Computing Communication and Networking Technologies, ICCCNT 2023

作者： Sasikumar, S. Reddy, B. Maheshwar Prakash, V.R. Reddy, M. Malleshwar Hindustan Institute of Technology and Science Department of Electronics & Communication Engineering Chennai India

ISBN: (纸本)9798350335095

this paper proposes an efficient implementation utilising a 32-bit approximative truncated multiplier of a floating-point multiplier and XOR-MUX logic. the design covers a 23-bit exponent, 8-bit mantissa, and 1 sign bit. In order to decrease the output size of the multiplication operation, the carry-save multiplier is replaced in the proposed architecture with a roughly truncated multiplier. Additionally, it uses XOR-MUX logic to reduce the number of logic gates in the floating-point multiplier design, which lowers the number of full adders and full subtractors. the proposed architecture uses the normalized rounding method to reduce area, delay, and power. To illustrate optimised logic size, delay, and power, the error difference is studied using Model Sim software, and the proposed design is contrasted with an existing multiplier. Results reveal that the proposed design performs better than previous designs. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

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Inductive logic Programming Based Bottlenose Delphin Optimization to Fake New Detection 14

Inductive Logic Programming Based Bottlenose Delphin Optimiz...

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14th Symposium on Computer applications & Industrial Electronics (ISCAIE)

作者： thangarasu, Gunasekar Alla, Kesava Rao Kannan, K. Nattar IMU Univ Saveetha Inst Med & Tech Sci Saveetha Sch Engn Dept Digital Hlth & Hlth Informat Kuala Lumpur Malaysia MAHSA Univ Saujana Putra Selangor Malaysia Saveetha Inst Med & Tech Sci Saveetha Sch Engn Chennai Tamil Nadu India

ISBN: (纸本)9798350348798;9798350348804

the integration of Inductive logic Programming (ILP) and Bottlenose Dolphin Optimization (BDO) in this research addresses a pressing issue in today's information-saturated landscape: the proliferation of fake news. In an era where misleading information can spread rapidly, traditional methods often fall short in effectively identifying deceptive *** combat this challenge, our approach harnesses the synergies of ILP and BDO. ILP plays a crucial role in constructing logical rules that capture intricate relationships within news data. By doing so, it delves deep into the content, seeking out patterns and inconsistencies that may not be obvious at first glance. BDO, on the other hand, takes inspiration from the social behavior of bottlenose dolphins to optimize the process of generating these rules. Just as dolphins collaborate and communicate to solve complex problems, BDO helps refine the logical rules for better accuracy. Ultimately, this research underscores the potential of bio-inspired optimization, such as BDO, combined with the precision of logic programming (ILP) to strengthen the integrity of information dissemination platforms. In an age where the veracity of information is paramount, this innovative approach offers a promising solution to combat the spread of fake news and promote the dissemination of authentic, reliable information.

关键词： Inductive logic Programming Bottlenose Dolphin Optimization Fake News Detection Information Proliferation

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Plastic Deformation Modeling and Mechanical Properties of Fe-Cr-Al Alloys 14

Plastic Deformation Modeling and Mechanical Properties of Fe...

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14th international conference Nanomaterials: applications & Properties

作者： Kharchenko, Vasyl Kharchenko, Dmitrii Shchokotova, Olha Lysenko, Borys Sumy State Univ Natl Acad Sci Ukraine Inst Appl Phys Sumy Ukraine Natl Acad Sci Ukraine Inst Appl Phys Sumy Ukraine

ISBN: (纸本)9798350380132;9798350380125

We study plastic deformation process in ironbased Fe-Cr-Al alloys by using phase field approach within the framework of the nonlinear elasticity theory. Alloy samples preparation is performed via numerical modelling of chromium-enriched precipitates formation during long-term annealing of solid solution. the redistribution of elastic fields under mechanical loading in the form of shear deformation with a constant strain rate is investigated. the influence of the concentration of alloying elements and the annealing temperature on the change in mechanical properties of the alloy is analyzed. the effect of strain rate on the yield and ultimate strength is studied.

关键词： phase field modeling numerical simulations deformation mechanical properties

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Fuzzy logic-Based AI Model for Accurate Grading of Papilledema Severity 14

Fuzzy Logic-Based AI Model for Accurate Grading of Papillede...

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14th international conference on Electrical Engineering (ICEENG)

作者： Salaheldin, Ahmed M. Wahed, Manal Abdel Talaat, Manar Saleh, Neven El Shorouk Acad Higher Inst Engn Dept Biomed Engn Cairo Egypt South Valley Univ Fac Med Dept Ophthalmol Qena Egypt

ISBN: (纸本)9798350343427;9798350343434

Papilledema is characterized by optic disc swelling due to increased intracranial pressure, necessitates accurate diagnostic tools for effective treatment planning. this study presents an innovative artificial intelligence (AI) model employing fuzzy logic to grade papilledema severity. the study utilized a newly collected dataset containing different clinical measurements. the input of the system includes Best-Corrected Visual Acuity (BCVA), pupil reaction, retinal nerve fiber layer (RFNL) thickness, total peripapillary thickness, and visual field measurements and output of the system is to identify the level of severity of papilledema within four grades. the fuzzy logic model achieves a classification accuracy exceeding 90%, demonstrating its effectiveness in discerning diverse papilledema severity levels. Comparative analysis with existing literature highlights competitive performance, positioning the model as a promising neuro-ophthalmological diagnostic tool. Unique contributions include dataset composition, feature extraction, and the model's implementation. this study pioneers in advancing diagnostic methodologies for papilledema, offering a reliable tool for ophthalmologists used for the first time in papilledema severity detection. the results indicate the model's potential for integration into clinical practice, contributing AI-driven neuro-ophthalmological diagnostics and enhancing patient care.

关键词： papilledema fuzzy logic diagnostic model neuro-ophthalmology

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field programmable Gate Array: An Extensive Review, Recent Trends, Challenges and applications 18

Field Programmable Gate Array: An Extensive Review, Recent T...

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18th INDIAcom;11th international conference on Computing for Sustainable Global Development, INDIACom 2024

作者： Badhoutiya, Arti Jaffer, Zainb Hussein, Heba Mohammed Juyal, Ashima Mittal, Manisha Anand, Rohit Gla University Department of Electrical Engineering Mathura India Al-Farahidi University Medical Technical College Iraq Al-Zahrawi University College Department of Dentistry Karbala Iraq Uttaranchal Institute of Technology Uttaranchal University Department of Ece Dehradun India Gtbit Department of Ece New Delhi India New Delhi India

ISBN: (纸本)9789380544519

A field programmable gate array (FPGA) is a type of programmable logic device that the consumer can modify after production to carry out a variety of tasks, from fundamental logic gate operations to AI systems and beyond. More than 70,000 documents pertaining to FPGA have been found in the two most prominent scientific databases, Scopus and Clarivate Web of Science. these articles demonstrate the wide variety of FPGA-based applications, from navigation systems on Mars rovers to a new mechanism that allows the kilograms redefinition's magnetic suspension system. this paper provides a comprehensive overview of field-programmable gate arrays (FPGAs), taking readers on a journey from the basics to sophisticated programming techniques. No matter how much or how little experience you have with FPGA programming, this study will be an invaluable resource for filling in the gaps in your knowledge. Readers will have a solid grounding in essential topics including FPGA architecture, hardware description languages, and synthesis. the present work addresses critical subjects such as FPGA architecture, hardware description languages, and synthesis, thereby providing readers with a robust foundation. Furthermore, it boldly ventures into the domain of advanced topics, including high-level synthesis and parallel processing, amplifying its appeal to seasoned FPGA enthusiasts. It is unequivocally evident that this work serves as an indispensable resource, equipping individuals from diverse backgrounds with the proficiency to fully exploit the remarkable potential of FPGAs across a myriad of applications and industries. this study also provides an overview of the recent trends and evolution of the related applications. © 2024 Bharati Vidyapeeth, New Delhi.

关键词： advancement component FPDGs performance programming

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Peculiarities of Nanoscale α'-phase Precipitation in Fe-Cr-Al Alloys During thermal Treatment 14

Peculiarities of Nanoscale α'-phase Precipitation in Fe-Cr-...

引用

14th international conference Nanomaterials: applications & Properties

作者： Kharchenko, Vasyl Kharchenko, Dmitrii Lysenko, Borys Dvomichenko, AlMa Sumy State Univ Natl Acad Sci Ukraine Inst Appl Phys Sumy Ukraine Natl Acad Sci Ukraine Inst Appl Phys Sumy Ukraine Sumy State Univ Dept Appl Math & Modeling Complex Syst Sumy Ukraine

ISBN: (纸本)9798350380132;9798350380125

A generalized phase field model to simulate the dynamics of microstructural transformations in iron-based Fe-Cr-Al alloys, incorporating the dynamics of equilibrium point defects is developed. the study of the formation and growth processes of chromium-enriched precipitates of the a'phase during prolonged annealing of solid solution is provided. the impact of alloying element concentration and annealing temperature on the dynamic and statistical characteristics of the growing precipitates is examined. the scaling dynamics of the average precipitate size, their number, and the universality of their distribution over sizes are demonstrated.

关键词： phase field method numerical simulations precipitates statistical properties

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Gate-All-Around Silicon Nanowire field Effect Transistor Behavior at High Gate Voltages 14

Gate-All-Around Silicon Nanowire Field Effect Transistor Beh...

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14th international conference Nanomaterials: applications & Properties

作者： Nekovei, Reza Shiri, Daryoush Verma, Amit Texas A&M Univ Kingsville Dept Elect Engn & Comp Sci Kingsville TX 78363 USA Chalmers Univ Technol Dept Microtechnol & Nanosci S-41296 Gothenburg Sweden

ISBN: (纸本)9798350380132;9798350380125

this paper presents an observance of a novel phenomenon in gate-all-around field effect transistor (GAAFET) structures with a 1D active semiconducting channel. In this work, a small-diameter silicon nanowire is modeled, and its behavior is studied. the GAAFET device is modeled using an ensemble Monte Carlo (EMC) simulator in which the electrostatic potential landscape in the nanowire is solved self-consistently using the Gauss Law in integral form. the model captures an unexpected operation region. It is observed that after certain voltage values of gate-to-source voltage, V-gs, the device shows a negative differential resistance (NDR), with the current Ids decreasing while increasing V-gs.

关键词： cylindrical gate-all-around transistors field-effect-transistor silicon nanowire negative differential resistance electron-phonon scattering ensemble Monte Carlo

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Towards Nanosheet field Effect Transistors 14

Towards Nanosheet Field Effect Transistors

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14th international conference Nanomaterials: applications & Properties

作者： Benfdila, Arezki Djouder, Mohammed Lakhlef, Ahcene Mouloud Mammeri Univ Fac Elect Engn & Comp Sci Tizi Ouzou Algeria Abderahmane Mira Univ Fac Technol Bejaia Algeria

ISBN: (纸本)9798350380132;9798350380125

the present paper discusses the tendency of field Effect transistors (FETs) towards lower dimensional devices. they are drastically shrinking in size and tending to nano sheets form. this device shrinking is needed to remain in the More-than-Moore's Law era and go down in technology nodes smaller than 3 nm. the tendency started by FinFETs, then GAAFETs, followed by NanoFETs and now Nanosheet FETs. this evolution supposes the node value to be a true 3D node. the advantage of this technology change is to have a better field control and device ON/OFF performances aiming very low power consumption. Based on our simulation results, it has been found that nano sheet devices are likely to take over for the next decade(s) and reduce the technology nodes based on the verticality of the technology. It has been concluded that three/four nanosheets FETs are likely to be the dominant device in the near future.

关键词： 3D technology FinFET GAAFET nanosheet technology NanoFET Post CMOS technology

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Integration of a Trojan Detection Tool with BFDS: Enhancing field-programmable Gate Array Security 24

Integration of a Trojan Detection Tool with BFDS: Enhancing ...

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4th international conference on Artificial Intelligence, Automation and Algorithms

作者： Zhang, Yanlong Xiao, Ke Wang, Shuo Zhou, Jing Beijing Microelect Technol Inst Beijing Peoples R China

ISBN: (纸本)9798400717840

field-programmable gate arrays (FPGAs) have garnered considerable interest and utilization, largely owing to their inherent flexibility and customizability. In this context, electronic design automation (EDA) technology serves as an instrumental facilitator for FPGA applications. Nevertheless, the emergence of hardware Trojans (HTs) represents a major vulnerability in FPGA security. To mitigate the risks associated with hardware Trojans, a formula has been devised to compute the controllability and observability of each signal within logic units in look-up table (LUT) netlists. Subsequently, a security verification methodology aimed at HT detection within these LUT netlists has been developed and incorporated into the EDA tool, BFDS. Detailed procedural steps for HT detection, including interactions with the graphical user interface, are elucidated. the efficacy of this embedded HT detection tool is substantiated through experimental validation. the results from these experiments confirm the capacity of the tool to successfully identify Trojans at the LUT-level netlist while seamlessly integrating into EDA toolchains, thereby enhancing the security of future FPGA design endeavors.

关键词： hardware Trojan detection electronic design automation tool graphical user interface

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