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SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs

SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs

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international conference on field programmable logic and applications

作者： Geng Yang Yanyue Xie Zhong Jia Xue Sung-En Chang Yanyu Li Peiyan Dong Jie Lei Weiying Xie Yanzhi Wang Xue Lin Zhenman Fang Xidian University Simon Fraser University Northeastern University University of Technology Sydney

ISBN: (数字)9798331530075

ISBN: (纸本)9798331530082

this paper introduces SDA, the first effort to adapt the expensive stable diffusion (SD) model for edge FPGA deployment. First, we apply quantization-aware training to quantize its weights to 4 -bit and activations to 8 -bit ($W 4 A 8$) with a negligible accuracy loss. Based on that, we propose a high-performance hybrid systolic array (hybridSA) architecture that natively executes convolution and attention operators across varying quantization bit-widths (e.g., $W 4 A 8$ and all 8 -bit $Q K^{T} V$ in attention). To improve computational efficiency, hybridSA integrates diverse DSP packing techniques into hybrid weightstationary and output-stationary dataflows that are optimized for convolution and attention. It also supports flexible dataflow transitions to address the distinct demands of its output sequence by subsequent nonlinear operators. Moreover, we observe that nonlinear operators become the new performance bottleneck after the acceleration of convolution and attention, and offload them onto the FPGA as well. To reduce the latency of each nonlinear operator, we pipeline its own execution at a fine granularity. To minimize the resource utilization of nonlinear operators, we carefully balance their execution with hybridSA in a coarse-grained pipeline. Experimental results demonstrate that our low-bit ($W 4 A 8$) SDA accelerator on the embedded AMDXilinx ZCU102 FPGA achieves a speedup of $97.3 \times$ (which takes about $\mathrm{2 . 1}$ minutes for one SD inference), compared to the original SD-v1.5 model on the ARM Cortex-A53 CPU (which takes about 3.5 hours for one SD inference). Our SDA project is open sourced here: https://***/Michaela1224/SDA_code.

关键词： Training Quantization (signal) Convolution Pipelines Computer architecture Systolic arrays Computational efficiency Resource management logic field programmable gate arrays

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A Testbench for Stereo-Processing Acceleration Based on PYNQ and the StereoPi

A Testbench for Stereo-Processing Acceleration Based on PYNQ...

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IEEE international Workshop on Intelligent Data Acquisition and Advanced Computing Systems: Technology and applications

作者： John Kalomiros John Vourvoulakis Stavros Vologiannidis Dpt. of Computers Informatics and Telecommunications International Hellenic University Serres Greece

Stereo processing accelerators are often designed and implemented using field programmable logic. In this paper, a new setup for the implementation and practical testing of hardware stereo-processing solutions is presented. A PYNQ Z1 board featuring a Zynq SoC is combined with a low-cost StereoPi camera. It is shown that the system is versatile, since it can exploit the optimized OpenCV capabilities of the Raspberry Pi Compute Module for image pre-processing and the hardware acceleration capabilities of the programmable logic embedded in the Zynq chip. A series of experiments prove the feasibility of the concept. A state-of-the-art implementation of the SGM stereo algorithm in hardware description language is used in order to prove the feasibility of the design. the system can process depth maps with the nominal refresh rate of 60 fps, using stereo image resolution 640×480 and up to 96 levels of disparity.

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Negative Halotropism Expressed by 3-input-3-output Tomato Root Arithmetic-logic Gate 14

Negative Halotropism Expressed by 3-input-3-output Tomato Ro...

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14th IEEE international conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment, and Management, HNICEM 2022

作者： Concepcion, Ronnie Jahara Baun, Jonah Enriquez, Mike Louie Genevie Janairo, Adrian Gomez, Joshua Emmanuel Gemel Palconit, Maria Bandala, Argel Izzo, Luigi Gennaro Dadios, Elmer Culaba, Alvin De la Salle University Department of Manufacturing Engineering and Management Manila Philippines De la Salle University Department of Electronics and Computer Engineering Manila Philippines University of Alberta Department of Computing Science Edmonton Canada University of Naples Federico II Department of Agricultural Sciences Portici Italy De la Salle University Department of Mechanical Engineering Manila Philippines

ISBN: (纸本)9781665464932

Root foraging is affected by environmental stimuli that dictates its propagation vector. Multiple-root interaction has the potential to provide relevant information about asynchronous systems like the natural soil system. In this study, tomato root was used as the information producing element in three fabricated three-input-three-output negative chemotropism root logic gates: synchronized (rNHG1), and desynchronized (rNHG2 and rNHG3). Specific output channels in rNHG2 and rNHG3 were fertigated with highly acidic sodium chloride solutions (30 mM and 75 mM) and only one channel was enriched with control solution providing additional desynchronization in the system computing the logic functions of (x,y,z) = (y + z + x z) for rNHG1, (x,y,z) = (xy + xz,y + z + x z) for rNHG2, and (x,y, z) = ( xyz + x yz,y + z + x z) for rNHG3 where x, y, and z represent the presence of root in the output channel, whereas negated variables indicate the absence of root. Overall, root channels fertigated with control nutrients for all root logic gates resulted in the same Boolean function and negative halotropism not only repelled the growth direction of root, but it also reduced the radicle, xylem, and phloem diameters. As the root channels become more desynchronized, root fresh and dry weights decreased due to energy utilization in bending response. Here, it was proven that plant roots manifest computation and signaling based on repellant chemical. Hence, the developed root logic provides valuable information that can be extended in developing plant root-based robotic applications. © 2022 IEEE.

关键词： logic gates

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High Operating Frequency, Low-Power PFD for PLL applications

High Operating Frequency, Low-Power PFD for PLL Applications

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international conference on Computing and Networking Technology (ICCNT)

作者： Parul Trivedi B. B. Tiwari Department of Electronics Engineering U. N. S. Institute of Engineering and Technology V. B. S. Purvanchal University Jaunpur India

this research introduces a novel sequential type Phase-Frequency Detector (PFD) that is appropriate for low-power and high-frequency PLL applications. this PFD uses a modified True Single Phase Clock (TSPC) based DFF logic to make the above applications worthwhile. the simulation of the proposed PFD is done on cadence software using 90nm CMOS process. the proposed PFD's maximum power consumption is 471.71µW which is achieved at an operating frequency of 1GHz, which shows the efficiency of the designed PFD. the determined phase-noise value is - 140.28dBc/Hz@1MHz offset, which makes the proposed PFD ideal for low-noise PLL applications as well.

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Data Preprocessing For Machine Learning applications in Healthcare: A Review

Data Preprocessing For Machine Learning Applications in Heal...

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international conference on Intelligent Systems: theories and applications (SITA)

作者： Ismail Chahid Aissa Kerkour Elmiad Mohammed Badaoui Lari Laboratory Faculty of Science Mohammed First University Oujda Morocco

Data preprocessing plays a critical role in the success of machine learning and deep learning models in the medical and healthcare field. As the availability of healthcare data continues to grow, ensuring its quality, reliability, and suitability for machine learning tasks becomes essential. In this paper, we will try to provide an in-depth exploration of data preprocessing techniques specifically tailored to the medical and healthcare domain. We will cover various steps involved in data preprocessing, including data types, data cleaning, data transforming, and data normalization. Additionally, challenges and considerations unique to medical data preprocessing are discussed.

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the Road Less Traveled: Congestion-Aware NoC Placement and Packet Routing for FPGAs

The Road Less Traveled: Congestion-Aware NoC Placement and P...

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international conference on field programmable logic and applications

作者： Soheil Gholami Shahrouz Vaughn Betz Department of Electrical and Computer Engineering University of Toronto Toronto Canada

ISBN: (数字)9798331530075

ISBN: (纸本)9798331530082

To help scale to ever-larger and more complex designs, recent FPGA architectures now integrate network-on-chips (NoCs). NoCs help transfer high-bandwidth data over long distances within the chip without using scarce low-delay long routing wire segments. While NoC-enhanced FPGAs aid system integration and design reuse, they also complicate FPGA computer-aided design (CAD) flows by introducing new constraints and metrics. Placement and routing needs to optimize NoC metrics like latency and bandwidth utilization and avoid link oversubscription (congestion), while simultaneously optimizing the programmable routing resource usage of the design modules attached to NoC routers. In this work we develop several new approaches to reduce NoC congestion while minimizing the impact on other design metrics. First, we incorporate a NoC link congestion cost into the placement engine of the open-source CAD flow, versatile place & route (VPR). Second, we integrate turn model NoC routing algorithms into the placement engine to leverage path diversity to further reduce congestion. On average over a suite of 29 benchmarks combining placement congestion modeling with turn model packet routing reduces NoC congestion by 90.7% at the cost of increasing aggregate bandwidth demand by 4%. In cases where the enhanced placement engine and NoC routing fail to fully resolve congestion, we formulate NoC routing as a boolean satisfiability (SAT) problem. this approach yields significant additional improvements; the combined algorithm reduces congestion by 95.1% compared to the baseline placement. Finally, we enhance the reinforcement learning (RL) agent in VPR’s placement engine by introducing a NoC-aware move type, resulting in an 8.8% reduction in wirelength on designs that make extensive use of the NoC.

关键词： Measurement Solid modeling Costs Design automation Aggregates Bandwidth Routing Wire field programmable gate arrays Engines

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Full field Grain Size Prediction Considering Precipitates Evolution and Continuous Dynamic Recrystallization with DIGIMU® Solution 14th

Full Field Grain Size Prediction Considering Precipitates Ev...

引用

14th international conference on Technology of Plasticity, ICTP 2023

作者： De Micheli, Pascal Alvarado, K. Grand, V. Bernacki, M. Transvalor 950 Avenue Roumanille CS40237 Biot Sophia Antipolis06904 France UMR CNRS Sophia Antipolis06904 France Components Research Center Framatome Ugine73403 France

ISBN: (纸本)9783031413407

In the last ten years, full-field microstructural simulations have proven to be a very interesting tool to better understand and predict grain size evolution during industrial forming processes and heat treatments. Among the different solutions proposed in the literature, DIGIMU®, based on a level-set (LS) approach, has managed to gather several physical modules such as grain growth based on capillarity, dynamic, post-dynamic and static discontinuous recrystallization (ReX), as well as Smith-Zener pinning on second phase particles. this has permitted to carry out several accurate studies on nickel-based superalloys, austenitic stainless steels, and steels in the austenitic domain. However, until now, it was not possible to simulate the evolution of the precipitation state during the grain boundary (GB) network migration, and the ReX modeling was adapted to low stacking fault energy materials for which discontinuous nucleation events are predominant. this article illustrates very recent developments to simulate phenomenologically the second phase particles evolution. Two distinct populations can be considered, tracked by dedicated level-set functions, each one having its own evolution law. Furthermore, the development of the first full-field continuous dynamic recrystallization LS model, adapted to high stacking fault energy materials, is detailed. applications on these new developments for nickel and zirconium alloys are presented and analyzed. those two major developments enable DIGIMU® solution to go even deeper in the physics, to address accurately new materials presenting continuous dynamic recrystallization such as aluminum alloys, and new processes with temperatures close to the precipitates solvus. © 2024, the Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Grain growth

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Building an Educational Social Media Application for Higher Education 14th

Building an Educational Social Media Application for Higher ...

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14th international conference on Social Computing and Social Media (SCSM) Held as Part of the 24th international conference on Human-Computer Interaction (HCII)

作者： Weber, Felix Dettmer, Niklas Schurz, Katharina thelen, Tobias Osnabruck Univ Inst Cognit Sci Wachsble 27 Osnabruck Germany Osnabruck Univ Ctr Digital Teaching Campus Management & Higher Educ Didact VirtUOS Osnabruck Germany

ISBN: (纸本)9783031050640;9783031050633

In this paper, we present an overview of an ongoing field study by the Siddata (Studienindividualisierung durch Digitale Datengestuetzte Assistenten [Joint project for Individualization of Studies through Digital, Data-Driven Assistants]) joint research project at the Universities of Bremen, Hannover, and Osnabruck in Northern Germany, with a digital data-driven study assistant (DSA), integrated into the local learning management system (LMS). Some of the included functions, especially those combining data from LMS, OER repositories, and user data with recommendation algorithms, are similar to functions of social media applications. Based on these similarities, we introduce the idea of educational social media applications (edSMA), which implement social media functions for educational purposes. Since 2018, four prototypes (P0, P1, P2, P3) have been developed, deployed, and tested in annual software development cycles. We overview the general user interaction schema, prototype, lifetimes, usage statistics, and features. A remarkable finding is a high demand for digital assistance in the early stages of the student life cycle. For any student differing from the default student, implicitly assumed by education systems, recommender systems can make less frequent educational opportunities accessible and consequently individualize educational pathways and increase equality. We conclude with an outlook on planned developments in the future, such as making the Siddata study assistant available for a broader range of students.

关键词： Educational Social Media applications (edSMA) Digital Study Assistants (DSA) Artificial intelligence Higher education Innovative education technologies Learning Management Systems (LMS)

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SERI: High-throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry using HBM-based FPGAs

SERI: High-Throughput Streaming Acceleration of Electron Rep...

引用

international conference on field programmable logic and applications

作者： Philip Stachura Guanyu Li Xin Wu Christian Plessl Zhenman Fang Simon Fraser University Burnaby BC Canada Paderborn Center for Parallel Computing Department of Computer Science Paderborn University Warburger Str. 100 Paderborn Germany

ISBN: (数字)9798331530075

ISBN: (纸本)9798331530082

the computation of electron repulsion integrals (ERIs) is a key component for quantum chemical methods. the intensive computation and bandwidth demand for ERI evaluation presents a significant challenge for quantum-mechanics-based atomistic simulations with hybrid density functional theory: due to the tens of trillions of ERI computations in each time step, practical applications are usually limited to thousands of atoms. In this work, we propose SERI, a high-throughput streaming accelerator for ERI computation on HBM-based FPGAs. In contrast to prior buffer-based designs, SERI proposes a novel streaming architecture to address the on-chip buffer limitation and the floorplanning challenge, and leverages the high-bandwidth memory to overcome the bandwidth bottleneck in prior designs. Moreover, to meet the varying computation, bandwidth, and floorplanning requirements between the 55 canonical quartet classes in ERI calculation, we design an automation tool, together with an accurate performance model, to automatically customize the architecture and floorplanning strategy for each canonical quartet class to maximize their throughput. Our performance evaluation on the AMD/Xilinx Alveo U280 FPGA board shows that, SERI achieves an average speedup of 9.80 x over the previous best-performing FPGA design, a 3.21x speedup over a 64-core AMD EPYC 7713 CPU, and a 15.64x speedup over an Nvidia A40 GPU. It reaches a peak throughput of 23.8 GERIS ($10^{9}$ ERIs per second) on one Alveo U280 FPGA. SERI will be released soon at https://***/SFU-HiAccel/SERI.

关键词： Performance evaluation Computational modeling Quantum chemistry Quantum mechanics Bandwidth Computer architecture throughput System-on-chip field programmable gate arrays Electrons

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Analysis of Magnetohydrodynamic Behavior of the Flow of Conductive Fluid in Pipes for Industrial applications 14

Analysis of Magnetohydrodynamic Behavior of the Flow of Cond...

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14th IEEE international conference on Industry applications (INDUSCON)

作者： Fonseca, Wellington da Silva Araujo, Ramon C. F. de Oliveira e Silva, Marcelo Cruz, Daniel Onofre de A. Fed Univ Para Mech Engn Grad Program Belem Para Brazil Univ Fed Rio de Janeiro Mech Engn Grad Program Rio De Janeiro RJ Brazil

ISBN: (纸本)9781665441186

Important industrial applications are based on magnetohydrodynamics (MHD), which concerns the flow of electrically conducting fluids immersed in external magnetic fields. In this work, it is performed a 3D numerical analysis of the behavior of a laminar and fully developed flow of a conducting fluid in a duct. Finite Volume Method was used for numerical calculations. Along the initial section of the duct, there are magnets placed around the duct producing magnetic fields in the radial direction. Varying the orientation and intensity of the magnetic fields, two effects are considered: the influence of magnetic field intensity on flow velocity and magnetic field induction due to flow velocity. the analysis is performed at different points along the duct, covering both regions with and without magnets. It was found that the mentioned effects are significant for a particular arrangement of magnets, and for high magnetic fields.

关键词： Magnetohydrodynamics Laminar Flow Finite Volume Method

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