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检索条件"任意字段=14th International Conference on Field-Programmable Logic and Applications"

共 3172 条记录，以下是261-270 订阅

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FPGA Implementation of Flexible Architecture for Image Processing

FPGA Implementation of Flexible Architecture for Image Proce...

引用

Telecommunications and Intelligent Systems (ICTIS), international conference on

作者： Benhaoues Atef Rabehi Abdelhalim Souahlia Abdelkerim Yacine Djeghader Laboratory of Research on Electromechanical and Dependability University of Souk Ahras Souk-Ahras Algeria Telecommunications and Smart Systems Laboratory Faculte of Siences and Technologies Ziane Achour University of Djelfa The Laboratory of Research on Electromechanical and Dependability University of Souk Ahras Souk-Ahras Algeria

ISBN: (数字)9798331527396

ISBN: (纸本)9798331527402

this paper presents an innovative dual-mode architecture for DCT and Sobel edge detection, optimized to require only 14 additions. the scalable architecture supports larger word lengths and was successfully implemented on a Xilinx Virtex-V FPGA using VHDL. the implementation demonstrates significant advantages, including reduced FPGA logic area comparable architectures, all at a higher clock frequency. the design shows strong potential for scalability and integration with similar modules. Overall, the proposed architecture enhances both performance and complexity, offering a robust solution for real-time image encoding and edge detection applications.

关键词： Technological innovation VHDL Image edge detection Scalability Real-time systems Telecommunications Discrete cosine transforms logic field programmable gate arrays Clocks

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Topic Identification and Content Analysis of Functional Electrical Stimulation in Rehabilitation Based on BERTopic Model 14th

Topic Identification and Content Analysis of Functional Elec...

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14th international conference on Computer Engineering and Networks, CENet 2024

作者： Yang, Ping Zhu, Shiwei Zhao, Yanqing Chen, Zeyu Yu, Junfeng Li, Sisi Wei, Moji Yan, Yan Qilu University of Technology (Shandong Academy of Sciences) Shandong Jinan 250300 China China Academy of Industrial Internet Beijing 100015 China Shandong Innovation and Entrepreneurship Community for International Science and Technology Cooperation Shandong Jinan 250000 China

ISBN: (纸本)9789819642281

With the aging of the population and the improvement of the quality of life, people are demanding more and more rehabilitation equipment. Functional electrical stimulation (FES), as an important technology in the field of rehabilitation, has become one of the research hotspots. In order to systematically sort out and analyze the current research status and development trend of FES in the field of rehabilitation, this paper uses the BERTopic model to analyze the themes and explore the trends of 687 research papers on FES published in the Web of Science database during 2014–2023. the results show that, despite the overall decreasing trend in the number of relevant papers published in the last decade, the application of FES technology in the field of rehabilitation has gradually matured, and the focus of research has moved from extensive exploration to professional focus. It is also developing towards intelligent and multifunctional applications, especially for personalized rehabilitation programs and rehabilitation of special populations, FES has demonstrated significant clinical effects and the ability to improve patient experience. this study aims to provide the relevant staff in the field with the current research status and development trend of FES in rehabilitation, to help discover the research direction that tends to be saturated, and to provide lessons and references for future research. © the Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Bibliometric FES theme research

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Concepts Encoding via Knowledge-guided Self-attention Networks 14

Concepts Encoding via Knowledge-guided Self-attention Networ...

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14th international conference on Digital Image Processing, ICDIP 2022

作者： Geng, Kunnan Li, Xin Zhang, Wenyao School of Computer Science Beijing Institute of Technology Beijing China

ISBN: (纸本)9781510657564

With the growth of digital data created by us, a large number of deep learning models have been proposed for data mining. Representation learning offers an exciting avenue to address data mining demands by embedding data into feature space. In the healthcare field, most existing methods are proposed to mine electronic health records (EHR) data by learning medical concept representations. Despite the vigorous development of this field, we find the contextual information of medical concepts has always been overlooked, which is important to represent these concepts. Given these limitations, we design a novel medical concept representation method, which is equipped with a self-attention mechanism to learn contextual representation from EHR data and prior knowledge. Extensive experiments on medication recommendation tasks verify the designed modules are consistently beneficial to model performance. © 2022 SPIE.

关键词： Medical applications

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Optimum Quasi-Optical System Synthesis With Enhanced Depth-of-field for Cross-Range Refocusing Terahertz Defog Camera 14

Optimum Quasi-Optical System Synthesis With Enhanced Depth-o...

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14th international conference on Microwave and Millimeter Wave Technology (ICMMT)

作者： Song, Qian Wang, Pengcheng Wang, Nannan Qiu, Jinghui Harbin Inst Technol Sch Elect & Informat Engn Harbin 150001 Peoples R China

ISBN: (纸本)9781665467520

A complex offset double-reflector configuration for focal-plane array (FPA) is presented, optimized for high-resolution indoor imaging applications. the proposed quasi-optical system utilizes a compact ellipsoidal Dragonian geometry due to its uniform scanning performance with a broad range of +/- 10 degrees field-of-view (FoV). Fourteen beams can be scanned before reaching the 3dB scan loss limit;therefore, the number of active elements in the array increases, resulting in a higher EIRP. We demonstrate the design equivalence between a paraboloidal main reflector and an ellipsoidal one. the enhanced depth-of-field is obtained through generating a quasi-non-diffractive Bessel beam by an axicon. the system can scan the beam over 0.5 m in cross-range at a standoff range with less than a 3% increase of the half-power beam-width. A demonstrator was fabricated, and the defog experimental results confirm the predicted performance.

关键词： Passive imager terahertz quasi-optical system focal plane array defog camera

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FPGA Based Military Vehicle Classification from Drone-Based Video Using Deep Learning

FPGA Based Military Vehicle Classification from Drone-Based ...

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international conference on Frontiers of Signal Processing (ICFSP)

作者： S Vasavi D Sree Sowmya Ch Aishwarya Wendy Flores Fuentes Computer Science & Enigneering Velagapudi Ramakrishna Siddhartha Engineering College Vijayawada India Engineering Institute Autonomous University of Baja California Mexico

ISBN: (数字)9798350353235

ISBN: (纸本)9798350353242

Remotely controlled aerial vehicles such as drones are used for military applications such as surveillance, intelligence and target acquisition. Real-time object detection and classification is one of the most recurrent tasks for drones. the proposed system is used to classify the military vehicles from the drone-based videos. Object segmentation and classification of military vehicles (military tanks and APCs) is done using the Detectron2 and is based on Mask-RCNN benchmark. A custom dataset consisting of 300 images of Military Tanks and Armored Personnel Carriers (APCs) has been created and annotated for the purpose of the project. Furthermore, the Mask RCNN (Resnet50+FPN) model is trained with the custom dataset to classify the vehicles. the trained model is integrated in to field programmable Gate Arrays (FPGA), to carry out onboard classification in a real-time manner. Performance measures are used to evaluate the proposed model and overall accuracy is 93% with reduced false positive rate.

关键词： Array signal processing Surveillance Military vehicles logic gates Real-time systems Personnel field programmable gate arrays Videos Drones Remotely piloted aircraft

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Design and Development of Readout Electronics for thermopile Array Detector Using FPGA

Design and Development of Readout Electronics for Thermopile...

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international conference on Circuits, Communication, Control and Computing

作者： Rashmi Priyadarshini B K Rajendra Prasad P Mrinal Sarvagya Banothu Naresh Ravi Kumar M G School of Electronics and Communication Engineering REVA University Bangalore India Department of Electronics and Communication Engineering Ramaiah Institute of Technology Bangalore India Laboratory for Electro Optics Systems (LEOS) Indian Space Research Organization (ISRO) Bangalore India Department of Electronics and Communication Engineering & Technology Nagarjuna College of Engineering Bangalore India

ISBN: (数字)9798331528539

ISBN: (纸本)9798331528546

thermopile detector arrays, integral to infrared sensors, find widespread application in temperature measurement and thermal imaging. this paper introduces a novel approach by designing dedicated readout electronics for thermopile detectors, aiming at their characterization for space applications, specifically in a safe mode earth sensor. the proposed system employs a reprogrammable field programmable Gate Array (FPGA) for implementing the readout electronics, encompassing tasks such as extracting raw pixel data from the detector and configuring the sensor for different parameter settings. the safe mode earth sensor, crucial for spacecraft attitude determination, provides 2-axes attitude referencing Earth in the pitch and roll axes. Leveraging thermopile-based earth sensors, the system detects Earth edges in the IR band, facilitating the calculation of roll and pitch angles. the compact design makes it particularly suitable for deployment in Micro-Satellites and other satellites as a safe mode sensor. the readout electronics and data acquisition system play a pivotal role in evaluating, characterizing, and screening thermopile detectors, ensuring their suitability for deployment in safe mode earth sensor applications. this integrated approach not only enhances the efficiency of thermopile detectors but also opens avenues for their broader application in space-based sensing systems.

关键词： Earth Space vehicles Data acquisition Detectors Position measurement logic design logic Readout electronics field programmable gate arrays Sensor arrays

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Fuel Control Unit test bench modernization using LabVIEW 14

Fuel Control Unit test bench modernization using LabVIEW

引用

14th IEEE international conference on Industry applications, INDUSCON 2021

作者： Campo, Alexandre B. Ribeiro, David R.G. Santos, Gilliver O. Zirnberger, Tommy L. Almeida, Victor Manuel A. Departamento de Elétrica Instituto Federal de Educação Ciência e Tecnologia de São Paulo São Paulo Brazil Parque de Material Aeronáutico de São Paulo Força Aérea Brasileira São Paulo Brazil

ISBN: (纸本)9781665441186

A fundamental step in maintaining the Brazilian Air Forces' jets is the testing of engine components. One of these components, the Fuel Control Unit, is one of the most complex, with pressure, rotation and flow variables that need to be controlled and measured to verify if the unit is functioning correctly. the test procedures are composed of a large number of steps, each of them with different values for the variables. the manual execution of the procedures is slow and unreliable, due to parallax and human error. Implementing the automation system presented in this paper eliminates the reliability problems and significantly reduces testing time, with the system controlling and logging the variables. the pressure valves are controlled by brushless DC motors, which in turn are controlled by PWM signals generated by discrete control loops programmed into a FPGA. © 2021 IEEE

关键词： field programmable gate arrays (FPGA)

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Triple-Output current-mode on-chip Filter Design and Analysis for VHF-band applications

Triple-Output current-mode on-chip Filter Design and Analysi...

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international conference on Computing and Networking Technology (ICCNT)

作者： Rajani Maurya Siddharth Srivastava Neelam Srivastava Electronics and Communication Department Institute of Engineering and Technology Lucknow India

Continuing the research and analysis in the field of analog filter designing, researchers have reached a place where robust miniaturized integrated circuits are of utmost demand in the area of wireless communication. RF communication requires all types of filter action and in lieu of that, a novel current-mode 11 MOSFET-based triple-output filter circuit is designed to provide band-pass, high-pass, and low-pass output for a sine wave of amplitude 20 μA and a frequency of 60 MHz. AC and transient analysis are carried out to show the filter circuit’s behavior. the operating frequency is in the range of a few tens of MHz, which covers sophisticated applications such as weather broadcast, aviation, AM radio and navigation, and VHF television.

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16 Bit Memory and Power Efficient Truncated Booth Multiplier For High Speed applications/Operations

16 Bit Memory and Power Efficient Truncated Booth Multiplier...

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Mobile Computing and Sustainable Informatics (ICMCSI), international conference on

作者： Yashu Swami T. Senthil Vadivel Department of ECE MRIIRS Faridabad Haryana India Civil Engineering Department MRIIRS Faridabad Haryana India

ISBN: (数字)9798331522667

ISBN: (纸本)9798331522674

We now know that multipliers are a necessary component of all basic circuits. these days, multipliers are the cornerstone of any ALU system. High Radix Booth encoding reduces unfinished product during multiplication, but multipliers also introduce delay and power due to hard multiples. the approximate radix-256 Booth encoding is recommended in order to prevent hard multiples. By shifting and complimenting, a partial encoding method is used to construct partial product pairings. Precise encoding values are determined by adding up matching partial products. For performance testing, a 16x16 bit multiplier with the recommended radix-256 Booth encoding was built. Implementation of a 16-bit Truncated Booth Multiplier on the Nexys 4 DDR FPGA board. and contrast with additional multipliers.

关键词： Memory management Circuits Encoding Delays logic Informatics Mobile computing field programmable gate arrays Testing Arithmetic

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Scalable Convolutional Neural Network Inference on-the-Edge using Low-Density FPGAs

Scalable Convolutional Neural Network Inference on-the-Edge ...

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Advanced Research in Computing (ICARC), international conference on

作者： Udara Ranabahu S A Suraweera Arachchige W A Susantha Wijesinghe School of Engineering Liverpool John Moores University Liverpool United Kingdom Faculty of Applied Sciences Wayamba University of Sri Lanka Kuliyapitiya Sri Lanka

ISBN: (数字)9798331530983

ISBN: (纸本)9798331530990

Machine learning (ML) inference-based applications are often considered to be computationally expensive and power exhaustive, restricting useful deployment in low-power use cases. To take advantage of ML in power-constrained edge environments, it is critical to reduce the power consumption and increase the overall efficiency, while aiming for performance *** present a characteristics study of a low-powered implementation of ML inference focused on-the-edge, aiming for increased efficiency and predictive cost estimation. A scalable inference accelerator architecture for Convolutional Neural Networks (CNNs) consisting of simple functional blocks was developed at Register-transfer Level (RTL) using Verilog® Hardware Description Language (HDL), and was verified at RTL-level verification using RTL testbenches. the integrated system went through functional verification against a predefined golden model, while being optimized for precision and logic *** accelerator was then converted into a fully-parameterized Reconfigurable FPGA IP with additional purpose-built custom debugging glue logic; and validated on FPGA hardware. the system showed a minimum of 740 times acceleration factor during recorded performance evaluations.

关键词： Maximum likelihood estimation Costs Hardware Silicon Convolutional neural networks IP networks logic Resource management Hardware design languages field programmable gate arrays

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