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An Efficient Clock Gated RSFQ Matrix Multiplier through FPGA Implementation 9

An Efficient Clock Gated RSFQ Matrix Multiplier through FPGA...

引用

9th international conference on Advanced Computing and Communication Systems, ICACCS 2023

作者： Kaarthik, K. Vivek, C. Sivaranjani, S. M. Kumarasamy College of Engineering Karur India Sri Eshwar College of Engineering Coimbatore India

ISBN: (纸本)9798350397376

Multiplier are one of the indispensible component in Arithmetic and logic Unit. Many applications for image and signal processing use matrix multiplication as their core operation. In order to speed up current solutions and adhere to real-time limitations. the proposed system depicts, the field programmable Gate Array features a clock-gated matrix multiplier. the clock-gating approach is used to impact a large number of bit-slicing multipliers in the suggested multiplier. the major goal of this clock-gating technology is to increase performance and decrease power consumption. this suggested multiplier's output bits be restricted to 16 bits. the fundamental gates like XOR,AND, D-flip flops and complete adders are used to create the multiplier that is being given. the multiplier design that is suggested is put into practise using the Altera Quartus II supporting *** CMOS uses two distinct technologies., such as 65nm and 90nm, are taken into consideration when developing the multiplier. Similar to this, the designing methodologies use two separate FPGA devices, Cyclone and Stratix. By testing the metrics such as delay, area and power, the proposed design is assessed. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

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Towards a Time-Dependent Approach for User Privacy Expression and Enforcement 1

引用

14th IFIP WG 11.2 international conference on Information Security theory and Practice (WISTP)

作者： Tamani, Nouredine Inst Super Elect Paris ISEP 10 Rue Vanves F-91230 Issy Les Moulineaux France

ISBN: (数字)9783031603914

ISBN: (纸本)9783031603907;9783031603914

Achieving user privacy is a challenging task in the era of ubiquitous internet and mobile applications where users' data and activities can be tracked days and nights, by the myriads of applications installed on smartphones, watches, TV, and appliances. the need for a practical, easy to use, and most of all expressive tools to express and enforce privacy rules is still insistent nowadays. Even though the law enforces in many regions of the world the user data protection as a legal principle, still mobile apps and web applications and plugins lack of a steady process that allows users to express, validate and verify their privacy rules when they are interacting with a given application. We introduce in this paper a new approach, which combines both non monotonic logics with the Linear temporal logic (LTL) to define and interpret time-constrained logical predicates used to define data sharing functions based on time such as Periodic Blocking, Time prohibition, and Data shelf life. this paper is a first step towards a time-dependent knowledge base system for privacy rule expression and enforcement.

关键词： User Data Protection Privacy and Security Linear Temporal logic Existential Rules IoT trustworthiness

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Review of Dental Diagnosis by Deep Learning Models: Trends, applications and Challenges 14

Review of Dental Diagnosis by Deep Learning Models: Trends, ...

引用

14th international conference on Emerging Ubiquitous Systems and Pervasive Networks / 13th international conference on Current and Future Trends of Information and Communication Technologies in Healthcare, EUSPN/ICth 2023

作者： Bouali, Rime Mahboub, Oussama Lazaar, Mohamed ENSA Abdemalek Essaadi University in Tetouan Morocco ENSIAS Mohammed V University in Rabat Morocco

Recently, deep learning (DL) has become increasingly important in the field of image processing, and its application in dental radiology has become particularly relevant. DL-based image recognition has become a key component of image interpretation in dental radiology, making it possible to automate diagnosis and treatment planning. these techniques can be applied to areas such as caries, tooth detection, periodontal disease, oral lesions, age determination, gender estimation, and osteoporosis. In addition, recent studies have shown that DL algorithms in these areas have high accuracy, with some studies achieving accuracy rates of over 90%. Such high accuracy can significantly improve the efficiency and accuracy of dental diagnostics and treatment planning. thus, using DL in dental imaging may become an everyday tool in dentistry with the current advances in applications. In this paper, recent applications and potential challenges of using deep convolutional neural network architectures in dental image analysis will be reviewed. © 2024 Elsevier B.V.. All rights reserved.

关键词： Convolutional neural networks

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A Deep Exposition of Data Science: Related Issues and its applications 14

A Deep Exposition of Data Science: Related Issues and its Ap...

引用

14th international conference on Advances in Computing, Control, and Telecommunication Technologies, ACT 2023

作者： Azahad, Syed Vennam, Venkatram Krishnamurty, M.V.D.S. Department of Computer Science Engineering MCET Telangana Hyderabad India

Data science is the study of extracting, collecting, gathering, representing, and safeguarding data for use in technical problems or for business goals. Although the term "Data Science" may seem to refer to databases and software engineering, numerous other quantitative and qualitative skills, including non-mathematical skills, are also necessary. Information dissection is the main goal of data science. this essay provides an explanation of what data science is, how it works, and some possible applications. this essay's second section contains several reviews of data science. the full data science method is illustrated in Section III of this essay. the data science-related research topics are all described in Section IV. the report concludes with several recommendations for data science-related future research. the writers of the current study will make an effort to look at the various problems, execution, and challenges in the field of data science. © Grenze Scientific Society, 2023.

关键词： Software engineering

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High-Performance SET Hardening Technique for Vision-Oriented applications 19

High-Performance SET Hardening Technique for Vision-Oriented...

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19th international conference on Synthesis, Modeling, Analysis and Simulation Methods, and applications to Circuit Design, SMACD 2023

作者： De Sio, Corrado Sterpone, Luca Politecnico di Torino Dipartimento di Automatica e Informatica Turin Italy

ISBN: (纸本)9798350332650

the decreasing feature size of VLSI circuits has led to a rise in Single Event Transients (SETs), making them the dominant cause of errors in modern VLSI devices, especially Flash-based FPGAs. the combinational logic in these devices is particularly vulnerable to SETs, making efficient SET hardening techniques essential. Given the demanding performance requirements for vision-oriented benchmarks, finding an efficient hardening technique that does not exceed area and performance limitations is challenging. this paper presents a SET hardening workflow based on an accurate SET analysis aimed at identifying vulnerable circuit nodes for selectively applying hardening techniques to Microchip RTG4 radiation-hardened Flash-based FPGAs. Results from experiments comparing plain, Global hardening, and proposed selective hardening techniques show the high efficiency of the proposed solution. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

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Collaborative Electromechanical Engineering: A Concept to Overcome Domain- and IT-System Borders 14

Collaborative Electromechanical Engineering: A Concept to Ov...

引用

14th international Electric Drives Production conference, EDPC 2024

作者： Urban, Nikolaus Vogel, Constantin Brunner, thomas Gansauge, Ludwig Deggendorf Institute of Technology Faculty for Applied Natural Sciences and Industrial Engineering Deggendorf Germany ti4f GmbH Regensburg Germany

ISBN: (纸本)9798350356885

the product development process for new electric motors necessitates close collaboration between the domains of electrical and mechanical engineering. Starting from the customer specification, requirements must be translated into a three-dimensional design that aligns with manufacturing capabilities while considering the economic aspects of the overall project. As a multidimensional optimization problem involving multiple engineering disciplines, a systematic and efficient collaboration focused on customer value becomes the critical success factor. Current practices involve spatially close collaboration among project stakeholders, including electrical designers, mechanical engineers, manufacturing experts, procurement, logistics, sales, project- and product-management. Information exchange predominantly occurs synchronously through meetings or asynchronously via drawings or text-based documents. However, due to specialized IT applications and data formats in each domain, like electro-magnetic finite-element simulations or 3D-CAD-design, achieving systematic data and information continuity remains challenging. Consequently, information loss at domain boundaries becomes nearly unavoidable. We present a concept that systematically utilizes color coding within 3D-CAD environment to achieve both visually accessible and technically precise representation of product-and manufacturing-related information across domain borders. By uniquely associating motor components or component regions with relevant features, standardization of product and manufacturing properties becomes feasible. these standardized features can then be automatically processed throughout the subsequent process chain. the RGB color space provides ample combinations suitable for the design and manufacturing of electric motors, associated suppliers and even beyond. the concept derived can be seen as a starting point for knowledge management within organizations, inter-company collaboration based on standard

关键词： Computer aided logic design

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An End-To-End Programming Model for AI Engine Architectures 14

An End-To-End Programming Model for AI Engine Architectures

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14th international Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2024

作者： Levental, Maksim Khan, Arham Chard, Ryan Chard, Kyle Neuendorffer, Stephen Foster, Ian University of Chicago United States Argonne National Laboratory United States AMD United States

ISBN: (纸本)9798400717277

Coarse-Grained Reconfigurable Architectures (CGRAs) are becoming a promising alternative to conventional computing architectures such as CPUs, GPUs, and FPGAs when energy efficiency and high performance are required. Like CPUs and GPUs, CGRAs have processing elements (PEs) that can perform complex operations, such as vectorized arithmetic, and like FPGAs, they support a reconfigurable topology of components. Because of their coarser grain reconfigurability, they are less challenging to program than FPGAs but more challenging than CPUs and GPUs. this paper presents an end-To-end programming model for AMD AI Engine CGRAs, which enables programming simultaneously at a high level and a very implementation-specific level, all in the same language, all in the same "flow". Our programming model allows users to specify, implement, and test on-device, enabling the productive design of dataflow programs for streaming applications. the programming model is open source and includes a language frontend (Python eDSL), an MLIR based compiler, export paths to target codegen compilers, and runtime infrastructure. We show that our approach to language and compiler design enables users to program with much less friction and ceremony while preserving access to all features and device APIs necessary for achieving performance competitive with existing AI Engine programming models. © 2024 Owner/Author.

关键词： field programmable gate arrays (FPGA)

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Polarization Modulation in PVDF During the Electric field Rising and Falling Runs 14

Polarization Modulation in PVDF During the Electric Field Ri...

引用

14th international conference on the Properties and applications of Dielectric Materials, ICPADM 2024

作者： Xu, Fan Wang, Feipeng Yan, Sicheng Wang, Yu School of Electrical Engineering Chongqing University State Key Laboratory of Power Transmission Equipment Technology Chongqing City400044 China

ISBN: (纸本)9798350374605

Polyvinylidene difluoride (PVDF) is a hot research topic material in the field of energy storage and conversion due to its high polarization response. However, the mechanism of the behavior of VDF dipoles under varying electric field stresses is still not well understood. Here, effect of amplitude variation of sinusoidal electric field on the dipole reorientation behavior is studied by polarization-electric field (P-E) hysteresis loops. Experimental results suggest that when the applied electric field amplitude goes from high to low, the intense reorientation at high field strengths expands the intermolecular spacing, resulting in a reduced hindrance to dipole reorientation at low field strengths, and thus increasing the polarization intensity. At 160 MV/m sinusoidal electric field, the maximum polarization intensity (Pmax) is increased from 4.68 to 5.32 μ C/cm2 during the fall amplitude process compared to the rise amplitude process, resulting in a 20% increase in energy consumption. these findings not only deepen our understanding of the behavior mechanism of VDF dipoles but also provide useful guidance for regulating the properties of PVDF-based films. © 2024 IEEE.

关键词： Hysteresis

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the Response of Natural Esters when Being Under a Direct Current Electric field for a Long Time 14

The Response of Natural Esters when Being Under a Direct Cur...

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14th international conference on the Properties and applications of Dielectric Materials, ICPADM 2024

作者： thungsook, Kittisak Manger, Rene Zink, Markus H. Kobus, Maja Pattanadech, Norasage Rajamangala University of Technology Rattanakosin Faculty of Engineering Electrical Engineering Dept. Nakhon Pathom Thailand Institute for Power Engineering and High Voltage Technology Technical University of Applied Sciences Würzburg-Schweinfurt Schweinfurt Germany Technical University of Applied Sciences Würzburg-Schweinfurt Faculty of Applied Natural Sciences and Humanities Schweinfurt Germany School of Engineering King Mongkut's Institute of Technology Ladkrabang Electrical Engineering Dept. Bangkok Thailand

ISBN: (纸本)9798350374605

this study examines the dielectric behavior of natural esters exposed to a DC electric field over an extended period of time. the dielectric response was investigated by using polarization and depolarization current measurements. the natural ester sample was subjected to a DC electric field of 0.1 kV/mm, 0.5 kV/mm, 1 kV/mm, 1.5 kV/mm, and 2 kV/mm, respectively. Besides, the moisture content of natural esters was also controlled using a natural method. the test results showed that after being exposed to an electric field for an extended period of time of the natural ester, different forms of charge accumulation might be found partly depending on the initial condition of the investigated natural ester. © 2024 IEEE.

关键词： Fatty acid methyl ester

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A Novel FPGA HW Implementation for SVPWM Technique Using Taylor Series 14

A Novel FPGA HW Implementation for SVPWM Technique Using Tay...

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14th international Symposium on Industrial Electronics and applications, INDEL 2022

作者： Donisi, Andrea Di Benedetto, Luigi Liguori, Rosalba Licciardo, Gian Domenico Rubino, Alfredo University of Salerno Dept. of Industrial Engineering SA Fisciano Italy

ISBN: (数字)9781665471879

ISBN: (纸本)9781665471879

In this paper we propose a novel Hardware implementation to perform Space Vector Pulse Width Modulation. Starting from the Taylor Series representation of the dwell-time equations for SVPWM technique and by managing opportunely the hardware resources of the digital controller, we obtained a novel hardware architecture of SVPWM technique that, unlike other the-state-of-art methods, avoids CORDIC core or Look Up Table-based approaches as well as further resources like Digital Signal Processor or external reference signals. the core of the architecture is an Arithmetic logic Unit, which periodically perform all the calculation needed to obtain the value of the dwell-times, and permits to change in real time the output *** architecture is been implemented on an Xilinx Artix VII FPGA XC7A35T1CPG236C requiring 1973 LUTs and 501 Flip Flops, respectively the 9.49% and 1.2% of the overall resource, and a dynamic power consumption of 1.04 mW. © 2022 IEEE.

关键词： field programmable gate arrays (FPGA)

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