p2p systems have witnessed phenomenal development in recent years, evaluating and analysing new and existing new algorithms and techniques is a key issue for developers of p2p systems. In this context Simulation is an...
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ISBN:
(纸本)9780769530895
p2p systems have witnessed phenomenal development in recent years, evaluating and analysing new and existing new algorithms and techniques is a key issue for developers of p2p systems. In this context Simulation is an important tool for p2p developers. However, such systems are often very large and few existing simulators offer the ability to execute systems of real world size. In this paper we present a tool for executing large scale simulation of p2p systems which scale effectively, only limited by the amount of computational resource available (memory and CPU). this is achieved through the application of parallel discrete event simulation techniques to an existing, already scalable simulator PeerSim. We show results from a case study using the Chord p2p protocol, indicating good scalability both in terms of size (memory) and execution time (CPU).
Energy-efficiency is becoming one of the most critical issues in embedded system design. In network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consumption is influenced dramatically by task a...
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ISBN:
(纸本)9780769543284
Energy-efficiency is becoming one of the most critical issues in embedded system design. In network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consumption is influenced dramatically by task allocation schemes. Although various approaches are proposed to allocate tasks in an energy-efficient way, existing work does not well explore the tradeoff between the two major power consumers, namely the processors and network links, resulting in suboptimal mappings from a system point of view. In this paper, we first extend the existing Integer Linear Programming (ILP) formulation to take bothprocessing and communication energy into account. thereafter, we propose a Simulated Annealing with Timing Adjustment (SA-TA) heuristic to accelerate the optimization process. While the SA-TA algorithm achieves performance very close to the global optimum, significant improvement in computation speed is observed.
High performance computing (HPC) is becoming mandatory for the simulation of complex and realistic neuronal models. the development of such realistic models will allow to discover innovative therapies and to study bra...
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ISBN:
(纸本)9781728116440
High performance computing (HPC) is becoming mandatory for the simulation of complex and realistic neuronal models. the development of such realistic models will allow to discover innovative therapies and to study brain diseases without undertaking invasive experiments that are not always possible. However, the models complexity requires adopting suitable technologies in order to provide results in short times, hopefully in real-time. To address this issue, the authors decided to exploit Graphics processing Units (GPUs) in order to develop a realistic and morphologically detailed Purkinje cell model. this paper describes the simulation of the Purkinje cell activity adopting both single and multi-GPU strategy, together withthe exploitation of different NVIDIA architectures. Results shows that the simulation times of 10000 cells is reduced from 13 days and 18 hours to about 2 hours.
the paper considers an integrated proactive framework for defense against spreading network worms in the Internet. the framework is intended for network worm detection (by recognizing the actions on scanning of networ...
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ISBN:
(纸本)9780769535449
the paper considers an integrated proactive framework for defense against spreading network worms in the Internet. the framework is intended for network worm detection (by recognizing the actions on scanning of network hosts) and containment of worm spreading (by limiting and blocking the packets transmitted by infected hosts). the framework is based on application of different heuristic detection and response mechanisms, their combination and automatic dynamic adaptation according to current network conditions. the paper describes the software system for simulation and evaluation of defense mechanisms investigated against spreading network worms and the results of experiments on detection and containment of network worms.
the Personal network (PN) concept extends the Personal Area network (PAN) by including remote personal nodes, such as nodes at home or in the office. this extension is achieved through dynamic tunnels established betw...
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ISBN:
(纸本)9780769530895
the Personal network (PN) concept extends the Personal Area network (PAN) by including remote personal nodes, such as nodes at home or in the office. this extension is achieved through dynamic tunnels established between the remote PN entities. Scalability presents a major challenge for tunnel management in PNs due to their dynamic nature and the increasing number of simultaneously supported PNs. To reduce the PN management complexity, this paper proposes to use a peer-to-peer-based publish/subscribe naming (PPNS) system. the PPNS system enables an automated provisioning of the location information in the tunnel endpoints. A centralised management approach is proposed for the on-demand PN establishment and a distributed management approach is proposed for the always-on PN establishment.
Future many-core chips are envisioned to feature up to a thousand cores on a chip. With an increasing number of cores on a chip the problem of distributing load gets more prevalent. Even if a piece of software is desi...
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ISBN:
(纸本)9780769543284
Future many-core chips are envisioned to feature up to a thousand cores on a chip. With an increasing number of cores on a chip the problem of distributing load gets more prevalent. Even if a piece of software is designed to exploit parallelism it is not an easy to place parallel tasks on the cores to achieve maximum performance. this paper proposes the connectivity-sensitive algorithm for static task-placement onto a 2D mesh of interconnected cores. the decreased feature sizes of future VLSI chips will increase the number of permanent and transient faults. To accommodate partially faulty hardware the algorithm is designed to allow placement on irregular core structures, in particular, meshes with faulty nodes and links. the quality of the placement is measured by comparing the results to two baseline algorithms in terms of communication efficiency.
In this paper, a novel approach to prevent accidental or deliberate data breaches is presented. the proposed approach provides platform, network and offline security. Data is categorized as sensitive or insensitive, a...
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ISBN:
(纸本)9780769543284
In this paper, a novel approach to prevent accidental or deliberate data breaches is presented. the proposed approach provides platform, network and offline security. Data is categorized as sensitive or insensitive, and the corresponding applications are isolated by using virtualization technology. Data theft or accidental loss is prevented by encrypting virtual hard disks and by introducing a multi-lane network architecture. If no connection to a corporate network is available, an offline mode handles data transfer and encryption. Authentication is managed by applying a biometric feature vector in association with a smart card setup. the approach increases security without disrupting the everyday work routines of users. An implementation based on VirtualBox and JavaCard is presented. A performance evaluation of the critical components is provided.
the goal of this paper is to ascertain with what accuracy the direction of Bitcoin price in USD can be predicted. the price data is sourced from the Bitcoin Price Index. the task is achieved with varying degrees of su...
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ISBN:
(纸本)9781538649756
the goal of this paper is to ascertain with what accuracy the direction of Bitcoin price in USD can be predicted. the price data is sourced from the Bitcoin Price Index. the task is achieved with varying degrees of success through the implementation of a Bayesian optimised recurrent neural network (RNN) and a Long Short Term Memory (LSTM) network. the LSTM achieves the highest classification accuracy of 52% and a RMSE of 8%. the popular ARIMA model for time series forecasting is implemented as a comparison to the deep learning models. As expected, the non-linear deep learning methods outperform the ARIMA forecast which performs poorly. Finally, both deep learning models are benchmarked on both a GPU and a CPU withthe training time on the GPU outperforming the CPU implementation by 67.7%.
Increasing memory parallelism in MPSoCs to provide higher memory bandwidth is achieved by accessing multiple memories simultaneously. Inasmuch as the response transactions of concurrent memory accesses must be in-orde...
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ISBN:
(纸本)9780769539393
Increasing memory parallelism in MPSoCs to provide higher memory bandwidth is achieved by accessing multiple memories simultaneously. Inasmuch as the response transactions of concurrent memory accesses must be in-order, a reordering mechanism is required. To our knowledge the resource utilization of conventional reordering mechanisms is low. In this paper, we present a novel network interface architecture for on-chip networks to increase the resource utilization and to improve overall performance. Also, based on the proposed architecture, a hybrid network interface is presented to integrate both memory and processor in a tile. the proposed architecture exploits AXI transaction based protocol to be compatible with existing IP cores. Experimental results with synthetic test cases demonstrate that the proposed architecture outperforms the conventional architecture in terms of latency. Also, the cost of the presented architecture is evaluated with UMC 0.09 mu m technology.
Over the last years, deep learning architectures have gained attention by winning important international detection and classification challenges. However, due to high levels of energy consumption, the need to use low...
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ISBN:
(纸本)9781509060580
Over the last years, deep learning architectures have gained attention by winning important international detection and classification challenges. However, due to high levels of energy consumption, the need to use low-power devices at acceptable throughput performance is higher than ever. this paper tries to solve this problem by introducing energy efficient deep learning based on local training and using low-power mobile GPU parallel architectures, all conveniently supported by the same high-level description of the deep network. Also, it proposes to discover the maximum dimensions that a particular type of deep learning architecture-the stacked autoencoder-can support by finding the hardware limitations of a representative group of mobile GPUs and platforms.
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