this paper presents the design of a P2P data persistent platform. Durable access and integrity of the data are ensured despite massive attacks. this platform, named DataCube, exploits the properties of cluster-based p...
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ISBN:
(纸本)9780769539393
this paper presents the design of a P2P data persistent platform. Durable access and integrity of the data are ensured despite massive attacks. this platform, named DataCube, exploits the properties of cluster-based peer-to-peer substrates to implement a compound of full replication and rateless erasure codes. DataCube guarantees durable access and integrity of data despite adversarial attacks. In particular, the recovery of damaged data is achieved through the retrieval of coded blocks whose integrity is checked on the fly.
Fused CPU-GPU architectures that utilize the powerful features of both processors are common nowadays. Using homogeneous interconnect for such heterogeneous processors can result in performance degradation and power i...
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ISBN:
(纸本)9781728165820
Fused CPU-GPU architectures that utilize the powerful features of both processors are common nowadays. Using homogeneous interconnect for such heterogeneous processors can result in performance degradation and power increase. this paper explores the optimization of heterogeneous NoC design to connect heterogeneous CPU-GPU architecture in terms of NoC performance and power. this involves solving four different NoC design sub -problems simultaneously;processing elements (PEs) mapping, buffer size and virtual channel assignments, and links' bandwidth determination. Heuristic-based optimization methods were proposed to obtain a near-optimal heterogeneous NoC design, and formal models were used to get a measure of the NoC performance and power of the evaluated design. the obtained optimal designs were validated using a full-system simulator.
this paper demonstrates on speeding up an accurate analysis of fault trees using stochastic logic through GPGPUs. Actually, probability models of dynamic gates and new accurate models for different combinations of col...
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ISBN:
(纸本)9781467387767
this paper demonstrates on speeding up an accurate analysis of fault trees using stochastic logic through GPGPUs. Actually, probability models of dynamic gates and new accurate models for different combinations of cold spare gate e.g., two cold spare gates with a share spare and a cold spare gate with more than one spare inputs are developed in this paper. Experimental results show that on average;the proposed analysis method is 235 times faster than CPU simulation time. Moreover, proposing new stochastic models results accuracy and simplicity as additional advantages of the proposed method.
High-volume data streams are straining the limits of stream processing frameworks which need advanced parallelprocessing capabilities to withstand the actual incoming bandwidth. parallelprocessing must be synergical...
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ISBN:
(纸本)9781509060580
High-volume data streams are straining the limits of stream processing frameworks which need advanced parallelprocessing capabilities to withstand the actual incoming bandwidth. parallelprocessing must be synergically integrated with elastic features in order dynamically scale the amount of utilized resources by accomplishing the Quality of Service goals in a cost-effective manner. this paper proposes a control-theoretic strategy to drive the elastic behavior of latency-sensitive streaming operators in distributed environments. the strategy takes scaling decisions in advance by relying on a predictive model-based approach. Our ideas have been experimentally evaluated on a cluster using a real-world streaming application fed by synthetic and real datasets. the results show that our approach takes the strictly necessary reconfigurations while providing reduced resource consumption. Furthermore, it allows the operator to meet desired average latency requirements with a significant reduction in the experienced latency jitter.
A very ambitious objective in the field of policy-based systems is the provision of an intuitive and transparent way for policy specification, refinement and enforcement. this is one of the key enabling technologies f...
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ISBN:
(纸本)9780769539393
A very ambitious objective in the field of policy-based systems is the provision of an intuitive and transparent way for policy specification, refinement and enforcement. this is one of the key enabling technologies for a simplified security management of complex networked environments. Currently, security policies are enforced by configuring the end devices by means of low-level device-specific parameters manually derived from high level specifications. this process, defined as policy translation, is still performed without a holistic view of the overall security requirements. this paper presents the network Contextualization Tool (NCTool), a software supporting administrators in performing network dependent activities when configuring security enabled devices. the tool provides a great advantage in the management of complex networks. In fact, it simplifies the network administration tasks and reduces effort and responsibilities for the administrators, thus decreasing the risk of mistaken configurations.
A computing cluster that interconnects multiple compute nodes is used to accelerate distributed reinforcement learning based on DQN (Deep Q-network). In distributed reinforcement learning, Actor nodes acquire experien...
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ISBN:
(纸本)9781665469586
A computing cluster that interconnects multiple compute nodes is used to accelerate distributed reinforcement learning based on DQN (Deep Q-network). In distributed reinforcement learning, Actor nodes acquire experiences by interacting with a given environment and a Learner node optimizes their DQN model. Since data transfer between Actor and Learner nodes increases depending on the number of Actor nodes and their experience size, communication overhead between them is one of major performance bottlenecks. In this paper, their communication performance is optimized by using DPDK (Data Plane Development Kit). Specifically, DPDK-based low-latency experience replay memory server is deployed between Actor and Learner nodes interconnected with a 40GbE (40Gbit Ethernet) network. Evaluation results show that, as a network optimization technique, kernel bypassing by DPDK reduces network access latencies to a shared memory server by 32.7% to 58.9%. As another network optimization technique, an in-network experience replay memory server between Actor and Learner nodes reduces access latencies to the experience replay memory by 11.7% to 28.1% and communication latencies for prioritized experience sampling by 21.9% to 29.1%.
As the computation cost increases to meet the design requirements for computation-intensive applications on todays systems, the pressure to develop high performance parallel processors on a chip will increase. network...
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ISBN:
(纸本)9780769543284
As the computation cost increases to meet the design requirements for computation-intensive applications on todays systems, the pressure to develop high performance parallel processors on a chip will increase. network-on-Chip (NoC) techniques that interconnect multiple processing elements with routers are the solution for reducing computation time and power consumption by parallelprocessing on a chip. the shared communication platform is also essential to meet the scalability and complexity challenges for System-on-Chip (SoC). However not many parallel applications have been studied for such an architecture and workload characterizations have not been researched to benefit the architecture design optimization. In this paper, we study multiple data-parallel applications on a multicore NoC architecture withdistributed memory space. We introduce an efficient runtime workload distribution algorithm that balances workloads of parallel processors and apply for selected embedded applications. Using our cycle accurate multicore simulator, we simulated our NoC-enabled multicore architecture model and executed data-parallel applications on various number of processing elements using the proposed runtime load balancing algorithm and analyzed performance and communication overheads.
We evaluate the applicability of many-core architectures for the simulation of networks on chips (NoC). Compared to the well established shared memory multi-core architectures, many-core architectures significantly di...
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ISBN:
(纸本)9781467387767
We evaluate the applicability of many-core architectures for the simulation of networks on chips (NoC). Compared to the well established shared memory multi-core architectures, many-core architectures significantly differ not only in the number of processing elements but also in the on-chip communication architecture, the memory subsystem, and the computational performance of an individual core. Proven multi-core simulation approaches do not consider such architectural aspects and thus suffer limited performance when being applied to many-core architectures. To enable high performance simulation, we identify conceptual drawbacks of state of the art parallel simulation approaches and consequently propose a novel globally asynchronous locally synchronous (GALS) simulation concept suited for many core architectures. Our results show that our GALS simulation approach yields a speedup of up to 2.3 over parallel discrete event simulation.
Gene regulatory network expansion is a task of the foremost importance in computational biology that aims at finding new genes to expand a given known gene regulatory network. To this end we present OneGenE, a novel f...
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ISBN:
(纸本)9781728116440
Gene regulatory network expansion is a task of the foremost importance in computational biology that aims at finding new genes to expand a given known gene regulatory network. To this end we present OneGenE, a novel framework for gene regulatory network expansion that relies on the BOINC platform. OneGenE is an evolution of the NES2RA algorithm, withthe aim to overcome its main criticality, i.e. long response time for the final user. To achieve this goal, candidate expansion lists are pre-computed for each gene in the organism and then aggregated at runtime to produce the the final expansion list for a given known gene regulatory network. We validated OneGenE on the expression data of Pseudomonas aeruginosa, comparing its results withthe one obtained by NES2RA and through a biological literature review.
Overlay networks represent a flexible approach for distributed services deployed across different administrative domains to group according to a given criteria without modification of the underlying network. Two key f...
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ISBN:
(纸本)9780769530895
Overlay networks represent a flexible approach for distributed services deployed across different administrative domains to group according to a given criteria without modification of the underlying network. Two key features for such overlays to be effective and useful are security and dynamicity. this paper introduces a proposal for the elements (i.e., architecture, protocols, and formal information models) needed to dynamically deploy secure overlay networks in certain multi-domain scenarios.
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