For low-kl optical lithography, mask effects are more significant than ever before. Also, at low-kl lithography, mask type, reticle enhancements and exposure illumination conditions interact in a non-linear way, which...
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For low-kl optical lithography, mask effects are more significant than ever before. Also, at low-kl lithography, mask type, reticle enhancements and exposure illumination conditions interact in a non-linear way, which makes difficult to predict lithography capability from analysis of simulated aerial images. However, it is worth to try using accurate aerial images for prediction of lithography capability, than exposing wafers on today's expensive lithography tools that are used 24 hour a day for production. this paper proposes a method to predict capability of lithography process from measuring mask effects based on the aerial images gathered at NA and coherence settings similar to real exposure conditions and comparing them to printed patterns in resist. Traditionally, mask effects based on aerial images addressed only defect printability (1,2,3) Here, we propose a different way to analyze mask aerial images. Our method is based on measurements of aerial images looking at lithography parameters that affect CD control: linewidth proximity through pitch and end of line pullback. the aerial images were then analyzed in order to predict individual and overlapped Exposure-Defocus windows using ProDATA (Finle) software. ProDATA software has been modified with added capability to calculate the total window area metric(4), which proves to be a sensitive and accurate metric to characterize effects of pitch, illumination conditions and mask type. Predicted ED windows are compared to real ED windows generated from wafers printed withthe same masks, after exposures using same NA and sigma conditions. In our work, we gathered aerial images from two types of ternary attenuated phase shifting masks with 6% and 18% transmission, using an MSM100 tool equipped with illumination apertures that simulate an exposure tool with 0.63 and 0.7NA and 0.85/0.55 annular and quasar off-axis illuminations. CD target for this study is 130nm for line patterns and 260nm for end-of-line pullback. I
With continuously shrinking design rules enhanced techniques are required in mask manufacture which require more sophisticated procedures for their characterization. As Phase Shift masks (PSM) are of growing importanc...
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With continuously shrinking design rules enhanced techniques are required in mask manufacture which require more sophisticated procedures for their characterization. As Phase Shift masks (PSM) are of growing importance a new CD algorithm had to be developed to achieve the same or even higher level of CD accuracy and repeatability as on chrome masks. Major improvements in measurement performance on attenuated PSM have been achieved resulting from improving the PSM CD algorithm based on the experiences reported earlier. With shrinking feature sizes and masks layouts with denser patterns the quantification of corner rounding effects on contacts and line ends is of growing importance. Based on the algorithm developed for the effect of corner rounding on line end shortening a measurement procedure has been developed for contact holes. Measurement results will been shown. To further improve CD measurement automation and to enable easy measurement job modifications a highly flexible device has been developed to import measurement parameters into a macro template.
To support the continuing Defect Engineering activities in the Infineon mask House, a professional analysis tool has been developed for Defect Yield Management, in collaboration with EGsoft. EGSoft is the software div...
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To support the continuing Defect Engineering activities in the Infineon mask House, a professional analysis tool has been developed for Defect Yield Management, in collaboration with EGsoft. EGSoft is the software division of Electroglas Inc. and suppliers of the YieldManager™ product, used for Yield Management in numerous wafer fabs. the requirement for such a tool was catalysed by the ever-increasing demand for sophisticated defect analysis, to accelerate defect learning and the identification of major and minor defect-related-yield detractors. Yield mask consists of a database, which centrally stores all relevant information from Defect Inspection, Repair and Review tools in the Infineon mask House and an analysis tool, which allows users to analyse the data collected on their PC. the analysis tool can be divided into six major modules: Data Set Builder, mask Map, Map Gallery, Image Gallery, Charting and Customise: the functionality of the above-mentioned modules is presented and their application in the analysis of defect data demonstrated. the tool is shown to be an invaluable, cost-effective labour-saving device in a high-end mask House, where the time required to analyse and resolve defect problems can be dramatically reduced.
the write time of an ALTA 3000HT mask writer has been observed to be up to 36% better than that of the ALTA 3000 system. the ALTA 3000HT system enables users to meet their performance requirements at increased product...
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the write time of an ALTA 3000HT mask writer has been observed to be up to 36% better than that of the ALTA 3000 system. the ALTA 3000HT system enables users to meet their performance requirements at increased production capacity withthe use of new writing strategies. the ability to change between eight and four averaging passes, as well as the addition of key hardware improvements, gives users increased flexibility in meeting the throughput and print quality requirements for high-volume mask manufacturing. Observed throughput and print performance data, as well as benefits analysis and cost of ownership data, are presented.
As optical lithography is extended to the 130 nm generation and beyond, demanding requirements are placed on mask pattern generators to produce quartz substrate masks. this paper reports on the lithography and critica...
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As optical lithography is extended to the 130 nm generation and beyond, demanding requirements are placed on mask pattern generators to produce quartz substrate masks. this paper reports on the lithography and critical dimension (CD) performance of the MEBES 5500 mask pattern generator. Compared to previous MEBES tools, this system employs a new high-dose electron gun and column design. We summarize experiments relating lithographic quality to increased dose and the effects of spot size on lithography. Methods to reduce beam-induced pattern placement errors are reviewed. A new graybeam writing strategy, Multipass Gray-II (MPG-II), is described in detail. this strategy creates eight dosed gray levels and provides increased writing throughput (up to 8× compared to single-pass printing) without loss of lithographic quality. these experiments are performed with ZEP 7000 resist and dry etch process;improvements in CD control have been achieved by optimizing the process. A consequence of the improvement in CD control and throughput is improved productivity in generating 180 nm devices.
the challenges of low k1 lithography require unique solutions at all levels of the lithography process. Chromeless phase lithography (CPL) is a promising technique that uses a 2-beam imaging strategy and a unique OPC ...
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the challenges of low k1 lithography require unique solutions at all levels of the lithography process. Chromeless phase lithography (CPL) is a promising technique that uses a 2-beam imaging strategy and a unique OPC application for enhanced CD uniformity through pitch. It is particularly effective when combined with a high numerical aperture (NA) and off-axis illumination (OAI). In addition to its imaging benefits, CPL masks offer many advantages in the manufacturing of the mask over other approaches. the manufacturing strategy and methodology employed to fabricate CPL masks will be discussed. the technical challenges of mask production will also be highlighted. Application of CPL to production ArF images were characterized through simulations and experimental data demonstrating the capability of this technique to produce complex structures.
In this paper, a Distributed Active Transformer (DAT) is used to implement a fully-integrated RF power amplifier (PA) for the extended GSM-band and LTE band VIII in a standard 90 nm CMOS process. the DAT allows the de...
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this paper presents a 3-5 GHz ultra-wideband radio front-end for low data-rate wireless personal area network applications. the circuit, implemented in a 90-nm CMOS technology, includes a carried-based ultra-wideband ...
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this paper presents a 3-5 GHz ultra-wideband radio front-end for low data-rate wireless personal area network applications. the circuit, implemented in a 90-nm CMOS technology, includes a carried-based ultra-wideband transmitter, a sub-optimal coherent down-converter and a low-power LO signal generator. thanks to a pseudo-Gaussian pulse generator, the transmitter is able to run up to 500 Mpps satisfying the FCC mask requirements with no filter and high spectral efficiency. the down-converter exploits a single-ended low-noise amplifier to minimize power consumption. It also performs on-chip single-ended-to-differential conversion of the RF signal by using an integrated transformer. the down-converter exhibits a 23-dB conversion gain and a double-sideband noise figure of 3.4 dB. the LO signal is generated by a low-power wideband LC VCO, which draws only 1.5 mA. the current consumption of the radio front-end is 15 mA in receive mode and 24 mA in transmit mode.
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