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检索条件"任意字段=15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

共 2151 条记录，以下是221-230 订阅

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A method for evaluating uncertainties in the early development phases of embedded real-time systems

A method for evaluating uncertainties in the early developme...

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11th international conference on embedded and real-time computing systems and applications

作者： Axelsson, J Volvo Car Corp Dept 94100 PV32 SE-40531 Gothenburg Sweden

ISBN: (纸本)0769523463

In the early phases of embedded real-time systems development, design decisions are made with large consequences on the quality of the resulting product. At the same time, only limited information is available about key attributes, which makes it difficult to get correct decisions. In this paper, it is studied how to include uncertainty in the information in early phases and to handle the risks involved. Using Monte Carlo simulation, the uncertainties are evaluated based on estimations of basic parameters. the technique is applied to schedulability analysis, and it is shown that the results can be counter-intuitive, and thus that current design practice can lead to higher risk than assumed by the designers.

关键词： real time systems

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IPDeN: real-time deflection-based NoC with in-order flits delivery 28

IPDeN: Real-Time deflection-based NoC with in-order flits de...

引用

28th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Gonzalez, Yilian Ribot Nelissen, Geoffrey Tovar, Eduardo Polytech Inst Porto ISEP CISTER Res Ctr Porto Portugal Eindhoven Univ Technol Eindhoven Netherlands

ISBN: (数字)9781665453448

ISBN: (纸本)9781665453448

In deflection-based Network-on-Chips (NoC), when several flits entering a router contend for the same output port, one of the flit is routed to the desired output and the others are deflected to alternatives outputs. the approach reduces power consumption and silicon footprint in comparison to virtual-channels (VCs) based solutions. However, due to the non-deterministic number of deflections that flits may suffer while traversing the network, flits may be received in an out-of-order fashion at their destinations. In this work, we present IPDeN, a novel deflection-based NoC that ensures in-order flit delivery. To avoid the use of costly reordering mechanisms at the destination of each communication flow, we propose a solution based on a single small buffer added to each router to prevents flits from over taking other flits belonging to the same communication flow. We also develop a worst-case traversal time (WCTT) analysis for packets transmitted over IPDeN. We implemented IPDeN in Verilog and synthesized it for an FPGA platform. We show that a router of IPDeN requires approximate to 3-times less hardware resources than routers that use VCs. Experimental results shown that the worst-case and average packets communication time is reduced in comparison to the state-of-the-art.

关键词： real-time embedded systems systems-on-Chips Network-on-Chips Worst-Case Traversal time

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Feature Selection and Activity Recognition to Detect Water Waste from Water Tap Usage

Feature Selection and Activity Recognition to Detect Water W...

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1st international Workshop on Cyber-Physical systems, Networks, and applications (CPSNA) held during 17th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Trang thuy Vu Sokan, Akifumi Nakajo, Hironori Fujinami, Kaori Suutala, Jaakko Siirtola, Pekka Alasalmi, Tuomo Pitkanen, Ari Roning, Juha Tokyo Unvers Agr & Technol Dept Comp & Informat Sci Tokyo Japan Univ Oulu Dept Elect & Informat Engn Oulu Finland

ISBN: (纸本)9780769545028

In this paper, water tap usage is examined based on water sound analysis. We focus on detecting "water waste" to make persuasion of water savings effective, where two types of water waste are defined: inter-activity water waste and intra-activity water waste. Based on a preliminary user survey, four types of basin-related activities are identified that occur with water waste. We apply a spectrum subtraction method for feature selection and propose cascaded classifiers for activity recognition. the result of an evaluation presents that the aggregate accuracies to identify inter-activity water waste and intra-activity one are 100.0 % and 81.1 %, respectively.

关键词： Accuracy Error analysis Microphones Monitoring real time systems Sensors Water conservation activity recognition environmental science computing feature selection inter-activity water waste intra-activity water waste learning (artificial intelligence) pattern classification spectrum subtraction method wastewater water sound analysis water tap usage water waste detection

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Dynamic Activation Timing Configuration for Product Line Development

Dynamic Activation Timing Configuration for Product Line Dev...

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作者： Ishigooka, Tasuku Narisawa, Fumio Hitachi Ltd Hitachi Res Lab Ibaraki Japan

ISBN: (纸本)9780769545028

Most automotive control systems have been developed by combining legacy Electronic Control Units (ECUs) with newly developed ECUs. We need to plan the product line to utilize as many legacy ECUs as possible to lower development costs of new vehicles. However, we must develop several new gateway ECUs per new vehicle because gateway ECUs depend on the placement of other ECUs and their combinations within the whole system. the reusable gateway ECUs are needed to lower development cost. However, there is a problem in that the worst case execution time (WCET) of relay processing may be impaired in typical methods that are synchronized with the communication cycle of time-triggered networks. therefore, we propose a Dynamic Activation Timing Configuration (DATC) for product line development, which can dynamically calculate the activation timing of relay processing from the information on message routing, slot assignment, and time-triggered network. the gateway ECUs with DATC can be dynamically adjusted to new vehicles and improve the WCET of relay processing.

关键词： Automotive engineering Dynamic Configuration Event-Triggered Network Gateway Logic gates Relays Routing time-Triggered Network Timing Vehicles automobiles automotive control systems automotive electronics dynamic activation timing configuration electronic control units product development product line development relay processing time-triggered networks worst case execution time

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A Concurrency Framework for Priority-Aware Intercomponent Requests in CAmkES on seL4 28

A Concurrency Framework for Priority-Aware Intercomponent Re...

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28th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Sudvarg, Marion Gill, Chris Washington Univ Dept Comp Sci & Engn St Louis MO 63110 USA

ISBN: (数字)9781665453448

ISBN: (纸本)9781665453448

Component-based design can encapsulate and isolate state and the operations on it, but timing semantics crosscut these boundaries when a real-time task's control flow spans multiple components. Under priority-based scheduling, intercomponent control flow should be coupled with priority information, so that task execution can be prioritized appropriately end-to-end. However, the CAmkES component architecture for the seL4 microkernel does not adequately support priority propagation across intercomponent requests: component interfaces are bound to threads that execute at fixed priorities provided at compile-time in the component specification. In this paper, we present a new library for CAmkES with a thread model that supports (1) multiple concurrent requests to the same component endpoint;(2) propagation and enforcement of priority metadata, such that those requests are appropriately prioritized;and (3) implementations of Non-Preemptive Critical Sections, the Immediate Priority Ceiling Protocol and the Priority Inheritance Protocol for components encapsulating critical sections of exclusive access to a shared resource. We measure overheads and blocking times for these new features and use existing theory to perform schedulability analysis. Evaluations on both Intel x86 and ARM platforms show that our new library allows CAmkES to provide suitable end-to-end timing for real-time systems.

关键词： Concurrent computing Component architectures Protocols Program processors Semantics Metadata real-time systems

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Hierarchical Attention-Based Anomaly Detection Model for embedded Operating systems 24

Hierarchical Attention-Based Anomaly Detection Model for Emb...

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24th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Ezeme, Mellitus O. Mahmoud, Qusay H. Azim, Akramul Univ Ontario Inst Technol Dept Elect Comp & Software Engn Oshawa ON Canada

ISBN: (纸本)9781538677599

real-time embedded system applications have become pervasive, and with the increasing reliance on automated systems for both critical and non-critical tasks, the trend is set to continue. this growing reliance on real-time embedded systems, as well as the rise in the complexity of these systems, demands an efficient monitoring tool that takes the complex interactions in the system into consideration. these systems are well-specified, and there exists standard error or fault detection mechanism to detect when an anomaly occurs in the applications controlling the operation. Nonetheless, these anomaly detection mechanisms gather information about the behavior of the software against its intended goals through the use of plausibility checks which rely on a priori knowledge of the application behavior. this kind of test raises two issues: (1) there should be a complete characterization of the software to derive the redundant information needed for plausibility checks, (2) this test focuses mainly on detecting errors/faults/anomalies in a single application with no regard to other entities in the integrated system. On the other hand, an embedded real-time system (fitted with an operating system) usually has the operating system and the integrated application statically linked to produce a single executable image. this bespoke nature of the embedded real-time system design means that the kernel traces reflect the behavior of the application and the associated hardware components at every point in time. Consequently, detecting deviations in the kernel trace invariably imply system-wide anomaly detection in the associated application and hardware. thus, this paper targets anomaly not just in the application layer, but also in other layers that make up the real-time embedded system. therefore, we introduce a hierarchical attention-based anomaly detection (HAbAD) model based on stacked Long Short-Term Memory (LSTM) Networks with Attention. It is a closed-world prediction-class

关键词： embedded systems Anomaly detection real-time systems Feature extraction Kernel Data models

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Multi-ASIP Platform Synthesis for Event-Triggered applications with Cost/Performance Trade-offs

Multi-ASIP Platform Synthesis for Event-Triggered Applicatio...

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ieee 19th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Gangadharan, Deepak Micconi, Laura Pop, Paul Madsen, Jan Tech Univ Denmark DTU Compute Odense Denmark

ISBN: (纸本)9781479908516

In this paper, we propose a technique to synthesize a cost-efficient distributed platform consisting of multiple Application Specific Instruction Set Processors (multi-ASIPs) running applications with strict timing constraints. Multi-ASIP platform synthesis is a non-trivial task for two reasons. Firstly, we need to know the WCET of tasks in target applications to derive platforms (including synthesized ASIPs) in which the tasks are schedulable. However, the WCET of tasks can be known only after the ASIPs are synthesized. We break this circular dependency by using a probability distribution of the WCET of a task (further referred to as the WCET uncertainty model), which takes into account the underlying microarchitectural configurations for the ASIP implementation. Secondly, the datapath area of the multi-ASIPs synthesized is an important design factor that contributes significantly towards the overall cost of the platform. We propose an area estimation model and a WCET uncertainty model that consider the effect of task datapath similarity. Based on these two models, we support the designer in exploring cost/performance trade-offs during the platform synthesis. We propose an Evolutionary Algorithm-based approach to solve this multiobjective optimization problem. the proposed approach has been evaluated using several benchmarks and it provides a number of multi-ASIP platform solutions exploring the trade-offs in the cost/performance design space.

关键词： Costs

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Energy characterization of real-time partitioned systems 24

Energy characterization of real-time partitioned systems

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24th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Guasque, Ana Balbastre, Patricia Crespo, Alfons Fohler, Gerhard Univ Politecn Valencia Inst Automat & Informat Ind Valencia Spain Tech Univ Kaiserslautern Real Time Syst Dept Kaiserslautern Germany

ISBN: (纸本)9781538677599

this paper addresses the problem of energy characterization in partitioned systems. the goal is to use this model to minimize energy consumption. Controlling the frequency at which CPUs can operate is a common technique to reduce the system energy consumption. Techniques as DVFS assume that decreasing the system frequency decreases the system energy, in spite of increasing the time the processor is busy. this relationship between temporal load, frequency and energy is studied in this paper. All works assume that this relationship is linear but we provide a new energy model that relates the previous variables through a non-linear relation. We also present a comparison in terms of energy between the linear and the non-linear model.

关键词： energy consumption real-time systems partitioned-systems

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Performance of Secure Boot in embedded systems 15

Performance of Secure Boot in Embedded Systems

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15th Annual international conference on Distributed computing in Sensor systems (DCOSS)

作者： Profentzas, Christos Gunes, Mirac Nikolakopoulos, Yiannis Landsiedel, Olaf Almgren, Magnus Chalmers Univ Technol Gothenburg Sweden Univ Kiel Kiel Germany

ISBN: (纸本)9781728105703

With the proliferation of the Internet of things (IoT), the need to prioritize the overall system security is more imperative than ever. the IoT will profoundly change the established usage patterns of embedded systems, where devices traditionally operate in relative isolation. Internet connectivity brought by the IoT exposes such previously isolated internal device structures to cyber-attacks through the Internet, which opens new attack vectors and vulnerabilities. For example, a malicious user can modify the firmware or operating system by using a remote connection, aiming to deactivate standard defenses against malware. the criticality of applications, for example, in the Industrial IoT (IIoT) further underlines the need to ensure the integrity of the embedded software. One common approach to ensure system integrity is to verify the operating system and application software during the boot process. However, safety-critical IoT devices have constrained boot-up times, and home IoT devices should become available quickly after being turned on. therefore, the boot-time can affect the usability of a device. this paper analyses performance trade-offs of secure boot for medium-scale embedded systems, such as Beaglebone and Raspberry Pi. We evaluate two secure boot techniques, one is only software-based, and the second is supported by a hardware-based cryptographic storage unit. For the software-based method, we show that secure boot merely increases the overall boot time by 4%. Moreover, the additional cryptographic hardware storage increases the boot-up time by 36%.

关键词： embedded systems Internet of things Secure Boot System Security

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A MDA approach for systems dedicated to process control

A MDA approach for systems dedicated to process control

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11th international conference on embedded and real-time computing systems and applications

作者： DeAntoni, J Babau, JP Inst Natl Sci Appl CITI Lab F-69621 Villeurbanne France

this document presents a MDA-based method for the development of systems dedicated to process control. It proposes to introduce a first sensors/actuators independent model. QoS semantic definitions are then stated;thu... 详细信息

ISBN: (纸本)0769523463

关键词： Information retrieval systems

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