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Utility-Based Resource Overbooking For Cyber-Physical systems

Utility-Based Resource Overbooking For Cyber-Physical System...

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ieee 19th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： de Niz, Dionisio Wrage, Lutz Rowe, Anthony Rajkumar, Ragunathan (Raj) Carnegie Mellon Univ SEI Pittsburgh PA 15213 USA Carnegie Mellon Univ ECE Pittsburgh PA 15213 USA

ISBN: (纸本)9781479908516

the tight coupling among computation, sensing and control found in Cyber-Physical systems (CPS) often requires information processing to be completed within strict timing deadlines. Traditional hard real-time scheduling algorithms require the use of the worst-case execution times to guarantee that deadlines will be met. Unfortunately, many algorithms with parameters derived from sensing the physical world suffer from large variations in execution time, which leads to pessimistic overall utilization. For example, object tracking in a computer vision system is highly dependent on the number and size of the objects within the camera's field of view. In this paper, we present the formal description of ZS-QRAM [8], a scheduling approach that allows system designers to flexibly assign execution times and application-derived utility to tasks in order to maximize total system utility even in the presence of highly variable processing estimates. In particular, we provide a detailed description of the algorithm, the formal proofs for its temporal protection and a detail evaluation. Our evaluation uses the Utility Degradation Resilience (UDR) metric presented in [8]. Our results show that ZS-QRAM is able to obtain four times as much UDR as ZSRM, a previous overbooking approach, and almost twice as much UDR as Rate-Monotonic with Period Transformation (RM/TP) even when the latter does not provide temporal protection.

关键词： Cyber Physical System

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real-time connectors for deterministic data-flow

Real-time connectors for deterministic data-flow

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Hamid, Irfan Najm, Elie CNRS LTCI UMR 5141 GET Telecom Paris 46 Rue Barrault F-75634 Paris 13 France

ISBN: (纸本)9780769529752

In this paper we introduce deterministic bridge connectors, a type of construct that ensures deterministic data-flow communication in asynchronous real-time systems. We also present a methodology for generating these connectors automatically from the application's architecture description in order to reduce programmer effort and the chance of error We provide a process algebraic verification of the determinism property of these connectors. We conclude by presenting arguments in favor of using this verification in lieu of expensive certification to qualify these constructs for onboard deployment.

关键词： real time systems

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Augmented reality Go: Extending Traditional Game Play with Interactive Self-Learning Support

Augmented Reality Go: Extending Traditional Game Play with I...

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1st international Workshop on Cyber-Physical systems, Networks, and applications (CPSNA) held during 17th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Iwata, Takahiro Yamabe, Tetsuo Nakajima, Tatsuo Waseda Univ Dept Comp Sci & Engn Tokyo Japan

ISBN: (纸本)9780769545028

the augmented reality (AR)-based learning support has several advantages over virtual reality or PC applications. AR enables to maintain the physical interaction that an activity originally offers, thus the skills and knowledge acquired in an augmented learning process can be intuitively applied to practice use. Whereas lots of AR-based self-learning support systems have been developed in previous studies, it has not been sufficiently evaluated how it influences a learner's mindset and the efficiency of training. In this paper, we investigate the user experience brought by AR technologies in a self-learning process. We chose the game of Go as a study program, and developed the Augmented reality Go (ARGo) system to compare the AR and conventional PC-based learning assistance. We found that the physical interaction with the original game apparatus enhanced the subjects' intrinsic motivation towards self-learning. Moreover, the original look-and-feel induced deeper concentration and higher elaboration on problem solving. Design issues are also discussed to generalize the concept of AR self-learning support towards broader application domains.

关键词： augmented reality Unsupervised learning Argon Interactive Game theory Game animals Learning processes Hunting molecular interactions Support systems virtual reality

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Scheduling real-time HiL Co-simulation of Cyber-Physical systems on Multi-core Architectures 24

Scheduling Real-time HiL Co-simulation of Cyber-Physical Sys...

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24th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Saidi, Salah Eddine Pernet, Nicolas Sorel, Yves IFP Energies Nouvelles Rueil Malmaison France INRIA Paris France

ISBN: (纸本)9781538677599

When designing complex cyber-physical systems, engineers have to integrate numerical models from different modeling environments in order to simulate the whole system and estimate its global performances. Co-simulation refers to such joint simulation of heterogeneous models. If some parts of the system are physically available, it is possible to connect these parts to the co-simulation in a Hardware-in-the-Loop (HiL) approach. In this case, the simulation has to be performed in real-time where models execution consists in periodically reacting to the real (physically available) components and providing periodic output updates. this paper deals with the parallelization and scheduling of real-time Hardware-in-the-Loop co-simulation of numerical models on multi-core architectures. A method for defining real-time constraints that have to be met is proposed. Also, an ILP formulation as well as a heuristic are proposed to solve the problem of scheduling the co-simulation on a multi-core architecture while satisfying the previously defined real-time constraints. the proposed approach is evaluated for different sizes of co-simulations and multi-core processors.

关键词： co-simulation HiL scheduling real-time multi-core

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Reducing dynamic power and leakage power for embedded systems 15

Reducing dynamic power and leakage power for embedded system...

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15th Annual ieee international ASIC/SOC conference

作者： Cao, Y Yasuura, H Kyushu Univ Dept Comp Sci & Commun Engn Kasuga Fukuoka 8168580 Japan

ISBN: (纸本)0780374940

this paper presents a system-level technique for embedded processor-based systems targeting both dynamic power and leakage power reduction using datapath width optimization. By means of tuning the design parameter, datapath width tailored to a given application requirements, the processors and memories are optimized resulting in significant power reduction, not only for dynamic power but also for leakage power. In our experiments for several real embedded applications, power reduction without performance penalty is reported range from about 14.5% to 59.2% of dynamic power, and 21.5% to 66.2% of leakage power.

关键词： embedded systems

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Dependable resource sharing for compositional real-time systems

Dependable resource sharing for compositional real-time syst...

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作者： van den Heuvel, Martijn M. H. P. Bril, Reinder J. Lukkien, Johan J. Tech Univ Eindhoven TU E Dept Math & Comp Sci Den Dolech 2 NL-5600 AZ Eindhoven Netherlands

ISBN: (纸本)9780769545028

Hierarchical scheduling frameworks (HSFs) have been extensively investigated as a paradigm for facilitating temporal isolation between components that need to be integrated on a single shared processor. In the presence of shared resources, however, temporal isolation may break when one of the accessing components executes longer than specified during global resource access. the ability to confine such temporal faults makes the HSF more dependable. As a solution we propose a stack-resource-policy (SRP)-based synchronization protocol for HSFs, named Hierarchical Synchronization protocol with Temporal Protection (HSTP). When a component exceeds its specified critical-section length, HSTP enforces a component to self-donate its own budget to accelerate the resource release. In addition, a component that blocks on a locked resource may donate budget. the schedulability of those components that are independent of the locked resource is unaffected. HSTP efficiently limits the propagation of temporal faults to resource-sharing components by disabling local preemptions in a component during resource access. We finally show that HSTP is SRP-compliant and applies to existing synchronization protocols for HSFs(1).

关键词： Hierarchical scheduling frameworks dependability resource sharing synchronization temporal isolation Resource sharing Interleukin-6 real-time systems

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A time-triggered distributed object computing environment for embedded control systems

A time-triggered distributed object computing environment fo...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Ishigooka, Tasuku Yokoyama, Takanori Musashi Inst Technol Setagaya Ku 1-28-1 Tamazutsumi Tokyo 1588557 Japan

ISBN: (纸本)9780769529752

the paper presents a time-triggered distributed object computing environment for embedded control systems such as automotive control systems. the time-triggered architecture is suitable for hard real-time systems. We present a time-triggered distributed object model as an extension to the time-triggered object model that consists of objects periodically updating their own attribute values. the model is suitable for embedded control systems in which the control logics are designed with control block diagrams. Replica objects are used for efficient location transparency in the model and inter-object communications are local method calls, not remote method invocations. We have developed a distributed computing environment based on the time-triggered distributed object model. the middleware maintains the replicas to be consistent with the original objects using periodic state messages. the middleware executes the replication processing with the stubs that bridge the original objects, the middleware, and the replicas. We have also developed a development environment for embedded control application programs based on the time-triggered distributed object model. the stubs are generated from the interface definitions written in CORBA-compliant IDL.

关键词： Middleware

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Hardware-assisted Reliability Enhancement for embedded Multi-core Virtualization Design

Hardware-assisted Reliability Enhancement for Embedded Multi...

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作者： Lin, Tsung-Han Kinebuchi, Yuki Shimada, Hiromasa Mitake, Hitoshi Lee, Chen-Yi Nakajima, Tatsuo Waseda Univ Dept Comp Sci & Engn Tokyo Japan

ISBN: (纸本)9780769545028

In this paper, we propose a virtualization architecture for the multi-core embedded system to provide more system reliability and security while maintaining the same performance without introducing additional special hardware supports or having to implement complex protection mechanism in the virtualization layer. embedded virtualization design usually uses two kinds of approaches, traditional VMM and microkernel approaches, but both of them suffer from performance or engineering cost problems. To achieve better reliability and keep the virtualization layer design lightweighted, a common hardware component called local memory adopted in the multi-core embedded processors is used in this work. By taking this memory architecture's advantage, we can mitigate above-mentioned problems at once. We choose to re-map the virtualization layer's program called SPUMONE, which it runs all its guest systems in kernel space, on the local memory. By doing so, it can provide additional reliability and security for the entire system because the SPUMONE's design in a multi-core platform has each instance being installed on a separated processor core, which is different from the traditional virtualization layer design, and therefore the content of each SPUMONE in the local memory is inaccessible to each others.

关键词： embedded systems Hardware Kernel Multicore processing Reliability SPUMONE Virtual machine monitors complex protection mechanism embedded multicore virtualization design embedded system embedded systems embedded virtualization design hardware-assisted reliability enhancement local memory local memory memory architecture memory architecture microkernel approach multicore embedded system multiprocessing systems reliability security system reliability virtualisation virtualization virtualization architecture

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An Efficient Fault Recovery Algorithm in Multiprocessor Mixed-Criticality systems

An Efficient Fault Recovery Algorithm in Multiprocessor Mixe...

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15th ieee international conference on High Performance computing and Communications (HPCC) /11th ieee/IFIP international conference on embedded and Ubiquitous computing (EUC)

作者： Liu, Guangdong Lu, Ying Wang, Shige Univ Nebraska Dept Comp Sci & Engn Lincoln NE 68588 USA Gen Motor Global Res & Dev Elect & Controls Integrat Lab Warren MI USA

ISBN: (纸本)9780769550886

Recent years, there is an increasing interest of integrating mixed-criticality functionalities onto a shared computing platform in automotive, avionics and the control industry. the benefits of such an integration include reduced hardware cost and high computational performance. Also, new challenges appear as a result of the integration since interferences across tasks with different criticalities are introduced and these interferences could potentially lead to catastrophic results. Failures are likely to be more frequent due to the interferences. Hence, it is becoming increasingly important to deal with faults in mixed-criticality systems. Although several approaches have been proposed to handle failures in mixed-criticality systems, they come either with a high cost due to a hardware replication (spatial redundancy) or with a poor utilization due to reexecution (time redundancy). In this paper, we study a scheme that provides fault recovery through task reallocations in response to permanent faults in multiprocessor mixed-criticality systems. We present an algorithm to minimize the number of task reallocations while retaining the promise that the most critical applications continue to meet their deadlines. the performance evaluation of the proposed algorithm is carried out by comparing it with two baseline algorithms. In order to evaluate the performance of algorithms from the perspective of mixed-criticality systems, we choose the state of art metric called ductility to formally measure the effects of deadline misses for tasks with different criticality levels. Under this metric, a high-criticality task is considered more important than all low-criticality tasks combined. the simulation results confirm the effectiveness of our proposed algorithm in both minimizing the number of task reallocations and retaining the promised performance of high-criticality tasks.

关键词： fault recovery multiprocessor mixed-criticality real-time systems task reallocation failure recovery Multiprocessor Religious Missions permanent fault algorithms DNA Integration integration

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Work-in-Progress Abstract: Revealing and Analyzing Architectural Models in Open-source ArduPilot 27

Work-in-Progress Abstract: Revealing and Analyzing Architect...

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27th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Staroletov, Sergey Polzunov Altai State Tech Univ Inst Automat & Electrometry Siberia Russia

ISBN: (纸本)9781665441889

Building robust software can be considered a major challenge in current software engineering processes. this task is especially relevant for the code of cyber-physical systems (CPS) that interact with tangible data of the environment and make decisions that have an impact on the real world. the study of good practices of the architectural organization of such software systems is suitable to conduct on solutions with open-source code, which are developed by large communities of enthusiasts. Such a code bears a long history and has been tested many times on real devices in a real-world environment. the construction of various models using the program code allows us to understand stable architectural solutions, to present them in a graphical form;these solutions can be used in STEM centers when designing other systems, taking into account all the achievements of the communities. In addition, it is possible to propose methods for analyzing models to prove various properties of cyber-physical systems. In this paper, we analyze ArduPilot Mega (APM), an Arduino-compatible solution for building DIY driving and flying systems. the solution is based on a specially designed board with a controller and necessary peripherals, as well as a firmware code in a C++-compatible dialect. Since there are many limitations associated with hardware, it is advisable to carry out a so-called co-modeling, taking into account both hardware and software sides. We consider modeling the interaction of equipment on connected pins and data transmission buses, the software part in the form of a class diagram for the solution. We then describe methods for analyzing the interactions between tasks running on the system through shared variables and evaluating the performance of the task scheduler.

关键词： Analytical models Codes Computational modeling Buildings Cyber-physical systems Software systems Hardware

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