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检索条件"任意字段=15th Symposium on Computer Architecture and High Performance Computing"

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A 7nm 4GHz Arm®-core-based CoWoS® Chiplet Design for high performance computing 33

A 7nm 4GHz Arm®-core-based CoWoS® Chiplet Design for High ...

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39th symposium on VLSI Technology / 33rd symposium on VLSI Circuits

作者： Lin, Mu-Shan Huang, Tze-Chiang Tsai, Chien-Chun Tani, King-Ho Hsieh, Chang-Hsiang Chen, Tom Huang, Wen-Hung Hu, Jack Chen, Yu-Chi Goel, Sandeep Kuniar Fu, Chin-Ming Rusu, Stefan Li, Chao-Chieh Yang, Shcng-Yao Wong, Mei Yang, Shu-Chun Lee, Frank Taiwan Semicond Mfg Co Hsinchu Taiwan

ISBN: (纸本)9784863487185

A dual-chiplet Chip-on-Wafer-on-Substrate (CoWoS (R)) was implemented in 7nm 15M process. Each SoC chiplet has four Arm (R) Cortex (R)-A72 processors operating at 4GHz. the on-die interconnect mesh bus operates above 4GHz at 2mm distance. the inter-chiplet connection features a scalable, 0.56pJ/bit power efficiency, 1.6Tb/s/mm(2) bandwidth density, and 0.3V Low-voltage-In-Package-INterCONnect (LIPINCON (TM)) interface achieving 8Gb/s/pin and 320GB/s bandwidth. Silicon test-chip measurements validate the processor, on-die interconnects and inter-chiplet interface performance. the built-in eye-scan feature shows the inter-chiplet connection achieves 244mV eye-height and 69% UI eye-width.

关键词： Clocks Integrated circuit interconnections Program processors Bandwidth computer architecture Phase locked loops Central Processing Unit

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Fast CNN-Based Object Tracking Using Localization Layers and Deep Features Interpolation 15

Fast CNN-Based Object Tracking Using Localization Layers and...

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15th IEEE International Wireless Communications and Mobile computing Conference (IEEE IWCMC)

作者： El-Shafie, Al-Hussein A. Zaki, Mohamed Habib, S. E. D. Cairo Univ Fac Engn Giza Egypt Al Azhar Univ Fac Engn Cairo Egypt

ISBN: (纸本)9781538677476

Object trackers based on Convolution Neural Network (CNN) have achieved state-of-the-art performance on recent tracking benchmarks, while they suffer from slow computational speed. the high computational load arises from the extraction of the feature maps of the candidate and training patches in every video frame. the candidate and training patches are typically placed randomly around the previous target location and the estimated target location respectively. In this paper, we propose novel schemes to speed-up the processing of the CNN-based trackers. We input the whole region-of-interest once to the CNN to eliminate the redundant computations of the random candidate patches. In addition to classifying each candidate patch as an object or background, we adapt the CNN to classify the target location inside the object patches as a coarse localization step, and we employ bilinear interpolation for the CNN feature maps as a fine localization step. Moreover, bilinear interpolation is exploited to generate CNN feature maps of the training patches without actually forwarding the training patches through the network which achieves a significant reduction of the required computations. Our tracker does not rely on offline video training. It achieves competitive performance results on the OTB benchmark with 8x speed improvements compared to the equivalent tracker.

关键词： object tracking CNN computer vision video processing bilinear interpolation classification-based trackers

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Design and simulation of a rooftop PV System in Taylor's University Lakeside Campus 15

Design and simulation of a rooftop PV System in Taylor's Uni...

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15th International Engineering and computing Research Conference, EURECA 2021

作者： Krishna, Y. Fauzan, M.F. Gan, N.B. Muhammad Nurhisham Taylor's University School of Computer Science and Engineering Selangor Subang Jaya Malaysia Solar Energy Research Institute Universiti Kebangsaan Malaysia Selangor Bangi 43600 Malaysia

Solar photovoltaic (PV) system is proven to be a future-proof type of power generation for growing economies. there are almost zero pollutants released, low maintenance cost with high reliability as the lifespan of a solar PV stretches up to 30 years, a well-sought alternative form of sustainable energy. Moreover, the electricity consumption in Taylor's University (TU), Malaysia is very high, as a consequence, a huge fraction of the fund is used to settle an RM450,000 electricity bill on average annually. In this paper, the study focused on how to reduce electricity consumption in TU by proposing a design of a comprehensive solar PV system. PVSYST and Sketchup software are used to design and analyze the PV system. In the present study, a Grid-Connected Photovoltaic (GCPV) mounted on the available roof space of TU is investigated. Also, a detailed economic analysis that includes the payback period and annual savings achieved through the proposed PV installation is analyzed. Annual savings of RM 267,621.00 can be made upon utilizing the proposed idea. Besides that, TU would be able to recover the initial investment cost in approximately 8 years of payback period, proving that the implementation of a 433kWp of solar PV unit is a smart option to address the sustainable energy goals. © 2021 Institute of Physics Publishing. All rights reserved.

关键词： Energy conservation

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HiFlipVX: An Open Source high-Level Synthesis FPGA Library for Image Processing 15th

HiFlipVX: An Open Source High-Level Synthesis FPGA Library f...

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15th International symposium on Applied Reconfigurable computing

作者： Kalms, Lester Podlubne, Ariel Goehringer, Diana Tech Univ Dresden Dresden Germany

ISBN: (纸本)9783030172268;9783030172275

the field of computer vision has been increasing over the past years as it is applied to many different applications nowadays. Additionally, they have become more complex and power demanding. On one hand, standards and libraries such as OpenCV and OpenVX have been proposed to ease development. On the other hand, FPGAs have proven to be energy efficient on image processing. the tendency over the last years has turned into using high-Level Synthesis (HLS), to ease their programmability. We present a highly optimized, parametrizable and streaming capable HLS open-source library for FPGAs called HiFlipVX. Due to its structure, it is straightforward to use and simple to add new functions. Furthermore, it is easily portable as it is based on the OpenVX standard. HiFlipVX also adds different features such as auto-vectorization. the library achieves an efficient resource utilization and a significant scalability, also in comparison to the reference (xfOpenCV), as shown in the evaluation.

关键词： OpenVX FPGA SoC high-Level Synthesis computer vision Image processing

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Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks 13

Many Universal Convolution Cores for Ensemble Sparse Convolu...

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IEEE 13th International symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSoC)

作者： Kuramochi, Ryosuke Sada, Youki Shimoda, Masayuki Sato, Shimpei Nakahara, Hiroki Tokyo Inst Technol Tokyo Japan

ISBN: (纸本)9781728148823

A convolutional neural network (CNN) is one of the most successfully used neural networks and it is widely used for many embedded computer vision tasks. However, it requires a massive number of multiplication and accumulation (MAC) computations with high-power consumption to realize it, and higher recognition accuracy is desired for modern tasks. In the paper, we apply a sparseness technique to generate a weak classifier to build an ensemble CNN. there is a trade-off between recognition accuracy and inference speed, and we control sparse (zero weight) ratio to make an excellent performance and better recognition accuracy. We use P sparse weight CNNs with a dataflow pipeline architecture that hides the performance overhead for multiple CNN evaluation on the ensemble CNN. We set an adequate sparse ratio to adjust the number of operation cycles in each stage. the proposed ensemble CNN depends on the dataset quality and it has different layer configurations. We propose a universal convolution core to realize variations of modern convolutional operations, and extend it to many cores with pipelining architecture to achieve high-throughput operation. therefore, while computing efficiency is poor on GPUs which is unsuitable for a sparseness convolution, on our universal convolution cores can realize an architecture with excellent pipeline efficiency. We measure the trade-off between recognition accuracy and inference speed using existing benchmark datasets and CNN models. By setting the sparsity ratio and the number of predictors appropriately, high-speed architectures are realized on the many universal covers while the recognition accuracy is improved compared to the conventional single CNN realization. We implemented the prototype of many universal convolution cores on the Xilinx Kintex UltraScale+ FPGA, and compared with the desktop GPU realization of the ensembling, the proposed many core based accelerator for the ensemble sparse CNN is 3.09 times faster, 4.20 times low

关键词： Convolution Pipeline processing computer architecture Graphics processing units Task analysis Two dimensional displays Acceleration

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the Deep Learning Modules for Cyberattack Identification in NetFlow Data Log with Ceph 9th

The Deep Learning Modules for Cyberattack Identification in ...

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9th International Conference on Frontier computing, FC 2019

作者： Liu, Ming-Lun Yang, Chao-Tung Kristiani, Endah Liu, Jung-Chun Department of Computer Science Tunghai University Taichung City Taiwan Department of Industrial Engineering and Enterprise Information Tunghai University Taichung City Taiwan Department of Informatics Faculty of Engineering and Computer Science Krida Wacana Christian University Jakarta Indonesia

ISBN: (纸本)9789811532498

In today’s fast-moving information era, there is no doubt that the Internet has become an indispensable part of human life. However, in the world of the Internet, it also hides unusual network behavior. Find the hidden unusual network behavior can reduce the vulnerability in the network. this paper proposes a complete architecture to store and analyze the collected network log data. We process and integrate the network data collected by each router on the campus, and store the integrated data in the Ceph storage. Ceph distributed storage environment with open source, high performance, high reliability and scalability, and preliminary preprocessing of raw materials through Python, eliminating redundant fields and unit unification. the collated data set is divided into two parts analysis, and part of the abnormal analysis is part of attack identification. In the sub-analysis, we find the abnormal data period and total flow through the standard deviation of three standard deviations. Moreover, we use Keras to identify the real-time data obtained by a cyberattack, establish an automatic identification model through the recurrent neural network (RNN), an experiment and adjust various parameters without affecting the accuracy. Further, optimize the RNN automated identification model. the identification accuracy of the optimization model in attack identification is about 98%. © 2020, Springer Nature Singapore Pte Ltd.

关键词： Recurrent neural networks

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T2S-Tensor: Productively Generating high-performance Spatial Hardware for Dense Tensor Computations 27

T2S-Tensor: Productively Generating High-Performance Spatial...

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27th IEEE Annual International symposium on Field-Programmable Custom computing Machines (FCCM)

作者： Srivastava, Nitish Rong, Hongbo Barua, Prithayan Feng, Guanyu Cao, Huanqi Zhang, Zhiru Albonesi, David Sarkar, Vivek Chen, Wenguang Petersen, Paul Lowney, Geoff Herr, Adam Hughes, Christopher Mattson, Timothy Dubey, Pradeep Cornell Univ Ithaca NY 14853 USA Intel Santa Clara CA USA Georgia Inst Technol Atlanta GA 30332 USA Tsinghua Univ Beijing Peoples R China

ISBN: (纸本)9781728111315

We present a language and compilation framework for productively generating high-performance systolic arrays for dense tensor kernels on spatial architectures, including FPGAs and CGRAs. It decouples a functional specification from a spatial mapping, allowing programmers to quickly explore various spatial optimizations for the same function. the actual implementation of these optimizations is left to a compiler. thus, productivity and performance are achieved at the same time. We used this framework to implement several important dense tensor kernels. We implemented dense matrix multiply for an Arria-10 FPGA and a research CGRA, achieving 88% and 92% of the performance of manually written, and highly optimized expert ("ninja") implementations in just 3% of their engineering time. three other tensor kernels, including MTTKRP, TTM and TTMc, were also implemented with high performance and low design effort, and for the first time on spatial architectures.

关键词： Optimization computer architecture Kernel Field programmable gate arrays Programming Hardware

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the Integrated Computational Environment for Optimization of Complex Systems 15

The Integrated Computational Environment for Optimization of...

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15th International Asian School-Seminar on Optimization Problems of Complex Systems (OPCS)

作者： Il'in, Valery P. Acad Sci Siberian Branch Inst Computat Math & Math Geophys Novosibirsk Russia

ISBN: (纸本)9781728129860

the concept, general structure and main components of the integrated computing environment (ICE) for optimization of complex systems based on the methods of conditional minimization of the objective functional characterizing the initial formulation of the problem of mathematical modeling on supercomputers are considered. the inverse problem is solved based on a sequence of direct initial-boundary value problems, each of which can be a resource-intensive interdisciplinary problem described by a system of multidimensional differential and/or integral (and/or discrete) equations in multi-scale computational domains with multi-connected piecewise smooth geometric configurations of boundaries and contrast material properties of multiphase media. this includes, in particular, the actual problems of surrogate optimization. the functional core of the ICE is focused on a high-performance support of all major stages of a large-scale computational experiment, including geometric and semantic modeling, generation of computational grids, approximation of initial equations, solution of algebraic problems, optimization algorithms for solving inverse problems, post-processing and visualization of results, decision-making on the results of the study. Technical requirements for the ICE involve a flexible expansion of the models and methods used, adaptation to the evolution of computer platforms, effective reuse of external software products, coordinated participation of different teams of developers and focus on a broad demand of the end users from different industries. these qualities are designed to provide a long life cycle and a qualitative increase in productivity in the development and application of the new generation software.

关键词： interdisciplinary direct and inverse problems optimization methods technological modeling stages integrated computing environment software tool environment

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Second-Price Auction Based Cognitive Traffic Offloading in Heterogeneous Networks 15

Second-Price Auction Based Cognitive Traffic Offloading in H...

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15th IEEE International Wireless Communications and Mobile computing Conference (IEEE IWCMC)

作者： Du, Jun Jiang, Chunxiao Zhang, Haijun Ren, Yong Leung, Victor C. M. Tsinghua Univ Dept Elect Engn Beijing 100084 Peoples R China Tsinghua Univ Tsinghua Space Ctr Beijing 100084 Peoples R China Univ Sci & Technol Beijing Dept Commun Engn Beijing 100083 Peoples R China Univ British Columbia Dept Elect & Comp Engn Vancouver BC V6T 1Z4 Canada

ISBN: (纸本)9781538677476

Recently, increasingly heterogeneous wireless networks are expected to support extremely high data rates and exponentially increasing demands of data, which require new spectrum sharing technology paradigms. By achieving an efficient spectrum sharing among heterogeneous networks (HetNets), traffic offloading is a promising solution for boosting the capacity of traditional macro-cell networks. In this paper, a cognitive spectrum sharing and traffic offloading mechanism is proposed to realize the cooperation and competition between the macro-cell base station (MBS) and small-cell base stations (SBSs). Under the cooperation mode, the MBS stops occupying a corresponding channel, and a selected SBS helps offload the traffic from the MBS by exclusively using this channel. To facilitate the offloading negotiation between the MBS and SBSs, we design a second-price auction mechanism, which presents positive allocative externalities, i.e., other uncooperative SBSs can benefit from the cooperation between the MBS and the SBS performing offloading. Meanwhile, the unique optimal biding strategies for different SBSs to achieve the symmetric Bayesian equilibrium are derived and obtained in this paper. the performance of the proposed cognitive traffic offloading mechanism is validated in the simulations, which also reveal that there exists the unique optimal offloading threshold for the MBS to achieve the maximum utility.

关键词： Base stations Interchannel interference Heterogeneous networks computer architecture Radio spectrum management Probability distribution"

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Fast Implementation of Volumetric Occupancy Grids 30

Fast Implementation of Volumetric Occupancy Grids

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30th IEEE Intelligent Vehicles symposium (IV)

作者： Slutsky, Michael Dobkin, Daniel Gen Motors Israel Haifa Israel

ISBN: (纸本)9781728105604

Mapping vehicle surroundings using an occupancy grid is commonly a performance bottleneck in many automotive applications. In particular, three dimensional map generation becomes extremely complex because of the additional degree of freedom that significantly increases the amount of occupancy grid cells to be examined. In this work, we present a novel way to speed up generation of volumetric occupancy grids, by approximating heavy calculations and utilizing efficient data structures. Our proposed method produces a 15-fold speedup in a high-resolution mode and demonstrates real-time performance, without discernible impact on the accuracy. A description of the algorithm and the data structures is provided. the algorithm is tested on a multi-sensor system in a challenging environment. Moreover, our design is portable and could suit many platforms, including embedded automotive hardware.

关键词： automotive electronics computer graphic equipment control engineering computing data structures driver information systems embedded systems optical radar sensor fusion SLAM (robots) Data structures computer graphic equipment automotive electronics Optical radar control engineering computing driver information systems Sensor fusion Embedded systems Vehicle Occupancy Degree of freedom grids

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