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检索条件"任意字段=15th Symposium on Computer Architecture and High Performance Computing"

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Energy-Efficient IaaS-PaaS Co-design for Flexible Cloud Deployment of Scientific Applications 30

Energy-Efficient IaaS-PaaS Co-design for Flexible Cloud Depl...

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Guyon, David Orgerie, Anne-Cecile Morin, Christine Univ Rennes CNRS INRIA IRISA Rennes France

ISBN: (纸本)9781538677698

Reducing the massive amount of energy consumed by cloud datacenters becomes of major importance. In the usual approach where resources are consolidated into fewer servers in order to power down the others, it still remains periods of time when servers are not fully utilized. Consequently, it exists unused resources that are not exploited although they could be used to execute applications compatible with the variable availability of these resources. In this work, we propose a cloud system where the Platform-as-a-Service (PaaS) and Infrastructure-as-a-Service (IaaS) layers interact to find execution trade-offs that exploit the unused resources at IaaS level. PaaS users are involved in the energy optimization by proposing to delay their executions and adapt resource sizes in order to fit with the available unused resources. Our evaluation by simulation is based on real data and expresses a realistic large scale cloud scenario. Results show that according to the proportion of energy-aware users, this system is able to reduce the amount of servers by using resources that would have been wasted otherwise. therefore, our solution allows datacenters to consume less energy than with usual resource managers where all applications start their execution at submission time with their initial resource size.

关键词： Cloud computing Infrastructure-as-a-Service Platform-as-a-Service energy

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Variable-size batched condition number calculation on GPUs 30

Variable-size batched condition number calculation on GPUs

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Anzt, Hartwig Dongarra, Jack Flegar, Goran Gruetzmacher, thomas Karlsruhe Inst Technol Karlsruhe Germany Univ Tennessee Knoxville TN 37996 USA Oak Ridge Natl Lab Oak Ridge TN USA Univ Manchester Manchester Lancs England Univ Jaume 1 Castellon de La Plana Spain

ISBN: (纸本)9781538677698

We present a kernel that is designed to quickly compute the condition number of a large collection of tiny matrices on a graphics processing unit (GPU). the matrices can differ in size and the process integrates the use of pivoting to ensure a numerically-stable matrix inversion. the performance assessment reveals that, in double precision arithmetic, the new GPU kernel achieves up to 550 GFLOPs (billions of floating-point operations per second) and 800 GFLOPs on NVIDIA's P100 and V100 GPUs, respectively. the results also demonstrate a considerable speed-up with respect to a workflow that computes the condition number via launching a set of four batched kernels. In addition, we present a variable-size batched kernel for the computation of the matrix infinity norm. We show that this memory-bound kernel achieves up to 90% of the sustainable peak bandwidth.

关键词： Kernel Graphics processing units Instruction sets Registers Bandwidth computer architecture Linear systems

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Phase-Based Data Placement Scheme for Heterogeneous Memory Systems 30

Phase-Based Data Placement Scheme for Heterogeneous Memory S...

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Laghari, Mohammad Ahmad, Najeeb Unat, Didem Koc Univ Comp Sci & Engn Istanbul Turkey

ISBN: (纸本)9781538677698

Heterogeneous memory systems are equipped with two or more types of memories, which work in tandem to complement the capabilities of each other. the multiple memories can vary in latency, bandwidth and capacity characteristics across systems and they come in various configurations that can be managed by the programmer. this introduces an added programming complexity for the programmer. In this paper, we present a dynamic phase-based data placement scheme to assist the programmer in making decisions about program object allocations. We devise a cost model to assess the benefit of having an object in one type of memory over the other and apply the cost model at every application phase to capture the dynamic behaviour of an application. Our cost model takes into account the reference counts of objects and incurred transfer overhead when making a suggestion. In addition, objects can be transferred across memories asynchronously between phases to mask some of the transfer overhead. We test our cost model with a diverse set of applications from NAS Parallel and Rodinia benchmarks and perform experiments on Intel KNL, which is equipped with a high bandwidth memory (MCDRAM) and a high capacity memory (DDR). Our dynamic phase-based data placement performs better than initial placement and achieves comparable or better performance than cache mode of MCDRAM.

关键词： high bandwidth memory object placement MCDRAM DRAM KNL

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Exploring Power Budget Scheduling Opportunities and Tradeoffs for AMR-based Applications 30

Exploring Power Budget Scheduling Opportunities and Tradeoff...

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Qin, Yubo Rodero, Ivan Subedi, Pradeep Parashar, Manish Rigo, Sandro Rutgers State Univ Rutgers Discovery Informat Inst RDI2 Piscataway NJ 08854 USA Univ Estadual Campinas Campinas SP Brazil

ISBN: (纸本)9781538677698

Computational demand has brought major changes to Advanced Cyber-Infrastructure (ACI) architectures. It is now possible to run scientific simulations faster and obtain more accurate results. However, power and energy have become critical concerns. Also, the current roadmap toward the new generation of ACI includes power budget as one of the main constraints. Current research efforts have studied power and performance tradeoffs and how to balance these (e.g., using Dynamic Voltage and Frequency Scaling (DVFS) and power capping for meeting power constraints, which can impact performance). However, applications may not tolerate degradation in performance, and other tradeoffs need to be explored to meet power budgets (e.g., involving the application in making energy-performance-quality tradeoff decisions). this paper proposes using the properties of AMR-based algorithms (e.g., dynamically adjusting the resolution of a simulation in combination with power capping techniques) to schedule or re-distribute the power budget. It specifically explores the opportunities to realize such an approach using checkpointing as a proof-of-concept use case and provides a characterization of a representative set of applications that use Adaptive Mesh Refinement (AMR) methods, including a Low-Mach-Number Combustion (LMC) application. It also explores the potential of utilizing power capping to understand power-quality tradeoffs via simulation.

关键词： Power demand Task analysis Degradation Power system management Power measurement Two dimensional displays computer architecture

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Global and semi-global communication on si-if special session paper 13

Global and semi-global communication on si-if special sessio...

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13th IEEE/ACM International symposium on Networks-on-Chip, NOCS 2019

作者： Vaisband, Boris Iyer, Subramanian S. Department of Elecetrical and Computer Engineering University of California Los Angeles Los AngelesCA United States

ISBN: (纸本)9781450367004

On-chip scaling continues to pose significant technological and design challenges. Nonetheless, the key obstacle in on-chip scaling is the high fabrication cost of the state-of-the-Art technology nodes. An opportunity exists however, to continue scaling at the system level. Silicon interconnect fabric (Si-IF) is a platform that aims to replace both the package and printed circuit board to enable heterogeneous integration and high inter-chip performance. Bare dies are attached directly to the Si-IF at fine vertical interconnect pitch (2 to 10 um) and small inter-die spacing (100 um). the Si-IF is a singlehierarchy integration construct that supports dies of any process, technology, and dimensions. In addition to development of the fabrication and integration processes, system-level challenges need to be addressed to enable integration of heterogeneous systems on the Si-IF. Communication is a fundamental challenge on large Si-IF platforms (up to 300 mm diameter wafers). Different technological and design approaches for global and semi-global communication are discussed in this paper. the area overhead associated with global communication on the Si-IF is determined. © 2019 Association for computing Machinery.

关键词： Silicon wafers

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A Novel SQLite-Based Bare PC Email Server 15th

A Novel SQLite-Based Bare PC Email Server

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15th International Beyond Databases, architectures and Structures Scientific Conference (BDAS)

作者： Alabsi, Hamdan Karne, Ramesh Wijesinha, Alex Almajed, Rasha Rawal, Bharat Almansour, Faris Bemidji State Univ Coll Business Math & Sci Bemidji MN 56601 USA Towson Univ Dept Comp & Informat Sci Towson MD 21212 USA Penn State Univ IST Dept Abington PA 19001 USA

ISBN: (纸本)9783030190934;9783030190927

We describe a SQLite-based mail server that runs on a bare PC with no operating system. the mail server application is integrated with a server-based adaptation of the popular SQLite client database engine. the SQLite database is used for storing mail messages, and mail clients can send/receive email and share files using any Web browser as in a conventional system. the unique features of the bare PC SQLite-based email server include (1) no OS vulnerabilities;(2) the inability for attackers to run any other software including scripts;(3) no support for dynamic linking and execution of external code;(4) a small code footprint making it easy to analyze the code for security flaws;and (5) performance benefits due to eliminating OS overhead. We describe system design and implementation, and give details of the bare machine mail server application. this work serves as a foundation to build future bare machine servers with integrated databases that can support Internet-based collaboration in high-security environments.

关键词： Bare machine computing Bare PC SQLite Database engine Web server Email

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A Scalable Color-Based Caching Scheme in Telco-CDNs 15

A Scalable Color-Based Caching Scheme in Telco-CDNs

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15th International Conference on Network and Service Management, CNSM 2019

作者： Tran, Anh-Tu Ngoc Diep, thanh-Dang Nakajima, Takuma Yoshimi, Masato thoai, Nam Ho Chi Minh City University of Technology VNUHCM High Performance Computing Laboratory Faculty of Computer Science and Engineering Viet Nam Service Strategy Sector Strategic Technology Center TIS Inc. Shinjuku-ku Japan

ISBN: (纸本)9783903176249

Internet traffic is growing quickly, and it is majorly contributed by the proliferation of video services. Content Delivery Networks (CDNs) reduce the video traffic by storing replicas of videos in their cache servers. Nonetheless, the cache servers are usually located outside Internet Service Providers (ISPs). this implies that CDNs cannot reduce the video traffic inside ISP networks. To mitigate this issue, many ISPs build their own CDNs called Telco-CDNs. Genetic Algorithm-based caching is deemed the best approach in terms of traffic reduction. However, it is not practical since its computation time to generate content allocations is extremely long even when using a cluster. A color-based approach was devised to help overcome the drawback at the expense of its increase in traffic. Nevertheless, in case the number of content categories or requests proliferates quickly, the approach also has the same limitation like the Genetic Algorithm-based caching. To resolve the limitation, we propose two novel techniques to hamper the increase in the computation time. One is able to cope with the situation when the number of content categories increases while the other can deal with the circumstance when the number of requests rises. the empirical results show that the computation time is reduced 5x for the former and 7x for the latter at the expense of 1% and 12% increase in traffic for a problem of 5,000 contents, respectively. © 2019 IFIP.

关键词： Internet service providers

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HyperSpace: Distributed Bayesian Hyperparameter Optimization 30

HyperSpace: Distributed Bayesian Hyperparameter Optimization

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Young, M. Todd Hinkle, Jacob Ramanathan, Arvind Kannan, Ramakrishnan Oak Ridge Natl Lab Computat Sci & Engn Div Oak Ridge TN 37830 USA Oak Ridge Natl Lab Comp Sci & Math Div Oak Ridge TN USA

ISBN: (纸本)9781538677698

As machine learning models continue to increase in complexity, so does the potential number of free model parameters commonly known as hyperparameters. While there has been considerable progress toward finding optimal configurations of these hyperparameters, many optimization procedures are treated as black boxes. We believe optimization methods should not only return a set of optimized hyperparameters, but also give insight into the effects of model hyperparameter settings. To this end, we present HyperSpace, a parallel implementation of Bayesian sequential model-based optimization. HyperSpace leverages high performance computing (HPC) resources to better understand unknown, potentially non-convex hyperparameter search spaces. We show that it is possible to learn the dependencies between model hyperparameters through the optimization process. By partitioning large search spaces and running many optimization procedures in parallel, we also show that it is possible to discover families of good hyperparameter settings over a variety of models including unsupervised clustering, regression, and classification tasks.

关键词： Bayesian optimization SMBO parallel computing HPC

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Towards Green Scientific Data Compression through high-Level I/O Interfaces 30

Towards Green Scientific Data Compression Through High-Level...

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30th International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Alforov, Yevhen Novikova, Anastasiia Kuhn, Michael Kunkel, Julian Ludwig, thomas Deutsch Klimarechenzentrum GmbH Hamburg Germany Univ Hamburg Hamburg Germany Univ Reading Reading Berks England

ISBN: (纸本)9781538677698

Every HPC system today has to cope with a deluge of data generated by scientific applications, simulations or large-scale experiments. the upscaling of supercomputer systems and infrastructures, generally results in a dramatic increase of their energy consumption. In this paper, we argue that techniques like data compression can lead to significant gains in terms of power efficiency by reducing both network and storage requirements. However, any data reduction is highly data specific and should comply with established requirements. therefore, unsuitable or inappropriate compression strategy can utilize more resources and energy than necessary. To that end, we propose a novel methodology for achieving on-the-fly intelligent determination of energy efficient data reduction for a given data set by leveraging state-of-the-art compression algorithms and meta data at application-level I/O. We motivate our work by analyzing the energy and storage saving needs of data sets from real-life scientific HPC applications, and review the various lossless compression techniques that can be applied. We find that the resulting data reduction can decrease the data volume transferred and stored by as much as 80% in some cases, consequently leading to significant savings in storage and networking costs.

关键词： HPC I/O interfaces data reduction compression energy consumption

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Classifying Mixed Patterns of Proteins in high-throughput Microscopy Images Using Deep Neural Networks 15th

Classifying Mixed Patterns of Proteins in High-Throughput Mi...

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15th International Conference on Intelligent computing, ICIC 2019

作者： Zhang, Enze Zhang, Boheng Hu, Shaohan Zhang, Fa Wan, Xiaohua High Performance Computer Research Center Institute of Computing Technology Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China Department of Automation Tsinghua University Beijing China School of Software Tsinghua University Beijing China

ISBN: (纸本)9783030267629

Proteins contribute significantly in most body functions within cells, and are essential to the physiological activities of every creature. Microscopy imaging, as a remarkable technique, is applied to observe and identify proteins in different kinds of cells, by which the analysis results are critical to the biomedical studies. However, as the development of high-throughput microscopy imaging, images of protein microscopy are generated in a faster pace ever, making it harder for experts to manually identify them. For better digging and understanding the information of the proteins in those huge amounts of images, it is urgent for methods to identify the mixed-patterned proteins within various cells automatically and accurately. Here in this paper, we design some novel and effective data preparation and preprocessing methods for high-throughput microscopy protein datasets. We propose ACP layer and "buffering" layers, using them to design customized architectures for some typical CNN classifiers with new inputs and head parts. the modifications let the models be more adaptive and accurate to our task. We train the models in more effective and efficient optimization strategies that we design, e.g., cycle learning with learning rate scheduling. Besides, greedy selection of thresholds and multi-sized models ensembling in the post-process stage are proposed to further improve the prediction accuracy. Our experimental results based on Human Protein Atlas datasets demonstrates that the proposed methods show an excellent performance in mixed-patterned protein classifications to date, even beyond the state-of-the-art architecture GapNet-PL by 0.02 to 0.03 in F1 score. the whole work reveals the usefulness of our methods for high-throughput microscopy protein images identification. © 2019, Springer Nature Switzerland AG.

关键词： Proteins

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