At Sandia National Laboratories, a Data Services system has been developed to provide web-based access to high-performancecomputing clusters that host a set Of post-processing applications for very large-scale data m...
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ISBN:
(纸本)0769515525
At Sandia National Laboratories, a Data Services system has been developed to provide web-based access to high-performancecomputing clusters that host a set Of post-processing applications for very large-scale data manipulation and visualization. A three-tier architecture provides a meta-framework for a collection of smaller frameworks, each of which satisfies a particular aspect of the overall system, including frameworks for a common data model, distributed resource management, component-based software on the cluster, and security. A prototype implementation has been completed which demonstrates the use of all of these frameworks in an integrated environment to provide end users the ability to manage and understand simulation results for very large, complex problems.
Standard environments for exploiting idle time of workstations are based on some kind of spying process that detects low CPU usage and informs to a scheduler so that work can be dispatched. this approach generates loc...
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the proceedings contain 51 papers. the special focus in this conference is on Networks, architectures, HPC Systems, Earth Simulator, Experiences and Progress. the topics include: the Gilgamesh mind processor-in-memory...
ISBN:
(纸本)354043674X
the proceedings contain 51 papers. the special focus in this conference is on Networks, architectures, HPC Systems, Earth Simulator, Experiences and Progress. the topics include: the Gilgamesh mind processor-in-memory architecture for petaflops-scale computing;the next high-performancecomputer benchmark;language and compiler support for hybrid-parallel programming on SMP clusters;parallelizing merge sort onto distributed memory parallel computers;improving infiniband routing through multiple virtual networks;an adaptive subblock coherence protocol for improved SMP performance;efficient multiprocessing on commodity clusters;the impact of alias analysis on VLIW scheduling;low-cost value predictors using frequent value locality;integrated i-cache way predictor and branch target buffer to reduce energy consumption;a comprehensive analysis of indirect branch prediction;highperformance and energy efficient serial prefetch architecture;a programmable memory hierarchy for prefetching linked data structures;block red-black ordering method for parallel processing of ICCG solver;integrating performance analysis in the Uintah software development cycle;performance of adaptive mesh refinement scheme for hydrodynamics on simulations of expanding supernova envelope;an MPI benchmark program library and its application to the earth simulator;large-scale parallel computing of cloud resolving storm simulator;studying new ways for improving adaptive history length branch predictors;speculative clustered caches for clustered processors;the effects of timing dependence and recursion on parallel program schemata;an epic processor with pending functional units and distributed genetic algorithm with multiple populations using multi-agent.
the proceedings contain 47 papers. the topics discussed include: the Gilgamesh MIND processor-in-memory architecture for petaflops-scale computing;language and compiler support for hybrid-parallel programming on SMP c...
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ISBN:
(纸本)354043674X
the proceedings contain 47 papers. the topics discussed include: the Gilgamesh MIND processor-in-memory architecture for petaflops-scale computing;language and compiler support for hybrid-parallel programming on SMP clusters;parallelizing merge sort onto distributed memory parallel computers;low-cost value predictors using frequent value locality;integrated i-cache way predictor and branch target buffer to reduce energy consumption;a programmable memory hierarchy for prefetching linked data structures;integrating performance analysis in the Uintah software development cycle;parallel simulation of seismic wave propagation;routing mechanism for static load balancing in a partitioned computer system with a fully connected network;the effects of timing dependence and recursion on parallel program schemata;software energy optimization of real time preemptive tasks by minimizing cache-related preemption costs;and distributed genetic algorithm with multiple populations using multi-agent.
the increasing amount and variety of domain knowledge and the availability of increasingly large quantities of electronic literature requires new types of support for the development of complex knowledge models. In pr...
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ISBN:
(纸本)0769516149
the increasing amount and variety of domain knowledge and the availability of increasingly large quantities of electronic literature requires new types of support for the development of complex knowledge models. In previous publications we proposed the application of so called Annotated Bayesian Networks (ABN), textually enriched probabilistic domain models, which help knowledge engineers and medical experts to find and organize the information necessary in model building. In this paper we describe an information retrieval language in which the formalized domain knowledge and the attached textual information can be accessed in an integrated fashion and can be used to define various retrieval schemes and relevance measures. this language, on one hand, provides maximum flexibility for knowledge engineers to exploit the available annotated domain model as contextual information. On the other hand, it allows the definition of complex, high-level queries, in which the contextual use of the annotated domain model can be optimized for clinical situations. We compare the performance of the standard and the proposed query language in the ovarian cancer domain.
this paper introduces semi-user-level communication architecture, a new high-performance light-weighted communication architecture for inter-node communication of clusters. Different from traditional kernel-level netw...
this paper reports on our experiments on using the Infineon TriCore as a building block for a multimedia processor. the experiments aim to obtain a highperformance processor using two strategies: integrating multimed...
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ISBN:
(纸本)0769517919
this paper reports on our experiments on using the Infineon TriCore as a building block for a multimedia processor. the experiments aim to obtain a highperformance processor using two strategies: integrating multimedia units into the TriCore CPU and constructing the TriCore in multiprocessor configuration. the design and implementation of the multimedia units for video, audio, and text compressions are discussed. Two hardware architectures for IMA ADPCM audio compression multimedia unit were designed: direct architecture and sequential architecture. the multimedia unit for text compression is based on a modification from another design;our design uses a more efficient timing operation and has a better hardware utilization than the original design. Two algorithms for parallel motion-estimation were implemented on the multiple TriCore system. the results show that the TriCore is a good building block for a multiprocessor system.
作者:
Chien, A.A.Entropia
Inc. 10145 Pacific Heights Suite 800 San DiegoCA92121 United States University of California
San Diego 9500 Gilman Drive San DiegoCA92093 United States
Distributed computing, the exploitation of idle cycles on pervasive desktop PC systems, offers the opportunity to increase the available computing power by orders of magnitude (10-1,000 times). However, for desktop PC...
the personal universal controller (PUC) is an approach for improving the interfaces to complex appliances by introducing an intermediary graphical or speech interface. A PUC engages in two-way communication with every...
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ISBN:
(纸本)9781581134889
the personal universal controller (PUC) is an approach for improving the interfaces to complex appliances by introducing an intermediary graphical or speech interface. A PUC engages in two-way communication with everyday appliances, first downloading a specification of the appliance's functions, and then automatically creating an interface for controlling that appliance. the specification of each appliance includes a high-level description of every function, a hierarchical grouping of those functions, and dependency information, which relates the availability of each function to the appliance's state. Dependency information makes it easier for designers to create specifications and helps the automatic interface generators produce a higher quality result. We describe the architecturethat supports the PUC, and the interface generators that use our specification language to build high-quality graphical and speech interfaces.
this article describes a new approach to HW-SW codesign for complex embedded systems, using high-level programming languages. Unlike in previous approaches, the designer does not need to acquire new skills, because mo...
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this article describes a new approach to HW-SW codesign for complex embedded systems, using high-level programming languages. Unlike in previous approaches, the designer does not need to acquire new skills, because most of the design process is automated. the hardware extensions are implemented as simple coprocessors consisting of a reconfigurable datapath and a control memory. Our approach is demonstrated with a simple image processing application, obtaining a 100% performance improvement.
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