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Life with Ed: A case study of a linux BIOS/BProc cluster 16

Life with Ed: A case study of a linux BIOS/BProc cluster

引用

16th Annual International symposium on high performance computing Systems and Applications, HPCS 2002

作者： Choi, Sung-Eun Hendriks, Erik A. Minnich, Ronald G. Sottile, Matthew J. Marks, Aaron J. Advanced Computing Laboratory Los Alamos National Laboratory Los AlamosNM87545 United States Department of Computer and Information Science University of Pennsylvania PhiladelphiaPA19104 United States

ISBN: (纸本)0769516262

In this paper, we describe experienc es with our 127- no de/161-processor A lpha cluster testbed, Ed. Ed is unique for two distinct reasons. First, we have replac ed the standard BIOS on the cluster no des with the Lin- uxBIOS which loads Linux directly from non-volatile memory (Flash RAM). Se cond, the op erating system provides a single-system image of the entir e cluster, much like a traditional supercomputer. We will discuss the advantages of such a cluster, including time to boot (101 se conds for 100 nodes), upgrade (same as time to boot), and start processes (2.4 seconds for 15,000 pro- cesses). A dditionally,we have disc over edthat certain predictions about the nature of terascale clusters, such as the ne ed for hier archical structur e,are false. Fi- nally, we argue that to achieve true scalability, teras- cale clusters must be built in the way of Ed. © 2002 IEEE.

关键词： Linux

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A metascheduler for the Grid

A metascheduler for the Grid

引用

International symposium on high performance Distributed computing

作者： S.S. Vadhiyar J.J. Dongarra Computer Science Department University of Tennessee USA

With the advent of Grid computing, scheduling strategies for distributed heterogeneous systems have either become irrelevant or have to be extended significantly to support Grid dynamics. In this paper, we describe a metascheduling architecture for a Grid system that takes into account both the application and system level considerations. Results are presented to demonstrate the usefulness of the metascheduler.

关键词： Processor scheduling Dynamic scheduling Libraries Distributed computing Contracts computer science computer architecture Mars Lifting equipment Grid computing

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Irregular assignment computations on cc-NUMA multiprocessors

Irregular assignment computations on cc-NUMA multiprocessors

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4th International symposium on high performance computing, ISHPC 2002

作者： Arenaz, Manuel Tourino, Juan Doallo, Ramon Computer Architecture Group Department of Electronics and Systems University of A Coruña Campus de Elviña s/n A Coruña15071 Spain

ISBN: (纸本)354043674X

this paper addresses the parallelization of loops with irregular assignment computations on cc-NUMA multiprocessors. this loop pattern is distinguished by the existence of loop-carried output data dependences that can only be detected at run-time. A parallelization technique based on the inspector-executor model is proposed in this paper. In the inspector, loop iterations are reordered so that they can be executed in a conflict-free manner during the executor stage. the design of the inspector ensures load-balancing and uniprocessor data write locality exploitation. Experimental results show the scalability of this technique, which is presented as a clear alternative to other existing methods. © Springer-Verlag Berlin Heidelberg 2002.

关键词： Multiprocessing systems

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Simulating L3 caches in real time using hardware accelerated cache simulation (HACS): a case study with SPECint 2000

Simulating L3 caches in real time using hardware accelerated...

引用

International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： M. Watson J.K. Flanagan Performance Evaluation Laboratory Computer Science Department Brigham Young University Provo UT USA

Trace-driven simulation is a commonly used tool to evaluate memory-hierarchy designs. Unfortunately, trace collection is very expensive, and storage requirements for traces are very large. In this paper, we introduce HACS (Hardware Accelerated Cache Simulator), and describe the validation methods we used to demonstrate functionality. We also present some initial cache simulation results from SPECint 2000. We then propose future directions for research with HACS.

关键词： Hardware Acceleration computer aided software engineering Computational modeling Probes Buffer storage computer simulation Field programmable gate arrays Laboratories computer science

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Distributed electric field approximation

Distributed electric field approximation

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IEEE International symposium on high performance computing Systems and Applications (HPCS)

作者： D. Trybus Z. Kucerovsky A. Ieta T.E. Doyle University of Western Ontario ONT Canada

Grid or mesh techniques are frequently used to approximate continuous entities that behave in a wave or fluid-like fashion. Partial Differential Equations (PDEs) are usually involved in the description of such entities or processes. Distributed parallel computation was used in various computer cluster configurations to calculate PDE solutions of electrostatic field. the study of the efficacy of the selected architecture using mesh techniques was intended. the match between the algorithm and the architecture in achieving maximum computational performance was also investigated. the developed architectures, algorithms, and findings are presented in the paper.

关键词： Grid computing Clustering algorithms Concurrent computing Distributed computing computer architecture Linux Partitioning algorithms Partial differential equations Electrostatics Parallel processing

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Efficient simulation of synthesis-oriented system level designs

Efficient simulation of synthesis-oriented system level desi...

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15th International symposium on System Synthesis

作者： Savoiu, Nick Shukla, Sandeep K. Gupta, Rajesh K. Center for Embedded Computer Systems University of California Irvine Irvine CA United States

Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware systems have some inherent parallelism efficiently expressing it depends on whether the target usage is synthesis or simulation. For synthesis, designs are usually described with synthesis tools in mind and are therefore partitioned according to the targeted hardware units. For simulation, runtime efficiency is critical but our previous work has shown that a synthesis-oriented description is not necessarily the most efficient, especially if using multiprocessor simulators. Multiprocessor simulation requires preemptive multithreading but most current C++-based high level system description languages use cooperative multithreading to exploit parallelism to reduce overhead. We have seen that, for synthesis-oriented models, along with adding preemptive threading we need to transform the threading structure for good simulation performance. In this paper we present an algorithm for automatically applying such transformations to C++-based hardware models, ongoing work aimed at proving the equivalence between the original and transformed model, and a 62% to 76% simulation time improvement on a dual processor simulator.

关键词： Systems analysis

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Improving the communication network of a cluster of PC's to solve implicit CFD problems

Improving the communication network of a cluster of PC's to ...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： R.S. Silva M.F.P. Rivello R. Amorim Computer Science Department Laboratório Nacional de Computação Científica Brazil Computer Science Department Universidade Católica de Petrópolis Brazil

In this work we investigate the feasibility of using a cluster of PCs built with mass market networks to deal with the necessities of the CFD community, in particular for unstructured implicit CFD solvers that require a very irregular pattern of communications. We report the initial findings from a series of experiments with some well known benchmarks to determine CFD application sensitivity to machine communication parameters. this is done by running these benchmarks on a cluster in which the communication network has been modified to allow an increase of the bandwidth by adding multiple channels and a reduction on the latency by using a lightweight protocol like the M-Via.

关键词： Communication networks Computational fluid dynamics Ethernet networks Protocols computer science Bandwidth Delay computer networks high performance computing Bonding

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architecture requirements for commercializing Grid resources

Architecture requirements for commercializing Grid resources

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International symposium on high performance Distributed computing

作者： C. Kenyon G. Cheliotis IBM Zurich Research Laboratory Switzerland

Contemporary computing systems, especially large-scale systems such as Grids promise ultra-fast ubiquitous utility computing, always available at the flip of a switch. A major unresolved issue is the organization and efficient usage of such infrastructure in a commercial context where several entities compete for shared resources. this has long been resolved for conventional utility resources such as gas and electricity through commoditization, a variety of market designs, customization, and decision support for the resulting portfolios of assets and commitments. the paper reviews the state of Grid commercialization and compares it to the commercialization of conventional resources. We draw specific lessons for commercialized Grids and detail them as architecture requirements at each level of the architecture stack. We provide an example to illustrate the benefits of commercialized resources in terms of the financial clarity it brings to decisions for different user groups, namely application users and IT managers.

关键词： Commercialization Grid computing Pervasive computing Switches computer architecture Distributed computing Power grids Portfolios computer network management Financial management

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Exploiting loop-level parallelism with the Shift architecture

Exploiting loop-level parallelism with the Shift Architectur...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： C.D. Lima T. Nakamura Computer Architecture Laboratory Graduate School of Information Sciences University of Tohoku Sendai Miyagi Japan

the limited amount of instruction-level parallelism inherent in applications is a limiting factor for improving the performance of most conventional microprocessors. A promising solution to overcome this problem is to exploit coarser granularities of parallelism. In this paper, we propose exploiting loop-level parallelism in a multithreaded fashion. We use the Shift architecture as a baseline architecture, with improved compiler support and register file. the compiler converts iterations of a loop into threads, to be executed by multiple processing elements. the hardware provides a selective register shifting mechanism in order to allow the execution of loops containing loop-carried data dependences, which are very difficult to execute by using conventional architectures. In this paper, we simulate and discuss the parameters of major importance for the implementation of this architectural approach. Our initial results show that, on two simple numerical benchmarks, a considerable amount of iteration overlapping can be potentially achieved by an implementation of the Shift architecture, in comparison with a multiprocessor machine.

关键词： Parallel processing computer architecture Microprocessors Laboratories Application software Yarn Hardware Continuous improvement Delay Proposals

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An evaluation of processor co-allocation for different system configurations and job structures

An evaluation of processor co-allocation for different syste...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： A.I.D. Bucur D.H.J. Epema Faculty of Information Technology and Systems Delft University of Technnology Delft Netherlands

In systems consisting of multiple clusters of processors such as our Distributed ASCI Supercomputer (DAS), jobs may request co-allocation, i.e., the simultaneous allocation of processors in different clusters. We simulate such systems ignoring communication among the tasks of jobs, and determine the response times for different types and sizes of job requests, and for different numbers and sizes of clusters. In many cases we also compute or approximate the maximum utilization. We find that the numbers and sizes of the clusters and of the job components have a strong impact on performance, and that in many cases co-allocation is a viable choice.

关键词： Delay Processor scheduling Information technology Postal services Grid computing Application software Dispersion Concurrent computing Acceleration Clustering algorithms

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