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Bulk synchronous parallel computing using a high bandwidth optical interconnect

Bulk synchronous parallel computing using a high bandwidth o...

引用

International symposium on Parallel and Distributed Processing (IPDPS)

作者： I. Gourlay P.M. Dew K. Djemame School of Computing University of Leeds Leeds UK

the list of applications requiring high performance computing resources is constantly growing. the cost of inter-processor communication is critical in determining the performance of massively parallel computing systems for many of these applications. this paper considers the feasibility of a commodity processor-based system which uses a free-space optical interconnect. A novel architecture, based on this technology, is presented. Analytical and simulation results based on an implementation of BSP (Bulk Synchronous Parallelism) are presented, indicating that a significant performance enhancement, over architectures using conventional interconnect technology, is possible.

关键词： Parallel processing Bandwidth Optical interconnections Costs computer architecture Smart pixels Space technology Concurrent computing Optical computing Personal communication networks

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InfoGram: a grid service that supports both information queries and job execution

InfoGram: a grid service that supports both information quer...

引用

International symposium on high performance Distributed computing

作者： G. von Laszewski J. Gawor C.J. Pena I. Foster Argonne National Laboratory IL USA Argonne National Laboratory Argonne IL US Argonne Nat. Lab. IL USA

the research described in this paper is performed as part of the Globus Project. It introduces a new grid service called InfoGram that combines the ability of serving as information service and as a job execution service. Previously, both services were architected and implemented within the Globus Toolkit as two different services with different wire protocols. Our service demonstrates a significant simplification of the architecture while treating job submissions and information queries alike. the advantage of our service is that it provides backwards compatibility to existing grid services, while at the same time providing forwards compatibility to the emerging Web services world. Part of the work conducted within this effort is already reused by the current open grid services architecture prototype implementation.

关键词： Resource management Protocols computer architecture Prototypes Project management Information security Laboratories Wire Web services computer science

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Software architecture-based adaptation for Grid computing

Software architecture-based adaptation for Grid computing

引用

International symposium on high performance Distributed computing

作者： Shang-Wen Cheng D. Garlan B. Schmerl P. Steenkiste Ningning Hu School of Computer Science Carnegie Mellon University Pittsburgh PA USA

Grid applications must increasingly self-adapt dynamically to changing environments. In most cases, adaptation has been implemented in an ad hoc fashion, on a per-application basis. this paper describes work which generalizes adaptation so that it can be used across applications by providing an adaptation framework. this framework uses a software architectural model of the system to analyze whether the application requires adaptation, and allows repairs to be written in the context of the architectural model and propagated to the running system. In this paper, we exemplify our framework by applying it to the domain of load-balancing a client-server system. We report on an experiment conducted using our framework, which illustrates that this approach maintains architectural requirements.

关键词： Grid computing Application software Runtime Network servers Humans Mechanical factors Monitoring computer science computer networks Availability

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Grid services in action: grid enabled optimisation and design search

Grid services in action: grid enabled optimisation and desig...

引用

International symposium on high performance Distributed computing

作者： S.J. Cox R.P. Boardman L. Chen M. Duta H. Eres M.J. Fairman Z. Jiao M. Giles C.A. Goble G.E. Pound A.J. Keane M. Scott N.R. Shadbolt F. Tao J.L. Wason G. Xue School of Engineering Sciences University of Southampton UK Dept Electronics and Computer Science University of Southampton UK Computing Laboratory Oxford University UK Dept Computer Science University of Manchester Institute of Science and Technology UK

We are developing a Grid Enabled Optimisation and Design Search system (GEODISE). It offers grid-based access to a state-of-the-art collection of optimisation and design search tools, industrial strength analysis code... 详细信息

关键词： Design optimization Design engineering Data engineering Computational fluid dynamics Grid computing computer architecture Data visualization computer science Distributed computing Resource management

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Scalability of a distributed neural information retrieval system 02

Scalability of a distributed neural information retrieval sy...

引用

International symposium on high performance Distributed computing

作者： M. Weeks V.J. Hodge J. Austin Computer Science Department University of York York UK

ISBN: (纸本)9780769516868

Summary form only given. AURA (Advanced Uncertain Reasoning architecture) is a generic family of techniques and implementations intended for high-speed approximate search and match operations on large unstructured datasets. AURA technology is fast, economical, and offers unique advantages for finding near-matches not available with other methods. AURA is based upon a high-performance binary neural network called a correlation matrix memory (CMM). Typically, several CMM elements are used in combination to solve soft or fuzzy pattern-matching problems. AURA takes large volumes of data and constructs a special type of compressed index. AURA finds exact and near-matches between indexed records and a given query, where the query itself may have omissions and errors. the degree of nearness required during matching can be varied through thresholding techniques. the PCI-based PRESENCE (Parallel Structured Neural computing Engine) card is a hardware-accelerator architecture for the core CMM computations needed in AURA-based applications. the card is designed for use in low-cost workstations and incorporates 128 MByte of low-cost DRAM for CMM storage. To investigate the scalability of the distributed AURA system, we implement a word-to-document index of an AURA-based information retrieval system, called MinerTaur, over a distributed PRESENCE CMM.

关键词： Scalability Information retrieval Coordinate measuring machines computer architecture Concurrent computing Aircraft Artificial neural networks computer science Environmental economics Neural networks

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highly efficient digital CMOS accelerator for image and graphics processing

Highly efficient digital CMOS accelerator for image and grap...

引用

Annual IEEE International ASIC/SOC Conference

作者： M. Margala Rong Lin Electrical and Computer Engineering Department University of Rochester Rochester NY USA Computer Science Department SUNY at Geneseo Geneseo NY USA

this paper presents a novel high-bandwidth digital accelerator for image and graphics processing applications. the proposed architecture outperforms previously proposed processing-in-memory architectures in speed, area and power by up to several orders of magnitude. Several variations of the design have been implemented in 2.5 V 0.25 /spl mu/m and 1.8 V 0.18 /spl mu/m CMOS technology.

关键词： CMOS process computer architecture Random access memory Application software CMOS technology Integrated circuit technology computer graphics Power engineering computing Portable computers Energy consumption

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Hybrid system, a new low cost parallel cluster

Hybrid system, a new low cost parallel cluster

引用

IEEE International symposium on high performance computing Systems and Applications (HPCS)

作者： Leo Chin Sim H. Schroder G. Leedham School of Computer Engineering NTU Singapore School of Computer Science & IT RMIT University Melbourne Australia

this paper describes a new parallel architectural system which we called Hybrid System. As the name implies, Hybrid System is a combination of both SIMD and MIMD systems working concurrently. this new parallel architecture has the capability of achieving speed-up rates more than MIMD can achieve alone and can also be more flexible than multiple SIMD on a single station. In this paper, we introduce our new SIMD concept and also show the contribution of the SIMD on the Hybrid System. We also developed a general formula for determining the speedup of the Hybrid System so that accurate predictions can be made on its performance. this, we establish by comparing the measured speedup with the computed speedup for a volume rendering application.

关键词： Costs Application software Concurrent computing Parallel processing computer applications Taxonomy Equations Rendering (computer graphics) Parallel architectures Identity-based encryption

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Power and performance evaluation of globally asynchronous locally synchronous processors

Power and performance evaluation of globally asynchronous lo...

引用

Annual International symposium on computer architecture, ISCA

作者： A. Iyer D. Marculescu Electrical and Computer Engineeirng Department Carnegie Mellon University Pittsburgh PA USA

We use a cycle-accurate simulation environment to study the impact of asynchrony in a superscalar processor architecture. Our results show that as expected, going from a synchronous to a globally asynchronous locally synchronous (GALS) design causes a drop in performance, but elimination of the global clock does not lead to drastic power reductions. From a power perspective, GALS designs are inherently less efficient when compared to synchronous architectures. However, the flexibility offered by the independently controllable local clocks enables the effective use of other energy conservation techniques like dynamic voltage scaling. Our results show that for a 5-clock domain GALS processor, the drop in performance ranges between 5-15%, while power consumption is reduced by 10% on the average. Fine-grained voltage scaling reduces the gap between fully synchronous and GALS implementations, allowing for better power efficiency.

关键词： Clocks Signal design Microprocessors Timing Process design Dynamic voltage scaling Circuits Frequency Distributed computing Power engineering computing

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Natural language processing complexity and parallelism

Natural language processing complexity and parallelism

引用

IEEE International symposium on high performance computing Systems and Applications (HPCS)

作者： C. Moghrabi S.E. Moussa M.S. Eid Universite Moncton Canada Canada

this paper reviews the processes involved in Natural Language Processing (NLP). It then demonstrates the various kinds of choices that need be taken during the execution of the word morphology, the syntactic text analysis, or text generation components. It compares the time complexity of traditional serial algorithms and examines the possible expected gain in some corresponding parallel counterparts.

关键词： Natural language processing Morphology Dictionaries Parallel processing Text analysis Text recognition Natural languages Strips computer architecture Information analysis

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Efficient simulation of synthesis-oriented system level designs

Efficient simulation of synthesis-oriented system level desi...

引用

International symposium on System Synthesis

作者： N. Savoiu S.K. Shukla R.K. Gupta Center for Embedded Computer Systems University of California Irvine USA

Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware systems have some inherent parallelism efficiently expressing it depends on whether the target usage is synthesis or simulation. For synthesis, designs are usually described with synthesis tools in mind and are therefore partitioned according to the targeted hardware units. For simulation, runtime efficiency is critical but our previous work has shown that a synthesis-oriented description is not necessarily the most efficient, especially if using multiprocessor simulators. Multiprocessor simulation requires preemptive multithreading but most current C++-based high level system description languages use cooperative multithreading to exploit parallelism to reduce overhead. We have seen that, for synthesis-oriented models, along with adding preemptive threading we need to transform the threading structure for good simulation performance. In this paper we present an algorithm for automatically applying such transformations to C++-based hardware models, ongoing work aimed at proving the equivalence between the original and transformed model, and a 62% to 76% simulation time improvement on a dual processor simulator.

关键词： Context modeling Hardware Multithreading Concurrent computing Computational modeling Parallel processing Algorithm design and analysis Kernel Embedded computing computer simulation

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