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Transparent Near-Memory computing with a Reconfigurable Processor 17th

Transparent Near-Memory Computing with a Reconfigurable Proc...

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17th International symposium on Applied Reconfigurable computing, ARC 2021

作者： Lesniak, Fabian Kreß, Fabian Becker, Jürgen Karlsruhe Institute of Technology Karlsruhe Germany

ISBN: (纸本)9783030790240

Data intensive applications like machine learning or big data analysis have stressed the requirements on memory subsystems. they involve computational kernels whose performance is not limited by the algorithmic complexity, but by the large amount of data they need to process. To counteract the growing gap between computing power and memory bandwidth, near-memory processing techniques have been addressed to improve the performance in such applications significantly. In this paper, we leverage a general purpose processor extended with a reconfigurable framework to execute hardware-accelerated instructions. this framework features a high-bandwidth memory interface to the nearest memory controller, allowing for greatly increased bandwidth compared to the standard system bus. We introduce region-based data processing, which allows to trigger operations by merely storing data and is especially suitable for large many-core designs. We show two different approaches to trigger the architecture for near-memory operations, one using interrupts for software-assisted processing and one directly interfacing with the hardware accelerator. Our evaluations show a performance gain of 72% on SAD kernels, with memory performance improved by 48%. Benchmarking AES encryption, we can show a speed up of 70%. © 2021, Springer Nature Switzerland AG.

关键词： computing power

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Machine Learning-Based GPU Energy Prediction for Workload Management in Datacenters

Machine Learning-Based GPU Energy Prediction for Workload Ma...

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IEEE Annual computing and Communication Workshop and Conference (CCWC)

作者： Brandon Ismalej Matthew Smith Xunfei Jiang Department of Computer Science California State University Northridge Northridge CA

ISBN: (数字)9798331507695

ISBN: (纸本)9798331507701

Data centers (DCs) have become a vital component of a digital economy, accounting for approximately 1% of worldwide energy consumption, as the reliance on cloud services and GPU hardware increases for high-performance computing (HPC) tasks. Despite various strategies for improving energy efficiency, there is a lack of research integrating real-world workload traces into the prediction of GPU power consumption, mainly due to the lack of publicly available data. this research addresses this gap by utilizing synthetic data generated to mimic the GPU intensity of real-world workload characteristics and developing GPU power prediction models for integration into the GPUCloudSim Plus simulator. We conducted a statistical analysis of Alibaba and Helios workload traces and ran experiments with diverse GPU-intensive tasks to emulate real-world workloads. Using task-average metrics, we trained four machine learning (ML) models to predict GPU power consumption, with the best performing XGBoost model yielding an RMSE of 1.217. We propose this modeling design to integrate a GPU power prediction model into the GPUCloudSim Plus simulator. Energy-aware simulations for GPU-intensive workloads could be verified on workloads from real data centers, advancing the study of workload management.

关键词： Measurement Data centers Power demand Statistical analysis Biological system modeling Computational modeling Graphics processing units Predictive models Data models Synthetic data

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FPPNet: Fast Privacy-Preserving Neural Network via three-Party Arithmetic Secret Sharing 15th

FPPNet: Fast Privacy-Preserving Neural Network via Three-Pa...

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15th EAI International Conference on Mobile Multimedia Communications, MobiMedia 2022

作者： Bi, Renwan Xiong, Jinbo Li, Qi Liu, Ximeng Tian, Youliang Fujian Provincial Key Laboratory of Network Security and Cryptology College of Computer and Cyber Security Fujian Normal University Fuzhou350117 China School of Computer Science Nanjing University of Posts and Telecommunications Nanjing210023 China Key Laboratory of Cryptography of Zhejiang Province Hangzhou Normal University Hangzhou311121 China Key Laboratory of Information Security of Network Systems College of Mathematics and Computer Science Fuzhou University Fuzhou350108 China State Key Laboratory of Public Big Data College of Computer Science and Technology Guizhou University Guiyang550025 China

ISBN: (纸本)9783031239014

Jointing multi-source data for model training can improve the accuracy of neural network. To solve the raising privacy concerns caused by data sharing, data are generally encrypted and outsourced to a group of cloud servers for computing and processing. In this client-cloud architecture, we propose FPPNet, a fast and privacy-preserving neural network for secure inference on sensitive data. FPPNet is deployed in three cloud servers, who collaboratively execute privacy computing via three-party arithmetic secret sharing. We develop the secure conversion method between additive shares and multiplicative shares, and propose three secure protocols to calculate non-linear functions, such as comparison, exponent and division that are superior to prior three-party works. Some secure modules for running convolutional, ReLU, max-pooling and Sigmoid layers are designed to implement FPPNet. We theoretically analyze the security and complexity of the proposed protocols. With MNIST dataset and two types of neural networks, experimental results validate that our FPPNet is faster than the related works, and the accuracy is the same as that of plaintext neural network. © 2022, ICST Institute for computer Sciences, Social Informatics and Telecommunications Engineering.

关键词： Sensitive data

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AIR: A Light-Weight Yet high-performance Dataflow Engine based on Asynchronous Iterative Routing 32

AIR: A Light-Weight Yet High-Performance Dataflow Engine bas...

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32nd IEEE International symposium on computer architecture and high-performance computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Venugopal, Vinu E. theobald, Martin Chaychi, Samira Tawakuli, Amal Univ Luxembourg Fac Sci Technol & Med Belval Luxembourg

ISBN: (纸本)9781728199245

Distributed Stream Processing Engines (DSPEs) are currently among the most emerging topics in data management, with applications ranging from real-time event monitoring to processing complex dataflow programs and big data analytics. In this paper, we describe the architecture of our AIR engine, which is designed from scratch in C++ using the Message Passing Interface (MPI), pthreads for multithreading, and is directly deployed on top of a common HPC workload manager such as SLURM. AIR implements a light-weight, dynamic sharding protocol (referred to as "Asynchronous Iterative Routing"), which facilitates a direct and asynchronous communication among all worker nodes and thereby completely avoids any additional communication overhead with a dedicated master node. With its unique design, AIR fills the gap between the prevalent scale-out (but Java-based) architectures like Apache Spark and Flink, on one hand, and recent scale-up (and C++ based) prototypes such as StreamBox and PiCo, on the other hand. Our experiments over various benchmark settings confirm that AIR performs as good as the best scale-up SPEs on a single-node setup, while it outperforms existing scale-out DSPEs in terms of processing latency and sustainable throughput by a factor of up to 15 in a distributed setting.

关键词： Asynchronous stream processing Dataflow processing engine Distributed stream data processing high sustainable throughput Stream processing

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Summary: A domain specific-model and DevOps approach for big data analytics architectures 15

Summary: A domain specific-model and DevOps approach for big...

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15th European Conference on Software architecture - Companion, ECSA-C 2021

作者： Castellanos, Camilo Varela, Carlos A. Correal, Dario System Engineering and Computing Department Universidad de Los Andes Bogota Colombia Department of Computer Science Rensselaer Polytechnic Institute TroyNY United States

Big data analytics (BDA) applications use machine learning algorithms to extract insights from large, fast, and heterogeneous data sources. Software engineering challenges for BDA applications include ensuring performance levels of data-driven algorithms even in the presence of large data volume, velocity, and variety (3Vs). BDA software complexity frequently leads to delayed deployments and challenging performance assessments. this paper1 proposes a domain-specific modeling (DSM) and DevOps practices to design, deploy, and monitor performance metrics for BDA architectures. Our proposal includes a design process and framework to define architectural inputs, functional, and deployment views via integrated high-level abstractions to monitor the achievement of quality scenarios. We evaluate our approach with four use cases from different domains. Our results show shorter deployment and monitoring times and a higher gain factor per iteration than similar approaches. © 2021 Copyright for this paper by its authors. Use permitted under Creative Commons License Attribution 4.0 International (CC BY 4.0).

关键词： Data Analytics

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Parallel Computations for Solving Multicriteria Mixed-Integer Optimization Problems 15th

Parallel Computations for Solving Multicriteria Mixed-Intege...

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15th International Scientific Conference on Parallel Computational Technologies (PCT)

作者： Gergel, Victor Kozinov, Evgeniy Lobachevsky State Univ Nizhny Novgorod Nizhnii Novgorod Russia

ISBN: (纸本)9783030816919;9783030816902

the paper discusses a new approach to solving computationally time-consuming multicriteria optimization problems in which some variable parameters can only take on discrete values. Under the proposed approach, the solution of mixed-integer optimization problems is reduced to solving a family of optimization problems where only continuous parameters are used. All problems of the family are solved simultaneously in time-shared mode, where the optimization problem for the next global search iteration is selected adaptively, taking into account the search information obtained in the course of the calculations. the suggested algorithms enable parallel computing on high-performance computing systems. the computational experiments confirm that the proposed approach can significantly reduce the computation volume and time required for solving complex multicriteria mixed-integer optimization problems.

关键词： Multicriteria optimization Mixed-integer optimization problems Methods of criteria scalarization Global optimization Search information Parallel computing Computational experiment

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How to Bake Quantum into Your Pet Petri Nets and Have Your Net theory Too 15th

How to Bake Quantum into Your Pet Petri Nets and Have Your N...

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15th symposium and Summer School on Service Oriented computing, SummerSOC 2021

作者： Schmidt, Heinz W. School of Computing Technologies RMIT University Melbourne Australia

ISBN: (纸本)9783030875671

Petri nets have found widespread use among many application domains, not least due to their human-friendly graphical syntax for the composition of interacting distributed and asynchronous processes and services, based in partial-order dependencies and concurrent executions. Petri nets also come with abstract semantics, and mathematical methods for compositional synthesis, structural checks and behavioural analysis. these have led to the use of various kinds of nets for real-time, distributed and parallel programming languages, software and services systems, with a view to their interfaces and interaction protocols. these affordances make Petri nets invaluable for distributed software architecture approaches focused on components, their mutual dependencies and environment-facing interactions. Quantum computing – and in particular quantum software engineering – is in its infancy and could benefit from the accumulated insights of software architecture research and of net theory, its methods, and its applications. In this paper, we establish a connection between Petri nets and quantum systems, such that net theory and the component architecture of nets may help in the synthesis and analysis of abstract software models and their interface protocols in hybrid classical-and-quantum programming languages and services systems. We leverage some insights from net formalisms for software specification for a versatile recipe to bake quantum into extant Petri net flavours, and prove universality and compositionality of Petri nets for quantum programming. © 2021, Springer Nature Switzerland AG.

关键词： Petri nets

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Analysis of Short and Aging Faults in TSVs at the Physical Level with Parametric Variation

Analysis of Short and Aging Faults in TSVs at the Physical L...

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IEEE International symposium on Quality Electronic Design

作者： Prosen Kirtonia Shelby Williams Prasanna Kawatkar Kasem Khalil Magdy Bayoumi Dept. of Electrical and Computer Engr. University of Louisiana at Lafayette Lafayette LA USA Center for Advanced Computer Studies Univ. of Louisiana at Lafayette Lafayette LA USA Department of Electrical and Computer Engineering Univ. of Mississippi Oxford MS USA

ISBN: (数字)9798331509422

ISBN: (纸本)9798331509439

the importance of using chiplets and 3D ICs is growing rapidly, driven by the slowing of Moore's Law and the benefits they offer. Advanced packaging of chiplets, and interconnects in 3D ICs are crucial for enhancing computing performance and power efficiency. Hence, through-Silicon Vias (TSVs) serve as prominent vertical conduits to ensure efficient chip-to-chip communication. the primary objective of this work is to model TSV faults at the material level to observe transmission performance deviations alongside other parametric analyses. We employ Ansys high-Frequency Structure Simulator (HFSS) to design the TSV at the physical level. the reflection coefficient is measured over a 0.1-30 GHz frequency band to observe −15 dB bandwidth for a wide range of lengths $(30-200 \mu m)$ , radius $(4-50 \mu m)$ , and insulator thickness $(0.2-1.5 \mu m)$ , considering distinct densities. Furthermore, a crack of $5-15 \mu m$ is introduced in the dielectric layer to implement a short fault, and copper conductance is reduced by 5-30% for different stages of aging faults to evaluate anomalies. Finally, multiple TSVs are incorporated into the design to assess near-end and far-end cross-talk at 15 and $30 \mu m$ pitch. therefore, before developing an equivalent R-L-C circuit for fault detection, it is essential to investigate functionality and faults at the physical level for a more comprehensive understanding.

关键词： Semiconductor device modeling Semiconductor device measurement three-dimensional displays Chiplets Aging Frequency measurement Reflection coefficient Circuit faults through-silicon vias thickness measurement

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CNN-Based Emotional Stress Classification using Smart Learning Dataset 15

CNN-Based Emotional Stress Classification using Smart Learni...

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2022 IEEE Congress on Cybermatics: 15th IEEE International Conferences on Internet of things, ithings 2022, 18th IEEE International Conferences on Green computing and Communications, GreenCom 2022, 2022 IEEE International Conference on Cyber, Physical and Social computing, CPSCom 2022 and 8th IEEE International Conference on Smart Data, SmartData 2022

作者： Andreas, Andreou Mavromoustakis, Constandinos X. Song, Houbing Batalla, Jordi Mongay Department of Computer Science University of Nicosia University of Nicosia Research Foundation Nicosia Cyprus Security and Optimization for Networked Globe Laboratory Department of Electrical Engineering and Computer Science Embry-Riddle Aeronautical University Daytona Beach FL32114-3900 United States Warsaw University of Technology National Institute of Telecommunications Warsaw Poland

ISBN: (数字)9781665454179

ISBN: (纸本)9781665454179

Smart learning analytics aims to support researchers investigating mental health by improving the interpretation of the datasets acquired from physiological biomarkers. the key enabler for emotional stress classification are Machine Learning (ML) methods in conjunction with Online Transfer Learning (OTL). the knowledge of high-level characteristics at the top layers is obtained through an optimized Convolutional Neural Network (CNN)-based on emotional stress datasets. Nevertheless, the lack of performance in a real-time environment and the temporal patterns of data acquisition complications and their interpretation motivated us to contribute by tackling these concerns. therefore, we propose an innovative procedure based on the aforementioned orientation through our research work. Considering mining data streams with concept drifts, we enable the ensemble classifiers. For evaluation, we compare the proposed classification, the LIBrary for Large LINEAR classification (LIBLINEAR) and the Deep Belief Network with Transfer Learning (DBNTL) model. Furthermore, we utilized a multimodal dataset of physical and biological characteristics obtained by fifteen individuals during a lab study. Finally, our framework based on the extracted results has presented more accuracy in classifying an individual's sense of stress. Hence, the proposed method achieves higher efficiency than the state-of-the-art models. © 2022 IEEE.

关键词： Classification (of information)

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Towards an Energy-Efficient Approximate computer Implementation 6th

Towards an Energy-Efficient Approximate Computer Implementat...

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6th Brazilian Technology symposium, BTSym 2020

作者： Jara, Marcelo Azevedo, Rodolfo Wanner, Lucas Comp. Systems Lab LSC-IC University of Campinas Campinas SP Brazil University of Campinas Campinas SP Brazil

ISBN: (纸本)9783030756796

Under the continuously growing demand for energy-efficiency and high-performance of present computer and communication systems, the approximate computing paradigm emerges as an effective option to satisfy design requirements feasible at different hierarchy levels. In this paper, the implementation design process of an approximate core processor is introduced. this hybrid precise/approximate processor is based on an open-source RISC-V architecture, aiming to characterize the impact and evaluate the overhead of approximate arithmetic circuits, when integrated under the core hierarchy, after completion of physical design. © 2021, the Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Reduced instruction set computing

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