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AIR: A Light-Weight Yet high-performance Dataflow Engine based on Asynchronous Iterative Routing

AIR: A Light-Weight Yet High-Performance Dataflow Engine bas...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： Vinu E. Venugopal Martin theobald Samira Chaychi Amal Tawakuli University of Luxembourg Belval Esch-sur-Alzette Luxembourg Faculty of Science Technology and Medicine University of Luxembourg Belval Luxembourg

ISBN: (数字)9781728199245

ISBN: (纸本)9781728199252

Distributed Stream Processing Engines (DSPEs) are currently among the most emerging topics in data management, with applications ranging from real-time event monitoring to processing complex dataflow programs and big data analytics. In this paper, we describe the architecture of our AIR engine, which is designed from scratch in C++ using the Message Passing Interface (MPI), pthreads for multithreading, and is directly deployed on top of a common HPC workload manager such as SLURM. AIR implements a light-weight, dynamic sharding protocol (referred to as "Asynchronous Iterative Routing"), which facilitates a direct and asynchronous communication among all worker nodes and thereby completely avoids any additional communication overhead with a dedicated master node. With its unique design, AIR fills the gap between the prevalent scale-out (but Java-based) architectures like Apache Spark and Flink, on one hand, and recent scale-up (and C++ based) prototypes such as StreamBox and PiCo, on the other hand. Our experiments over various benchmark settings confirm that AIR performs as good as the best scale-up SPEs on a single-node setup, while it outperforms existing scale-out DSPEs in terms of processing latency and sustainable throughput by a factor of up to 15 in a distributed setting.

关键词： Task analysis throughput computer architecture C++ languages Message systems Resource management Java

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PIM-VR: Erasing Motion Anomalies In highly-Interactive Virtual Reality World With Customized Memory Cube 25

PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtu...

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25th IEEE International symposium on high performance computer architecture (HPCA)

作者： Xie, Chenhao Zhang, Xingyao Li, Ang Fu, Xin Song, Shuaiwen Leon Univ Houston ECE Dept ECMOS Lab Houston TX 77204 USA Pacific Northwest Natl Lab HPC Grp Richland WA 99352 USA

ISBN: (纸本)9781728114446

With the revolutionary innovations emerging in the computer graphics domain, virtual reality (VR) has become increasingly popular and shown great potential for entertainment, medical simulation and education. In the highly interactive VR world, the motion-to-photon delay (MPD) which represents the delay from users' head motion to the responded image displayed on their head devices, is the most critical factor for a successful VR experience. Long MPD may cause users to experience significant motion anomalies: judder, lagging and sickness. In order to achieve the short MPD and alleviate the motion anomalies, asynchronous time warp (ATW) which is known as an image re-projection technique, has been proposed by VR vendors to map the previously rendered frame to the correct position using the latest head-motion information. However, after a careful investigation on the efficiency of the current GPU-accelerated ATW through executing real VR applications on modern VR hardware, we observe that the state-of-the-art ATW technique cannot deliver the ideal MPD and often misses the refresh deadline, resulting in reduced frame rate and motion anomalies. this is caused by two major challenges: inefficient VR execution model and intensive off-chip memory accesses. To tackle these, we propose a preemption-free Processing-In-Memory based ATW design which asynchronously executes ATW within a 3D-stacked memory, without interrupting the rendering tasks on the host GPU. We also identify a redundancy reduction mechanism to further simplify and accelerate the ATW operation. A comprehensive evaluation of our proposed design demonstrates that our PIM-based ATW can achieve the ideal MPD and provide superior user experience. Finally, we provide a design space exploration to showcase different design choices for the PIM-based ATW design, and the results show that our design scales well in future VR scenarios with higher frame resolution and even lower ideal MPD.

关键词： Rendering (computer graphics) Graphics processing units Resists Head Hardware Photonics Task analysis

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15th International symposium on Applied Reconfigurable computing, ARC 2019

15th International Symposium on Applied Reconfigurable Compu...

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15th International symposium on Applied Reconfigurable computing, ARC 2019

ISBN: (纸本)9783030172268

the proceedings contain 28 papers. the special focus in this conference is on Applied Reconfigurable computing. the topics include: Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan;secure Local Configuration of Intellectual Property Without a Trusted third Party;HiFlipVX: An Open Source high-Level Synthesis FPGA Library for Image Processing;Real-Time FPGA Implementation of Connected Component Labelling for a 4K Video Stream;A Scalable FPGA-Based architecture for Depth Estimation in SLAM;Evaluating LULESH Kernels on OpenCL FPGA;the TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable computing Systems;Graph-Based Code Restructuring Targeting HLS for FPGAs;UltraSynth: Integration of a CGRA into a Control Engineering Environment;exploiting Reconfigurable Vector Processing for Energy-Efficient Computation in 3D-Stacked Memories;Optimizing CNN-Based Hyperspectral Image Classification on FPGAs;Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms;reM: A Reconfigurable Multipotent Cell for New Distributed Reconfigurable architectures;Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators;hybrid Prototyping for Manycore Design and Validation;Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks;third Party CAD Tools for FPGA Design—A Survey of the Current Landscape;Filter-Wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation;Exploring Data Size to Run Convolutional Neural Networks in Low Density FPGAs;Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning;Supporting Columnar In-memory Formats on FPGA: the Hardware Design of Fletcher for Apache Arrow;A Novel Encoder for TDCs.

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A Fast and Scalable Pipeline for Stain Normalization of Whole-Slide Images in Histopathology 15th

A Fast and Scalable Pipeline for Stain Normalization of Whol...

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15th European Conference on computer Vision (ECCV)

作者： Stanisavljevic, Milos Anghel, Andreea Papandreou, Nikolaos Andani, Sonali Pati, Pushpak Ruschoff, Jan Hendrik Wild, Peter Gabrani, Maria Pozidis, Haralampos IBM Res Zurich CH-8803 Ruschlikon Switzerland Univ Klinikum Frankfurt Senckenberg Inst Pathol D-60590 Frankfurt Germany Univ Spital Zurich Inst Pathol & Mol Pathol CH-8091 Zurich Switzerland

ISBN: (纸本)9783030110246;9783030110239

Stain normalization is one of the main tasks in the processing pipeline of computer-aided diagnosis systems in modern digital pathology. Some of the challenges in this tasks are memory and runtime bottlenecks associated with large image datasets. In this work, we present a scalable and fast pipeline for stain normalization using a state-of-the-art unsupervised method based on stain-vector estimation. the proposed system supports single-node and distributed implementations. Based on a highly-optimized engine, our architecture enables high-speed and large-scale processing of high-magnification whole-slide images (WSI). We demonstrate the performance of the system using measurements from different datasets. Moreover, by using a novel pixel-sampling optimization we show lower processing time per image than the scanning time of ultrafast WSI scanners with the single-node implementation and additional 3.44 average speed-up with the 4-nodes distributed pipeline.

关键词： Histopathological image processing Whole-slide images Stain normalization Distributed computing Color deconvolution

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the BRISC-V Platform: A Practical Teaching Approach for computer architecture

The BRISC-V Platform: A Practical Teaching Approach for Comp...

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46th International symposium on computer architecture (ISCA) / Workshop on computer architecture Education (WCAE)

作者： Agrawal, Rashmi Bandara, Sahan Ehret, Alan Isakov, Mihailo Mark, Miguel Kinsy, Michel A. Boston Univ Adapt & Secure Comp Syst ASCS Lab Boston MA 02215 USA

ISBN: (纸本)9781450368421

computer architecture lies at the intersection of electrical engineering, digital design, compiler design, programming language theory and high-performance computing. It is considered a foundational segment of an electrical and computer engineering education. RISC-V is a new and open ISA that is gaining significant traction in academia. Despite it being used extensively in research, more RISC-V-based tools need to be developed in order for RISC-V to gain greater adoption in computer organization and computer architecture classes. To that end, we present the BRISC-V Platform, a design space exploration tool which offers: (1) a web-based RISC-V simulator, which compiles C and executes assembly within the browser, and (2) a web-based generator of fully-synthesizable, highly-modular and parametrizable hardware systems with support for different types of cores, caches, and network-on-chip topologies. We illustrate how we use these tools in teaching computer organization and computer architecture classes, and describe the structure of these classes.

关键词： computer architecture computer organization risc-v simulator Verilog generator

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NFVMP: An architecture for NFV Applications from Multiple Providers 20

NFVMP: An Architecture for NFV Applications from Multiple Pr...

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20th Asia-Pacific Network Operations and Management symposium (APNOMS)

作者： Li, Lishan Liu, Ying Wu, Jianping Ren, Gang Tsinghua Univ Inst Network Sci & Cyberspace Beijing Peoples R China Tsinghua Univ Dept Comp Sci & Technol Beijing Peoples R China

ISBN: (纸本)9784885523205

With the evolution of Network Function Virtualization (NFV), small- and medium-size enterprises are increasingly outsourcing their network functions (NFs) to the cloud. In order to obtain cost-effective and high-performance services, customers may utilize NFs from various cloud providers. Current NFV architectures are mostly designed on the assumption of one provider, which utilize centralized controllers for orchestration. In multi-provider scenario, autonomy of each provider leads to infeasibility of a centralized controller. In this paper, we propose NFVMP, a novel NFV architecture that enables cooperation of providers to compose intended chains, while maintaining dependency of each provider. NFVMP adopts a fresh view that regards the sub-chain of each provider as first-class entity, and supports sub-chain composition and flexibility. We implement a prototype, which demonstrates that NFVMP supports correct chain deployment across providers with a negligible performance overhead on latency and throughput.

关键词： Noise measurement Partitioning algorithms Cloud computing Classification algorithms Switches computer architecture Network function virtualization

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Low Power AI ASIC Design for Portable Edge computing

Low Power AI ASIC Design for Portable Edge Computing

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International Conference on Solid-State and Integrated Circuit Technology

作者： Yuan Lei Peng Luo Chi Hong Chan Xiao Huo Yiu Kei Li Mei Kei Ieong United Microelectronics Center (Hong Kong) Hong Kong SAR

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

For portable edge AI computing, one of the major challenges is how to achieve required computation using limited hardware resources and power consumption. An algorithm-hardware co-design process is preferred to achieve best power efficiency with reasonable high enough accuracy by using customized algorithm networks and hardware designs. Binary quantization algorithms and architecture design techniques including analog computing suitable for low power Convolutional Neural Networks applications are reviewed and compared. An augmented binary neural network is introduced, and a few guidelines are suggested for more effective low power AI ASIC design.

关键词： Hardware computer architecture Artificial intelligence Inference algorithms Neurons Power demand Quantization (signal)

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Detector characterization of KAGRA for the fourth observing run 38

Detector characterization of KAGRA for the fourth observing ...

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38th International Cosmic Ray Conference, ICRC 2023

作者： Yuzurihara, Hirotaka Abe, H. Akutsu, T. Ando, M. Aoumi, M. Araya, A. Aritomi, N. Aso, Y. Bae, S. Bajpai, R. Cannon, K. Cao, Z. Chang, R.-J. Chen, A.H.-Y. Chen, D. Chen, H. Chen, Y. Chiba, A. Chiba, R. Chou, C. Eisenmann, M. Fujii, S. Fukunaga, I. Haba, D. Haino, S. Han, W.-B. Hayakawa, H. Hayama, K. Himemoto, Y. Hirata, N. Hirose, C. Hoshino, S. Hsieh, H.-F. Hsiung, C. Hsu, S.-C. Hui, D.C.Y. Inayoshi, K. Itoh, Y. Iwaya, M. Jin, H.B. Jung, K. Kajita, T. Kamiizumi, M. Kanda, N. Kato, J. Kato, T. Kim, S. Kimura, N. Kiyota, T. Kohri, K. Kokeyama, K. Komori, K. Kong, A.K.H. Koyama, N. Kume, J. Kuroyanagi, S. Kuwahara, S. Kwak, K. Lai, S. Lee, H.W. Lee, R. Lee, S. Leonardi, M. Li, K.L. Lin, L.C.-C. Lin, C.-Y. Lin, E.T. Liu, G.C. Ma, L.-T. Maeda, K. Matsuyama, M. Meyer-Conde, M. Michimura, Y. Mio, N. Miyakawa, O. Miyamoto, S. Miyoki, S. Morisaki, S. Moriwaki, Y. Murakoshi, M. Nakamura, K. Nakano, H. Narikawa, T. Nguyen Quynh, L. Nishino, Y. Nishizawa, A. Obayashi, K. Oh, J.J. Oh, K. Ohashi, M. Ohkawa, M. Oohara, K. Oshima, Y. Oshino, S. Page, M.A. Pan, K.-C. Park, J. Peña Arellano, F.E. Saha, S. Sakai, K. Sako, T. Sato, R. Sato, S. Sato, Y. Sawada, T. Sekiguchi, Y. Shao, L. Shikano, Y. Shimode, K. Shinkai, H. Shiota, J. Somiya, K. Suzuki, T. Suzuki, T. Tagoshi, H. Takahashi, H. Takahashi, R. Takamori, A. Takatani, K. Takeda, H. Takeda, M. Tamaki, M. Tanaka, K. Tanaka, S.J. Tanaka, T. Taruya, A. Tomaru, T. Tomita, K. Tomura, T. Toriyama, A. Trani, A.A. Tsuchida, S. Uchikata, N. Uchiyama, T. Uehara, T. Ueno, K. Ushiba, T. van Putten, M.H.P.M. Wang, H. Washimi, T. Wu, C. Wu, H. Yamamoto, K. Yamamoto, M. Yamamoto, T. Yamamoto, T.S. Yamamura, S. Yamazaki, R. Yang, L.-C. Yang, Y. Yeh, S.-W. Yokoyama, J. Yokozawa, T. Yuzurihara, H. Zhao, Y. Zhu, Z.-H. KAGRA Observatory The University of Tokyo 238 Higashi-Mozumi Kamioka-cho Hida City Gifu506-1205 Japan Graduate School of Science Tokyo Institute of Technology 2-12-1 Ookayama Meguro-ku Tokyo152-8551 Japan Gravitational Wave Science Project National Astronomical Observatory of Japan 2-21-1 Osawa Mitaka City Tokyo181-8588 Japan Advanced Technology Center National Astronomical Observatory of Japan 2-21-1 Osawa Mitaka City Tokyo181-8588 Japan Department of Physics The University of Tokyo 7-3-1 Hongo Bunkyo-ku Tokyo113-0033 Japan The University of Tokyo 7-3-1 Hongo Bunkyo-ku Tokyo113-0033 Japan Institute for Cosmic Ray Research KAGRA Observatory The University of Tokyo 238 Higashi-Mozumi Kamioka-cho Hida City Gifu506-1205 Japan Earthquake Research Institute The University of Tokyo 1-1-1 Yayoi Bunkyo-ku Tokyo113-0032 Japan LIGO Hanford Observatory RichlandWA99352 United States 2-21-1 Osawa Mitaka City Tokyo181-8588 Japan 245 Daehak-ro Yuseong-gu Daejeon34141 Korea Republic of Department of Astronomy Beijing Normal University Xinjiekouwai Street 19 Haidian District Beijing100875 China Department of Physics National Cheng Kung University No.1 University Road Tainan City701 Taiwan Institute of Physics National Yang Ming Chiao Tung University 101 Univ. Street Hsinchu Taiwan Kamioka Branch National Astronomical Observatory of Japan 238 Higashi-Mozumi Kamioka-cho Hida City Gifu506-1205 Japan Department of Physics National Tsing Hua University No. 101 Section 2 Kuang-Fu Road Hsinchu30013 Taiwan Faculty of Science University of Toyama 3190 Gofuku Toyama City Toyama930-8555 Japan Institute for Cosmic Ray Research KAGRA Observatory The University of Tokyo 5-1-5 Kashiwa-no-Ha Chiba Kashiwa City277-8582 Japan Department of Electrophysics National Yang Ming Chiao Tung University 101 Univ. Street Hsinchu Taiwan Department of Physics Graduate School of Science Osaka Metropolitan University 3-3-138 Sugimoto-cho Sumi

KAGRA is a ground-based gravitational wave detector located in the Kamioka mine, Gifu, Japan. the fourth international joint observing run (Observation-4;O4) by LIGO, Virgo, and KAGRA started from May 2023. the KAGRA detector characterization group aims to enhance the reliability of data analysis and GW detection by supporting detector commissioning and improving our understanding of detector instruments and acquired data. We provide various tools for monitoring, understanding, and mitigating noise sources, which help enhance the performance of the KAGRA detector and data analysis. Here, we report the recent activities and status of the detector characterization of KAGRA for O4. © Copyright owned by the author(s) under the terms of the Creative Commons.

关键词： Gravitational effects

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Elliptical Wide Slot Microstrip Patch Antenna Design by Using Dynamic Constrained Multiobjective Optimization Evolutionary Algorithm 11th

Elliptical Wide Slot Microstrip Patch Antenna Design by Usin...

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11th International symposium on Intelligence Computation and Applications, ISICA 2019

作者： Wu, Rangzhong Hu, Caie Zeng, Zhigao School of Mechanical and Electronic Information China University of Geosciences Wuhan430074 China School of Computer Hunan University of Technology Zhuzhou412007 China

ISBN: (纸本)9789811555763

this paper evolves an elliptical wide slot microstrip patch antenna by using Dynamic Constrained Multiobjective Optimization Evolutionary Algorithm (DCMOEA). the antenna structure is a square substrate with a size of 30 mm $$\times $$ 30 mm $$\times $$ 1.6 mm. the radiation patch in the front side, which is formed by subtracting two ellipses with same axial ratio R. the coupling element in the back side, where consists of difference between ground plate and an ellipse with an axial ratio R. To obtain optimum antenna structure with satisfying the design requirements, the antenna optimization problem is modeled as a constrained optimization problem (COP). the experimental results show the optimum antenna is obtained, as well as we find the radiation patch should be a whole ellipse instead of subtracting with two ellipses. therefore, we draw a conclusion that the radiation patch should be complete rather than partial in the surface antennas design, which provides a valuable reference for follow-up study with antenna design in real engineering and scientific research. © 2020, Springer Nature Singapore Pte Ltd.

关键词： Constrained optimization

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A Proposed Framework for Interactive Virtual Reality In Situ Visualization of Parallel Numerical Simulations 9

A Proposed Framework for Interactive Virtual Reality In Situ...

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9th IEEE symposium on Large Data Analysis and Visualization (LDAV)

作者： Gupta, Aryaman Guenther, Ulrik Incardona, Pietro Aydin, Ata Deniz Dachselt, Raimund Gumhold, Stefan Sbalzarini, Ivo F. Tech Univ Dresden Dresden Germany CSBD Dresden Germany MPI CBG Dresden Germany Tech Univ Dresden Interact Media Lab Dresden Cluster Excellence Phys Life Dresden Germany Tech Univ Dresden Cluster Excellence Phys Life Dresden Germany Tech Univ Dresden CSBD Dresden Germany MPI CBG Cluster Excellence Phys Life Dresden Germany

ISBN: (纸本)9781728126050

As computer simulations progress to increasingly complex, nonlinear, and three-dimensional systems and phenomena, intuitive and immediate visualization of their results is becoming crucial. While Virtual Reality (VR) and Natural User Interfaces (NUIs) have been shown to improve understanding of complex 3D data, their application to live in situ visualization and computational steering is hampered by performance requirements. Here, we present the design of a software framework for interactive VR in situ visualization of parallel numerical simulations, as well as a working prototype implementation. Our design is targeted towards meeting the performance requirements for VR, and our work is packaged in a framework that allows for easy instrumentation of simulations. Our preliminary results inform about the technical feasibility of the architecture, as well as the challenges that remain.

关键词： computing methodologies Massively parallel and high-performance simulations Human-centered computing Virtual reality

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