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检索条件"任意字段=16th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2008"
51 条 记 录,以下是1-10 订阅
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fpga 2008 - Sixteenth acm/sigda international symposium on field-programmable gate arrays
FPGA 2008 - Sixteenth ACM/SIGDA International Symposium on F...
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16th acm/sigda international symposium on field-programmable gate arrays, fpga 2008
the proceedings contain 24 papers. the topics discussed include: designing with extreme parallelism;high-quality, deterministic parallel placement for fpgas on commodity hardware;enforcing long-path timing closure for...
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acm/sigda international symposium on field programmable gate arrays - fpga: Foreword
ACM/SIGDA International Symposium on Field Programmable Gate...
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acm/sigda international symposium on field programmable gate arrays - fpga 2008年 iii页
作者: Hutton, Mike Chow, Paul University of Toronto
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Architectural Improvements for field programmable Counter arrays: Enabling Efficient Synthesis of Fast Compressor Trees on fpgas  08
Architectural Improvements for Field Programmable Counter Ar...
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16th acm/sigda international symposium on field-programmable gate arrays
作者: Cevrero, Alessandro Athanasopoulos, Panagiotis Parandeh-Afshar, Hadi Verma, Ajay K. Brisk, Philip Gurkaynak, Frank K. Leblebici, Yusuf Ienne, Paolo Ecole Polytech Fed Lausanne Inst Microelect & Microsyst Microelect Syst Lab CH-1015 Lausanne Switzerland
the field programmable Counter Array (FPCA) was introduced to improve fpga performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an fpga. To exploit the FPCA, a circuit i... 详细信息
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A novel fpga logic block for improved arithmetic performance  08
A novel FPGA logic block for improved arithmetic performance
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16th acm/sigda international symposium on field-programmable gate arrays, fpga 2008
作者: Parandeh-Afshar, Hadi Brisk, Philip Ienne, Paolo School of Computer and Communication Sciences CH-1015 Lausanne Switzerland
To improve fpga performance for arithmetic circuits, this paper proposes a new architecture for fpga logic cells that includes a 6:2 compressor. the new cell features additional fast carry-chains that concatenate adja... 详细信息
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Architecture-Specific Packing for Virtex-5 fpgas  08
Architecture-Specific Packing for Virtex-5 FPGAs
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16th acm/sigda international symposium on field-programmable gate arrays
作者: Ahmed, Taneem Kundarewich, Paul D. Anderson, Jason H. Taylor, Brad L. Aggarwal, Rajat Xilinx Inc Toronto ON Canada
We consider packing in the commercial fpga context and examine the speed, performance and power trade-offs associated with packing in a state-of-the art fpga - the Xilinx (R) Virtex (TM) -5 fpga. Two aspects of packin... 详细信息
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OLAF′16: Second international Workshop on Overlay Architectures for fpgas  16
OLAF′16: Second International Workshop on Overlay Architect...
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acm/sigda international symposium on field-programmable gate arrays (fpga)
作者: So, Hayden Kwok-Hay Wawrzynek, John Univ Hong Kong Dept Elect & Elect Engn Hong Kong Hong Kong Peoples R China Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA
the Second international Workshop on Overlay Architectures for fpgas is held in Monterey, California, USA, on February 21, 2016 and co-located with fpga 2016: the 24th acm/sigda international symposium on field Progra... 详细信息
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TORCH: A design tool for routing channel segmentation in fpgas  08
TORCH: A design tool for routing channel segmentation in FPG...
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16th acm/sigda international symposium on field-programmable gate arrays, fpga 2008
作者: Lin, Mingjie Gamal, Abbas El Department of Electrical Engineering Stanford University CA 94305 United States
A design tool for routing channel segmentation in island-style fpgas is presented. Given the fpga architecture parameters and a set of benchmark designs, the tool optimizes routing channel segmentation using the avera... 详细信息
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A hardware framework for the fast generation of multiple ong-period random number streams
A hardware framework for the fast generation of multiple ong...
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16th acm/sigda international symposium on field-programmable gate arrays, fpga 2008
作者: Dalal, Ishaan L. Stefan, Deian Dept. of Electrical Engineering Cooper Union New York NY 10003 United States
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality pseudo-random number generators (PRNG), ... 详细信息
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SMAP: Heterogeneous technology mapping for area reduction in fpgas with embedded memory arrays
SMAP: Heterogeneous technology mapping for area reduction in...
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Proceedings of the 1998 acm/sigda 6th international symposium on field programmable gate arrays, fpga
作者: Wilton, Steven J.E. Univ of British Columbia Vancouver Canada
It has become clear that large embedded configurable memory arrays will be essential in future fpgas. Embedded arrays provide high-density high-speed implementations of the storage parts of circuits. Unfortunately, th... 详细信息
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Implementation of BEE: A real-time large-scale hardware emulation engine
Implementation of BEE: A real-time large-scale hardware emul...
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acm/sigda 11th acm international symposium on field programmable gate arrays
作者: Chang, Chen Kuusilinna, Kimmo Richards, Brian Brodersen, Robert W. Univ. of California Berkeley Berkeley Wireless Research Center 2108 Allston Way Berkeley CA 94704 United States Tampere University of Technology Inst. of Digital and Comp. Systems P.O. Box 553 FIN-33101 Tampere Finland
this paper describes the hardware implementation of a real-time, large-scale, multi-chip fpga (field programmable gate Array) based emulation engine with a capacity of 10 million ASIC (Application Specific Integrated ... 详细信息
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