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检索条件"任意字段=16th ACM Symposium on Principles and Practice of Parallel Programming"

共 407 条记录，以下是141-150 订阅

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On the fly MHP Analysis 20

On the fly MHP Analysis

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25th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Saha, Sonali Nandivada, V. Krishna IIT Madras Madras Tamil Nadu India

ISBN: (纸本)9781450368186

May-Happen-in-parallel (MHP) analysis forms the basis for many problems of program analysis and program understanding. MHP analysis can also be used by IDEs (integrateddevelopment-environments) to help programmers to refactor parallel-programs, identify racy programs, understand which parts of the program run in parallel, and so on. Since the code keeps changing in the IDE, re-computing the MHP information after every change can be an expensive affair. In this manuscript, we propose a novel scheme to perform incremental MHP analysis (on the fly) of programs written in task parallel languages like X10 to keep the MHP information up to date, in an IDE environment. the key insight of our proposed approach to maintain the MHP information up to date is that we need not rebuild (from scratch) every data structure related to MHP information, after each modification (addition or deletion of statements) in the source code. the idea is to reuse the old MHP information as much as possible and incrementally recompute the MHP information (of a small set of statements) which depends on the statement added/removed. We introduce two new algorithms that deal with addition and removal of parallel constructs like finish, async, atomic, and sequential constructs like loop, if, if-else and other sequential statements, on the fly. Our evaluation shows that our algorithms run much faster than the repeated invocations of the fastest known MHP analysis for X10 programs [Sankar et al. 2016].

关键词： Concurrent programs may happen in parallel analysis incremental analysis

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GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Networking for dGPUs 25

GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Ne...

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25th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Hamidouche, Khaled LeBeane, Michael Adv Micro Devices Inc Santa Clara CA 95054 USA

ISBN: (纸本)9781450368186

Current state-of-the-art in GPU networking utilizes a host-centric, kernel-boundary communication model that reduces performance and increases code complexity. To address these concerns, recent works have explored performing network operations from within a GPU kernel itself. However, these approaches typically involve the CPU in the critical path, which leads to high latency and ineicient utilization of network and/or GPU resources. In this work, we introduce GPU Initiated OpenSHMEM (GIO), a new intra-kernel PGAS programming model and runtime that enables GPUs to communicate directly with a NIC without the intervention of the CPU. We accomplish this by exploring the GPU's coarse-grained memory model and correcting semantic mismatches when GPUs wish to directly interact with the network. GIO also reduces latency by relying on a novel template-based design to minimize the overhead of initiating a network operation. We illustrate that for structured applications like a Jacobi 2D stencil, GIO can improve application performance by up to 40% compared to traditional kernel-boundary networking. Furthermore, we demonstrate that on irregular applications like Sparse Triangular Solve (SpTS), GIO provides up to 44% improvement compared to existing intra-kernel networking schemes.

关键词： GPUs Distributed programming models RDMA networks

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Practical parallel Hypergraph Algorithms 20

Practical Parallel Hypergraph Algorithms

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25th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Shun, Julian MIT CSAIL Cambridge MA 02139 USA

ISBN: (纸本)9781450368186

While there has been significant work on parallel graph processing, there has been very surprisingly little work on high-performance hypergraph processing. this paper presents a collection of efficient parallel algorithms for hypergraph processing, including algorithms for betweenness centrality, maximal independent set, k-core decomposition, hyper-trees, hyperpaths, connected components, PageRank, and single-source shortest paths. For these problems, we either provide new parallel algorithms or more efficient implementations than prior work. Furthermore, our algorithms are theoretically-efficient in terms of work and depth. To implement our algorithms, we extend the Ligra graph processing framework to support hypergraphs, and our implementations benefit from graph optimizations including switching between sparse and dense traversals based on the frontier size, edge-aware parallelization, using buckets to prioritize processing of vertices, and compression. Our experiments on a 72-core machine and show that our algorithms obtain excellent parallel speedups, and are *** faster than algorithms in existing hypergraph processing frameworks.

关键词： parallel algorithms

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A Comparison of programming Models for Multiprocessors with Explicitly Managed Memory Hierarchies

A Comparison of Programming Models for Multiprocessors with ...

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14th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Schneider, Scott Yeom, Jae-Seung Rose, Benjamin Linford, John C. Sandu, Adrian Nikolopoulos, Dimitrios S. Virginia Tech Dept Comp Sci Blacksburg VA 24060 USA

ISBN: (纸本)9781605583976

On multiprocessors with explicitly managed memory hierarchies (EMM), software has the responsibility of moving data in and out of fast local memories. this task can be complex and error-prone even for expert programmers. Before we can allow compilers to handle the complexity for us, we must identify the abstractions that are general enough to allow us to write applications with reasonable effort, yet specific enough to exploit the vast on-chip memory bandwidth of EMM multi-processors. To this end, we compare two programming models against hand-tuned codes on the STI Cell, paying attention to programmability and performance. the first programming model, Sequoia, abstracts the memory hierarchy as private address spaces, each corresponding to a parallel task. the second, Cellgen, is a new framework which provides OpenMP-like semantics and the abstraction of a shared address spaces divided into private and shared data. We compare three applications programmed using these models against their hand-optimized counterparts in terms of abstractions, programming complexity, and performance.

关键词： Design Languages Cell BE Explicitly Managed Memory Hierarchies programming Models

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High performance synchronization algorithms for multiprogrammed multiprocessors

High performance synchronization algorithms for multiprogram...

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Proceedings of the 5th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Wisniewski, Robert W. Kontothanassis, Leonidas I. Scott, Michael L. Univ of Rochester Rochester United States

Scalable busy-wait synchronization algorithms are essential for achieving good parallel program performance on large scale multiprocessors. Such algorithms include mutual exclusion locks, reader-writer locks, and barrier synchronization. Unfortunately, scalable synchronization algorithms are particularly sensitive to the effects of multiprogramming: their performance degrades sharply when processors are shared among different applications, or even among processes of the same application. In this paper we describe the design and evaluation of scalable scheduler-conscious mutual exclusion locks, reader-writer locks, and barriers, and show that by sharing information across the kernel/application interface we can improve the performance of scheduler-oblivious implementations by more than an order of magnitude.

关键词： parallel algorithms

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Space-efficient implementation of nested parallelism

Space-efficient implementation of nested parallelism

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Proceedings of the 1997 6th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Narlikar, Girija J. Blelloch, Guy E. CMU Sch of Computer Science Pittsburgh United States

Many of today's high level parallel languages support dynamic, fine-grained parallelism. these languages allow the user to expose all the parallelism in the program, which is typically of a much higher degree than the number of processors. Hence an efficient scheduling algorithm is required to assign computations to processors at runtime. Besides having low overheads and good load balancing, it is important for the scheduling algorithm to minimize the space usage of the parallel program. this paper presents a scheduling algorithm that is provably space-efficient and time-efficient for nested parallel languages. In addition to proving the space and time bounds of the parallel schedule generated by the algorithm, we demonstrate that it is efficient in practice. We have implemented a runtime system that uses our algorithm to schedule parallel threads. the results of executing parallel programs on this system show that our scheduling algorithm significantly reduces memory usage compared to previous techniques, without compromising performance.

关键词： parallel processing systems

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New model for integrated nested task and data parallel programming

New model for integrated nested task and data parallel progr...

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Proceedings of the 1997 6th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Subhlok, Jaspal Yang, Bwolen Carnegie Mellon Univ Pittsburgh United States

High Performance Fortran (HPF) has emerged as a standard language for data parallel computing. However, a wide variety of scientific applications are best programmed by a combination of task and data parallelism. therefore, a good model of task parallelism is important for continued success of HPF for parallel programming. this paper presents a task parallelism model that is simple, elegant, and relatively easy to implement in an HPF environment. Task parallelism is exploited by mechanisms for dividing processors into sub-groups and mapping computations and data onto processor subgroups. this model of task parallelism has been implemented in the Fx compiler at Carnegie Mellon University. the paper addresses the main issues in compiling integrated task and data parallel programs and reports on the use of this model for programming various flat and nested task structures. Performance results are presented for a set of programs spanning signal processing, image processing, computer vision and environment modeling. A variant of this task model is a new approved extension of HPF and this paper offers insight into the power of expression and ease of implementation of this extension.

关键词： parallel processing systems

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Effective Communication and Computation Overlap with Hybrid MPI/SMPSs

Effective Communication and Computation Overlap with Hybrid ...

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15th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Marjanovic, Vladimir Labarta, Jesus Ayguade, Eduard Valero, Mateo Barcelona Supercomp Ctr BSC CNS Dept Comp Sci Barcelona Spain Tech Univ Catalunya UPC Comp Architecture Dept Barcelona Spain

ISBN: (纸本)9781605587080

Communication overhead is one of the dominant factors affecting performance in high-performance computing systems. To reduce the negative impact of communication, programmers overlap communication and computation by using asynchronous communication primitives. this increases code complexity, requiring more development effort and making less readable programs. this paper presents the hybrid use of MPI and SMPSs (SMP superscalar, a task-based shared-memory programming model) that allows the programmer to easily introduce the asynchrony necessary to overlap communication and computation. We demonstrate the hybrid use of MPI/SMPSs with the high-performance LINPACK benchmark (HPL), and compare it to the pure MPI implementation, which uses the look-ahead technique to overlap communication and computation. the hybrid MPI/SMPSs version significantly improves the performance of the pure MPI version, getting close to the asymptotic performance at medium problem sizes and still getting significant benefits at small/large problem sizes.

关键词： Algorithms Performance Languages parallel programming model MPI hybrid MPI/SMPSs LINPACK

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Scaling Out Speculative Execution of Finite-State Machines with parallel Merge 20

Scaling Out Speculative Execution of Finite-State Machines w...

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25th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Xia, Yang Jiang, Peng Agrawal, Gagan Ohio State Univ Columbus OH 43210 USA Univ Iowa Iowa City IA USA

ISBN: (纸本)9781450368186

A finite-state machine (FSM) is a key component for many important applications, such as Huffman decoding, regular expression matching and HTML tokenization. Due to its inherent dependencies and unpredictable memory access pattern, FSM computations are considered to be extremely difficult to parallelize. As such, significant research efforts have been made to accelerate FSM computations. Although they achieve promising performance results on multi-core machines, these methods are not scalable for emerging many-core architectures such as the GPUs. Based on our experiments, we point out that the bottleneck of achieving scalability on GPUs is the sequential merge inherent to these methods. However, unlike the case for simple reduction loops, parallel merge implementations for FSM computations typically require runtime checks and re-executions, which can also impede performance. Based on these observations, we develop parallel merge techniques that select efficient runtime check implementations and avoids unnecessary re-executions. Further, based on GPU architectural features, we develop optimization techniques to improve performance. We evaluate our parallel merge implementations on a set of representative algorithms. Experimental results show that our parallel merge implementations are 2.02-6.74 times more efficient than corresponding sequential merge implementations and achieve better scalability on an Nvidia V100 GPU.

关键词： Finite-State Machines Speculation GPUs

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Is Transactional programming Actually Easier?

Is Transactional Programming Actually Easier?

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15th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Rossbach, Christopher J. Hofmann, Owen S. Witchel, Emmett Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781605587080

Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent programming have not. the promise of increased performance for all applications through ever more parallel hardware requires good tools for concurrent programming, especially for average programmers. Transactional memory (TM) has enjoyed recent interest as a tool that can help programmers program concurrently. the transactional memory (TM) research community is heavily invested in the claim that programming with transactional memory is easier than alternatives (like locks), but evidence for or against the veracity of this claim is scant. In this paper, we describe a user-study in which 237 undergraduate students in an operating systems course implement the same programs using coarse and fine-grain locks, monitors, and transactions. We surveyed the students after the assignment, and examined their code to determine the types and frequency of programming errors for each synchronization technique. Inexperienced programmers found baroque syntax a barrier to entry for transactional programming. On average, subjective evaluation showed that students found transactions harder to use than coarse-grain locks, but slightly easier to use than fine-grained locks. Detailed examination of synchronization errors in the students' code tells a rather different story. Overwhelmingly, the number and types of programming errors the students made was much lower for transactions than for locks. On a similar programming problem, over 70% of students made errors with fine-grained locking, while less than 10% made errors with transactions.

关键词： Design Performance Transactional Memory Optimistic Concurrency Synchronization

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