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检索条件"任意字段=16th ACM Symposium on Principles and Practice of Parallel Programming"

共 407 条记录，以下是191-200 订阅

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Scalable parallel debugging with statistical assertions 12

Scalable parallel debugging with statistical assertions

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17th acm SIGPLAN symposium on principles and practice of parallel programming, PPoPP'12

作者： Dinh, Minh Ngoc Abramson, David Jin, Chao Gontarek, Andrew Moench, Bob DeRose, Luiz Monash University Clayton 3800 VIC Australia Cray Inc. Saint Paul MN 55101-2987 United States

ISBN: (纸本)9781450311601

Traditional debuggers are of limited value for modern scientific codes that manipulate large complex data structures. this paper discusses a novel debug-time assertion, called a "Statistical Assertion", that allows a user to reason about large data structures, and the primitives are parallelised to provide an efficient solution. We present the design and implementation of statistical assertions, and illustrate the debugging technique with a molecular dynamics simulation. We evaluate the performance of the tool on a 12,000 cores Cray XE6.

关键词： Data structures

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Improving parallelism and Locality with Asynchronous Algorithms

Improving Parallelism and Locality with Asynchronous Algorit...

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15th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Liu, Lixia Li, Zhiyuan Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA

ISBN: (纸本)9781605587080

As multicore chips become the main building blocks for high performance computers, many numerical applications face a performance impediment due to the limited hardware capacity to move data between the CPU and the off-chip memory. this is especially true for large computing problems solved by iterative algorithms because of the large data set typically used. Loop tiling, also known as loop blocking, was shown previously to be an effective way to enhance data locality, and hence to reduce the memory bandwidth pressure, for a class of iterative algorithms executed on a single processor. Unfortunately, the tiled programs suffer from reduced parallelism because only the loop iterations within a single tile can be easily parallelized. In this work, we propose to use the asynchronous model to enable effective loop tiling such that both parallelism and locality can be attained simultaneously. Asynchronous algorithms were previously proposed to reduce the communication cost and synchronization overhead between processors. Our new discovery is that carefully controlled asynchrony and loop tiling can significantly improve the performance of parallel iterative algorithms on multicore processors due to simultaneously attained data locality and loop-level parallelism. We present supporting evidence from experiments with three well-known numerical kernels.

关键词： asynchronous algorithms loop tiling parallel numerical programs data locality memory performance

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Effective Performance Measurement and Analysis of Multithreaded Applications

Effective Performance Measurement and Analysis of Multithrea...

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14th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Tallent, Nathan R. Mellor-Crummey, John M. Rice Univ Houston TX 77251 USA

ISBN: (纸本)9781605583976

Understanding why the performance of a multithreaded program does not improve linearly with the number of cores in a shared-memory node populated with one or more multicore processors is a problem of growing practical importance. this paper makes three contributions to performance analysis of multithreaded programs. First, we describe how to measure and attribute parallel idleness, namely, where threads are stalled and unable to work. this technique applies broadly to programming models ranging from explicit threading (e. g., Pthreads) to higher-level models such as Cilk and OpenMP. Second, we describe how to measure and attribute parallel overhead-when a thread is performing miscellaneous work other than executing the user's computation. By employing a combination of compiler support and post-mortem analysis, we incur no measurement cost beyond normal profiling to glean this information. Using idleness and overhead metrics enables one to pinpoint areas of an application where concurrency should be increased (to reduce idleness), decreased (to reduce overhead), or where the present parallelization is hopeless (where idleness and overhead are both high). third, we describe how to measure and attribute arbitrary performance metrics for high-level multithreaded programming models, such as Cilk. this requires bridging the gap between the expression of logical concurrency in programs and its realization at run-time as it is adaptively partitioned and scheduled onto a pool of threads. We have prototyped these ideas in the context of Rice University's HPCTOOLKIT performance tools. We describe our approach, implementation, and experiences applying this approach to measure and attribute work, idleness, and overhead in executions of Cilk programs.

关键词： Performance Measurement Algorithms Performance Analysis Call Path Profiling Multithreaded programming Models HPCTOOLKIT

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DATA-FLOW EQUATIONS FOR EXPLICITLY parallel PROGRAMS 93

DATA-FLOW EQUATIONS FOR EXPLICITLY PARALLEL PROGRAMS

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4th SYMP ON principles AND practice OF parallel programming ( PPOPP )

作者： GRUNWALD, D SRINIVASAN, H UNIV COLORADO DEPT COMP SCIBOULDERCO 80309

ISBN: (纸本)9780897915892

We present a solution to the reaching definitions problem for programs with explicit lexically specified parallel constructs, such as cobegin/coend or parallel-sections, both with and without explicit synchronization operations, such as Post, Wait or Advance. the reaching definitions information for sequential programs is used to solve many standard optimization problems. In parallel programs, this information can also be used to explicitly direct communication and data ownership. Although work has been done on analyzing parallel programs to detect data races, little work has been done on optimizing such programs. We show how the memory consistency model specified by an explicitly parallel programming language can influence the complexity of the reaching definitions problem. By selecting the ''weakest'' memory consistency semantics, we can efficiently solve the reaching definitions problem for correct programs.

关键词： Computer software

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Self-Checkpoint: An In-Memory Checkpoint Method Using Less Space and Its practice on Fault-Tolerant HPL 17

Self-Checkpoint: An In-Memory Checkpoint Method Using Less S...

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22nd acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Tang, Xiongchao Zhai, Jidong Yu, Bowen Chen, Wenguang Zheng, Weimin Tsinghua Univ Dept Comp Sci & Technol Beijing Peoples R China

ISBN: (纸本)9781450344937

Fault tolerance is increasingly important in high performance computing due to the substantial growth of system scale and decreasing system reliability. In-memory/diskless checkpoint has gained extensive attention as a solution to avoid the IO bottleneck of traditional disk-based checkpoint methods. However, applications using previous in-memory checkpoint suffer from little available memory space. To provide high reliability, previous in-memory checkpoint methods either need to keep two copies of checkpoints to tolerate failures while updating old checkpoints or trade performance for space by flushing in-memory checkpoints into disk. In this paper, we propose a novel in-memory checkpoint method, called self-checkpoint, which can not only achieve the same reliability of previous in-memory checkpoint methods, but also increase the available memory space for applications by almost 50%. To validate our method, we apply the self-checkpoint to an important problem, fault tolerant HPL. We implement a scalable and fault tolerant HPL based on this new method, called SKT-HPL, and validate it on two large-scale systems. Experimental results with 24,576 processes show that SKT-HPL achieves over 95% of the performance of the original HPL. Compared to the state-of-the-art in-memory checkpoint method, it improves the available memory size by 47% and the performance by 5%.

关键词： Fault Tolerance In-Memory Checkpoint Fault-Tolerant HPL Memory Consumption

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Dynamic pointer alignment: tiling and communication optimizations for parallel pointer-based computations

Dynamic pointer alignment: tiling and communication optimiza...

引用

Proceedings of the 1997 6th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Zhang, Xingbin Chien, Andrew A. Univ of Illinois at Urbana-Champaign

Loop tiling and communication optimizations, such as message pipelining and aggregation, can achieve optimized and robust memory performance by proactively managing storage and data movement. In this paper, we generalize these techniques to pointer-based data structures (PBDSs). Our approach, dynamic pointer alignment (DPA), has two components. the compiler decomposes a program into non-blocking threads that operate on specific pointers and labels thread creation sites with their corresponding pointers. At runtime, an explicit mapping from pointers to dependent threads is updated at thread creation and is used to dynamically schedule both threads and communication, such that threads using the same objects execute together, communication overlaps with local work, and messages are aggregated. We have implemented DPA to optimize remote reads to global PBDSs on parallel machines. Our empirical results on the force computation phases of two applications that use sophisticated PBDSs, Barnes-Hut and FMM, show that DPA achieves good absolute performance and speedups by enabling tiling and communication optimizations on the CRAY T3D.

关键词： parallel processing systems

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PERFLOW: A Domain Specific Framework for Automatic Performance Analysis of parallel Applications 22

PERFLOW: A Domain Specific Framework for Automatic Performan...

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27th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Jin, Yuyang Wang, Haojie Zhong, Runxin Zhang, Chen Zhai, Jidong Tsinghua Univ Beijing Peoples R China

ISBN: (纸本)9781450392044

Performance analysis is widely used to identify performance issues of parallel applications. However, complex communications and data dependence, as well as the interactions between different kinds of performance issues make high-efficiency performance analysis even harder. Although a large number of performance tools have been designed, accurately pinpointing root causes for such complex performance issues still needs specific in-depth analysis. To implement each such analysis, significant human efforts and domain knowledge are normally required. To reduce the burden of implementing accurate performance analysis, we propose a domain specific programming framework, named PERFLOW. PERFLOW abstracts the step-by-step process of performance analysis as a dataflow graph. this dataflow graph consists of main performance analysis sub-tasks, called passes, which can either be provided by PERFLOW'S built-in analysis library, or be implemented by developers to meet their requirements. Moreover, to achieve effective analysis, we propose a Program Abstraction Graph to represent the performance of a program execution and then leverage various graph algorithms to automate the analysis. We demonstrate the efficacy of PERFLOW by three case studies of real-world applications with up to 700K lines of code. Results show that PERFLOW significantly eases the implementation of customized analysis tasks. In addition, PERFLOW is able to perform analysis and locate performance bugs automatically and effectively.

关键词： Performance Analysis Domain Specific Framework Dataflow Graph

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SEP-Graph: Finding Shortest Execution Paths for Graph Processing under a Hybrid Framework on GPU 19

SEP-Graph: Finding Shortest Execution Paths for Graph Proces...

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24th acm SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Wang, Hao Geng, Liang Lee, Rubao Hou, Kaixi Zhang, Yanfeng Zhang, Xiaodong Ohio State Univ Dept Comp Sci & Engn Columbus OH 43210 USA Northeastern Univ Dept Comp Sci & Engn Shenyang Peoples R China United Parallel Comp Corp Atlanta DE USA Virginia Tech Dept Comp Sci Blacksburg VA USA

ISBN: (纸本)9781450362252

In general, the performance of parallel graph processing is determined by three pairs of critical parameters, namely synchronous or asynchronous execution mode (Sync or Async), Push or Pull communication mechanism (Push or Pull), and Data-driven or Topology-driven traversing scheme (DD or TD), which increases the complexity and sophistication of programming and system implementation of GPU. Existing graph-processing frameworks mainly use a single combination in the entire execution for a given application, but we have observed their variable and suboptimal performance. In this paper, we present SEP-Graph, a highly efficient software framework for graph-processing on GPU. the hybrid execution mode is automatically switched among three pairs of parameters, with an objective to achieve the shortest execution time in each iteration. We also apply a set of optimizations to SEP-Graph, considering the characteristics of graph algorithms and underlying GPU architectures. We show the effectiveness of SEP-Graph based on our intensive and comparative performance evaluation on NVIDIA 1080, P100, and V100 GPUs. Compared with existing and representative GPU graph-processing framework Groute and Gunrock, SEP-Graph can reduce execution time up to 45.8 times and 39.4 times.

关键词： Graph Algorithms GPU Hybrid

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Communication-Centric Optimizations by Dynamically Detecting Collective Operations 12

Communication-Centric Optimizations by Dynamically Detecting...

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17th acm SIGPLAN symposium on principles and practice of parallel programming

作者： Hoefler, Torsten Schneider, Timo Univ Illinois Dept Comp Sci Urbana IL USA Tech Univ Chemnitz Dept Comp Sci Chemnitz Germany

ISBN: (纸本)9781450311601

the steady increase of parallelism in high-performance computing platforms implies that communication will be most important in large-scale applications. In this work, we tackle the problem of transparent optimization of large-scale communication patterns using online compilation techniques. We utilize the Group Operation Assembly Language (GOAL), an abstract parallel dataflow definition language, to specify our transformations in a device-independent manner. We develop fast schemes that analyze dataflow and synchronization semantics in GOAL and detect if parts of the (or the whole) communication pattern express a known collective communication operation. the detection of collective operations allows us to replace the detected patterns with highly optimized algorithms or low-level hardware calls and thus improve performance significantly. Benchmark results suggest that our technique can lead to a performance improvement of orders of magnitude compared with various optimized algorithms written in Co-Array Fortran. Detecting collective operations also improves the programmability of parallel languages in that the user does not have to understand the detailed semantics of high-level communication operations in order to generate efficient and scalable code.

关键词： Performance Languages Collective Communication parallel Compiler Optimization parallel Dataflow

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GOPipe: A granularity-oblivious programming framework for pipelined stencil executions on GPU 19

GOPipe: A granularity-oblivious programming framework for pi...

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24th acm SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2019

作者： Oh, Chanyoung Zheng, Zhen Shen, Xipeng Zhai, Jidong Yi, Youngmin University of Seoul Korea Republic of Tsinghua University China North Carolina State University United States

ISBN: (纸本)9781450362252

Recent studies have shown promising performance benefits of pipelined stencil applications. An important factor for the computing eficiency of such pipelines is the granularity of a task. We presents GOPipe, the first granularity-oblivious programming framework for eficient pipelined stencil executions. With GOPipe, programmers no longer need to specify the appropriate task granularity. GOPipe automatically finds it, and schedules tasks of that granularity while observing all inter-task and inter-stage data dependencies. In our experiments on four real-life applications, GOPipe outperforms the state-of-the-art by up to 4.57× with a much better programming productivity. © 2019 Copyright held by the owner/author(s).

关键词： Graphics processing unit

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