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Application-Aware Management of parallel Simulation Collections

acm SIGPLAN NOTICES 2009年第4期44卷 35-44页

作者： Yau, Siu-Man Karamcheti, Vijay Damevski, Kostadin Parker, Steven G. Zorin, Denis NYU Courant Inst Math Sci New York NY 10003 USA Univ Utah Dept Comp Sci Salt Lake City UT 84112 USA

this paper presents a system deployed on parallel clusters to manage a collection of parallel simulations that make up a computational study. It explores how such a system can extend traditional parallel job scheduling and resource allocation techniques to incorporate knowledge specific to the study. Using a UINTAH-based helium gas simulation code (ARCHES) and the SimX system for multi-experiment computational studies, this paper demonstrates that, by using application-specific knowledge in resource allocation and scheduling decisions, one can reduce the run time of a computational study from over 20 hours to under 4.5 hours on a 32-processor cluster, and from almost 11 hours to just over 3.5 hours on a 64-processor cluster.

关键词： Design Performance parallel System High-throughput computing

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Using generative design patterns to generate parallel code for a distributed memory environment

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acm SIGPLAN NOTICES 2003年第10期38卷 202-214页

作者： Tan, K Szafron, D Schaeffer, J Anvik, J MacDonald, S Univ Alberta Dept Comp Sci Edmonton AB T6G 2E8 Canada Univ Waterloo Sch Comp Sci Waterloo ON N2L 3G1 Canada

A design pattern is a mechanism for encapsulating the knowledge of experienced designers into a re-usable artifact. parallel design patterns reflect commonly occurring parallel communication and synchronization structures. Our tools, CO2P3S (Correct Object-Oriented Pattern-based parallel programming System) and MetaCO(2)P(3)S, use generative design patterns. A programmer selects the parallel design patterns that are appropriate for an application, and then adapts the patterns for that specific application by selecting from a small set of code-configuration options. CO2P3S then generates a custom framework for the application that includes all of the structural code necessary for the application to ran in parallel. the programmer is only required to write simple code that launches the application and to fill in some application-specific sequential hook routines. We use generative design patterns to take an application specification (parallel design patterns + sequential user code) and use it to generate parallel application code that achieves good performance in shared memory and distributed memory environments. Although our implementations are for Java, the approach we describe is tool and language independent. this paper describes generalizing CO2P3S to generate distributed-memory parallel solutions.

关键词： performance design reliability languages parallel programming design patterns frameworks programming tools

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Compactly representing parallel program executions

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acm SIGPLAN NOTICES 2003年第10期38卷 190-201页

作者： Goel, A Roychoudhury, A Mitra, T Natl Univ Singapore Sch Comp Singapore 117543 Singapore

Collecting a program's execution profile is important for many reasons: code optimization, memory layout, program debugging and program comprehension. Path based execution profiles are more detailed than count based execution profiles, since they present the order of execution of the various blocks in a program: modules, procedures, basic blocks etc. Recently, online string compression techniques have been employed for collecting compact representations of sequential program executions. In this paper, we show how a similar approach can be taken for shared memory parallel programs. Our compaction scheme yields one to two orders of magnitude compression compared to the uncompressed parallel program trace on some of the SPLASH benchmarks. Our compressed execution traces contain detailed information about synchronization and control/data flow which can be exploited for post-mortem analysis. In particular, information in our compact execution traces are useful for accurate data race detection (detecting unsynchronized shared variable accesses that occurred in the execution).

关键词： algorithms measurement path profiling program path compression dynamic program analysis

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LogP: Towards a realistic model of parallel computation

LogP: Towards a realistic model of parallel computation

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Proceedings of the 4th acm SIGPLAN symposium on principles & practice of parallel programming

作者： Culler, David Karp, Richard Patterson, David Sahay, Abhijit Schauser, Klaus Erik Santos, Eunice Subramonian, Ramesh von Eicken, thorsten Univ of California Berkeley United States

ISBN: (纸本)0897915895

A vast body of theoretical research has focused either on overly simplistic models of parallel computation, notably the PRAM, or overly specific models that have few representatives in the real world. Both kinds of models encourage exploitation of formal loopholes, rather than rewarding development of techniques that yield performance across a range of current and future parallel machines. this paper offers a new parallel machine model, called LogP, that reflects the critical technology trends underlying parallel computers. It is intended to serve as a basis for developing fast, portable parallel algorithms and to offer guidelines to machine designers. Such a model must strike a balance between detail and simplicity in order to reveal important bottlenecks without making analysis of interesting problems intractable. the model is based on four parameters that specify abstractly the computing bandwidth, the communication bandwidth, the communication delay, and the efficiency of coupling communication and computation. Portable parallel algorithms typically adapt to the machine configuration, in terms of these parameters. the utility of the model is demonstrated through examples that are implemented on the CM-5.

关键词： Program processors

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Space-time memory: A parallel programming abstraction for interactive multimedia applications

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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Proceedings of the acm SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 183-192页

作者： Ramachandran, Umakishore Nikhil, Rishiyur S. Harel, Nissim Rehg, James M. Knobe, Kathleen Georgia Inst of Technology Atlanta United States

Realistic interactive multimedia involving vision, animation, and multimedia collaboration is likely to become an important aspect of future computer applications. the scalable parallelism inherent in such applications coupled with their computational demands make them ideal candidates for SMPs and clusters of SMPs. these applications have novel requirements that offer new kinds of challenges for parallel system design. We have designed a programming system called Stampede that offers many functionalities needed to simplify development of such applications (such as high-level data sharing abstractions, dynamic cluster-wide threads, and multiple address spaces). We have built Stampede and it runs on clusters of SMPs. To date we have implemented two applications on Stampede, one of which is discussed herein. In this paper we describe a part of Stampede called Space-Time Memory (STM). It is a novel data sharing abstraction that enables interactive multimedia applications to manage a collection of time-sequenced data items simply, efficiently, and transparently across a cluster. STM relieves the application programmer from low level synchronization and data communication by providing a high level interface that subsumes buffer management, inter-thread synchronization, and location transparency for data produced and accessed anywhere in the cluster. STM also automatically handles garbage collection of data items that will no longer be accessed by any of the application threads. We discuss ease of use issues for developing applications using STM, and present preliminary/performance results to show that STM's overhead is low.

关键词： parallel processing systems

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Transparent adaptive parallelism on NOWs using OpenMP

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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Proceedings of the acm SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 96-106页

作者： Scherer, Alex Lu, Honghui Gross, thomas Zwaenepoel, Willy ETH Zurich Zurich Switzerland

We present a system that allows OpenMP programs to execute on a network of workstations with a variable number of nodes. the ability to adapt to a variable number of nodes allows a program to take advantage of additional nodes that become available after it starts execution, or to gracefully scale down when the number of available nodes is reduced. We demonstrate that the cost of adaptation is modest;the system allows a program to adapt at a moderate rate without much performance loss. Two ideas underlie the efficiency of our design. First, we recognize that OpenMP programs exhibit convenient adaptation points during their execution, points at which the cost of adaptation can be much reduced. Second, by allowing a process a certain grace period before it must leave a node, we insure that most adaptations can occur at these adaptation points, and thus at low cost. Migration of a process, a much more expensive method for providing adaptivity, is used only as a back-up solution, when the process cannot reach an adaptation point within the grace period. Our implementation consists of an OpenMP pre-processor that generates TreadMarks distributed shared memory (DSM) programs, and a version of TreadMarks modified to adapt to a variable number of nodes. Using a DSM as the underlying substrate facilitates the data (re-)distribution necessary after an adaptation.

关键词： parallel processing systems

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programming the FlexRAM parallel intelligent memory system

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acm SIGPLAN NOTICES 2003年第10期38卷 49-60页

作者： Fraguela, BB Renau, J Feautrier, P Padua, D Torrellas, J Univ A Coruna Dept Elect & Sistemas Coruna Spain Univ Illinois Dept Comp Sci Urbana IL 61801 USA Ecole Normale Super Lyon LIP F-69364 Lyon France

In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. the result is a highly-parallel, heterogeneous machine that is able to exploit computation in the main memory. While several instantiations of this architecture have been proposed, the question of how to effectively program them with little effort has remained a major challenge. In this paper, we show how to effectively hand-program an intelligent memory architecture at a high level and with very modest effort. We use FlexRAM as a prototype architecture. To program it, we propose a family of high-level compiler directives inspired by OpenMP called CFlex. Such directives enable the processors in memory to execute the program in cooperation with the main processor. In addition, we propose libraries of highly-optimized functions called Intelligent Memory Operations (IMOs). these functions program the processors in memory through CFlex, but make them completely transparent to the programmer. Simulation results show that, with CFlex and IMOs, a server with 64 simple processors in memory runs on average 10 times faster than a conventional server. Moreover, a set of conventional programs with 240 lines on average are transformed into CFlex parallel form with only 7 CFlex directives and 2 additional statements on average.

关键词： languages intelligent memory architecture compiler directives programming heterogeneous computers parallel languages

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Efficient implementation of Java's Remote Method Invocation

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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Proceedings of the acm SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 173-182页

作者： Maassen, Jason van Nieuwpoort, Rob Veldema, Ronald Bal, Henri E. Plaat, Aske Vrije Universiteit Amsterdam Netherlands

Java offers interesting opportunities for parallel computing. In particular, Java Remote Method Invocation provides an unusually flexible kind of Remote Procedure Call. Unlike RPC, RMI supports polymorphism, which requires the system to be able to download remote classes into a running application. Sun's RMI implementation achieves this kind of flexibility by passing around object type information and processing it at run time, which causes a major run time overhead. Using Sun's JDK 1.1.4 on a Pentium Pro/Myrinet cluster, for example, the latency for a null RMI (without parameters or a return value) is 1228 μsec, which is about a factor of 40 higher than that of a user-level RPC. In this paper, we study an alternative approach for implementing RML based on native compilation. this approach allows for better optimization, eliminate the need for processing of type information at run time, and makes a light weight communication protocol possible. We have built a Java system based on a native compiler, which supports both compile time and run time generation of marshallers. We find that almost all of the run time overhead of RMI can be pushed to compile time. With this approach, the latency of a null RMI is reduced to 34 μsec, while still supporting polymorphic RMIs (and allowing interoperability with other JVMs).

关键词： parallel processing systems

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Backtracking-based Load Balancing

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acm SIGPLAN NOTICES 2009年第4期44卷 55-64页

作者： Hiraishi, Tasuku Yasugi, Masahiro Umatani, Seiji Yuasa, Taiichi Kyoto Univ Acad Ctr Comp & Media Studies Kyoto 6068501 Japan Kyoto Univ Grad Sch Informat Kyoto 6068501 Japan

High-productivity languages for parallel computing become more important as parallel environments including multicores become more common. Cilk is such a language. It provides good load balancing for many applications including irregular ones;that is, it keeps all workers busy by creating plenty of "logical" threads and adopting the oldest-first work stealing strategy. this paper proposes a "logical thread"-free framework called Tascell, which achieves a higher performance and supports a wider range of parallel environments including clusters without loss of productivity. A Tascell worker spawns a "real" task only when requested by another idle worker. the worker performs the spawning by temporarily "backtracking" and restoring its oldest task-spawnable state. Our approach eliminates the cost of spawning/managing logical threads. It also promotes the reuse of workspaces and improves the locality of reference since it does not need to prepare a workspace for each concurrently runnable logical thread. Furthermore, Tascell enables elegant and highly-efficient backtrack search algorithms with delayed workspace copying. For instance, our 16-queens problem solver is 1.86 times faster than Cilk on a system with two dual-core processors. Our approach also enables a single program to run in both shared and distributed memory environments with reasonable efficiency and scalability.

关键词： Design Languages Performance load balancing parallel computing backtracking backtrack search

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Serialization Sets: A Dynamic Dependence-Based parallel Execution Model

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acm SIGPLAN NOTICES 2009年第4期44卷 85-95页

作者： Allen, Matthew D. Sridharan, Srinath Sohi, Gurindar S. Univ Wisconsin Dept Comp Sci Madison WI 53706 USA

this paper proposes a new parallel execution model where programmers augment a sequential program with pieces of code called serializers that dynamically map computational operations into serialization sets of dependent operations. A runtime system executes operations in the same serialization set in program order, and may concurrently execute operations in different sets. Because serialization sets establish a logical ordering on all operations, the resulting parallel execution is predictable and deterministic. We describe the API and design of Prometheus, a C++ library that implements the serialization set abstraction through compile-time template instantiation and a runtime support library. We evaluate a set of parallel programs running on the x86_64 and SPARC-V9 instruction sets and study their performance on multi-core, symmetric multiprocessor, and ccNUMA parallel machines. By contrast with conventional parallel execution models, we find that Prometheus programs are significantly easier to write, test, and debug, and their parallel execution achieves comparable performance.

关键词： Languages Performance parallel computing runtime system serialization sets serializer

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