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检索条件"任意字段=16th International Conference on Field Programmable Logic and Applications"
2124 条 记 录,以下是121-130 订阅
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Characterizing Latency Overheads in the Deployment of FPGA Accelerators  30
Characterizing Latency Overheads in the Deployment of FPGA A...
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30th international conference on field-programmable logic and applications (FPL)
作者: Cooke, Ryan A. Fahmy, Suhaib A. Univ Warwick Sch Engn Coventry W Midlands England
FPGA hardware accelerators have recently enjoyed significant attention as platforms for further accelerating computation in the datacenter but they potentially add additional layers of hardware and software interfacin... 详细信息
来源: 评论
Placing Partially Reconfigurable Stream Processing applications on FPGAs  25
Placing Partially Reconfigurable Stream Processing Applicati...
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25th international conference on field programmable logic and applications
作者: Grigore, Nicolae Bogdan Koch, Dirk Univ Manchester Manchester M13 9PL Lancs England
Finding placement locations for modules on an FPGA in a limited amount of time is a crucial task that determines the efficiency of a dynamic partially reconfigurable system. In this work, we will define a placement me... 详细信息
来源: 评论
FPGA-based All-digital Transmitters  25
FPGA-based All-digital Transmitters
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25th international conference on field programmable logic and applications
作者: Cordeiro, R. F. Oliveira, Arnaldo S. R. Vieira, Jose Univ Aveiro DETI Inst Telecomunicaes Aveiro Portugal
this paper presents the architecture and implementation of an FPGA-based all digital transmitter for wireless radio communications. these transmitters allow a greater degree of flexibility for the carrier frequency, s... 详细信息
来源: 评论
Facilitating Easier Access to FPGAs in the Heterogeneous Cloud Ecosystems  28
Facilitating Easier Access to FPGAs in the Heterogeneous Clo...
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28th international conference on field programmable logic and applications (FPL)
作者: Minhas, Umar Ibrahim Woods, Roger Karakonstantis, Georgios Queens Univ Belfast Belfast Antrim North Ireland
With FPGAs being increasingly integrated into existing software-based heterogeneous cloud environments, novel evaluation mechanisms are required to reveal the energy performance trade-offs of accelerators (FPGAs, GPUs... 详细信息
来源: 评论
Multiplexer-based routing fabric for reconfigurable logic
Multiplexer-based routing fabric for reconfigurable logic
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17th international conference on field programmable logic and applications
作者: Bennebroek, Marlyn Danilin, Alexander Philips Res Europe High Tech Campus 5 NL-5656 AE Eindhoven Netherlands NXP Res NL-5656 AE Eindhoven Netherlands
A novel routing fabric is introduced that offers high flexibility at significant lower silicon cost compared to routing fabrics currently incorporated in many field programmable Gate Array (FPGA) devices, IP cores, an... 详细信息
来源: 评论
Enabling Low Impact, Rapid Debug for Highly Utilized FPGA Designs  28
Enabling Low Impact, Rapid Debug for Highly Utilized FPGA De...
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28th international conference on field programmable logic and applications (FPL)
作者: Hale, Robert Hutchings, Brad Brigham Young Univ Provo UT 84602 USA
Inserting soft logic analyzers into FPGA circuits is a common way to provide signal visibility at run-time, helping users locate bugs in their designs. However, this can become infeasible for highly (70-90+%) utilized... 详细信息
来源: 评论
Self-healing circuits for space-applications
Self-healing circuits for space-applications
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17th international conference on field programmable logic and applications
作者: Panhofer, thomas Delvai, Martin Vienna Univ Technol Inst Comp Engn Embedded Comp Syst Grp Vienna Austria
No abstract available
来源: 评论
Defect tolerance in multiple-FPGA systems
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IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 2006年 第3期153卷 139-145页
作者: Hyder, Z. Wawrzynek, J. Univ Calif Berkeley Berkeley CA 94720 USA
SRAM-based field programmable gate arrays (FPGAs) have an inherent capacity for defect tolerance. A simple scheme that exploits this potential in multiple-FPGA systems is prod posed. the symmetry of the system is expl... 详细信息
来源: 评论
TensorFlow to Cloud FPGAs: Tradeoffs for Accelerating Deep Neural Networks  29
TensorFlow to Cloud FPGAs: Tradeoffs for Accelerating Deep N...
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29th international conference on field-programmable logic and applications (FPL)
作者: Hadjis, Stefan Olukotun, Kunle Stanford Univ Dept Comp Sci Stanford CA 94305 USA
We present the first open-source TensorFlow to FPGA tool capable of running state-of-the-art DNNs. Running TensorFlow on the Amazon cloud FPGA instances, we provide competitive performance and higher accuracy compared... 详细信息
来源: 评论
A State Machine Block for High-Level Synthesis  16
A State Machine Block for High-Level Synthesis
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16th IEEE international conference on field-programmable Technology (ICFPT)
作者: Assadikhomami, Shadi Ongko, Jennifer Aamodt, Tor M. Univ British Columbia Dept Elect & Comp Engn Vancouver BC Canada
FPGAs are being deployed in datacenters to enable improved energy efficiency and application acceleration. this paper explores whether FPGA designs can be improved to make them more effective in this new role. We expl... 详细信息
来源: 评论