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检索条件"任意字段=16th International Conference on Field Programmable Logic and Applications"
2124 条 记 录,以下是121-130 订阅
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Defect tolerance in multiple-FPGA systems
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IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 2006年 第3期153卷 139-145页
作者: Hyder, Z. Wawrzynek, J. Univ Calif Berkeley Berkeley CA 94720 USA
SRAM-based field programmable gate arrays (FPGAs) have an inherent capacity for defect tolerance. A simple scheme that exploits this potential in multiple-FPGA systems is prod posed. the symmetry of the system is expl... 详细信息
来源: 评论
Phase Calibrated Ring Oscillator PUF Design and Implementation on FPGAs  27
Phase Calibrated Ring Oscillator PUF Design and Implementati...
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27th international conference on field programmable logic and applications (FPL)
作者: Yan, Wei Jin, Chenglu Tehranipoor, Fatemeh Chandy, John A. Univ Connecticut Storrs CT 06269 USA
A ring oscillator physical unclonable function (RO PUF) is an application-constrained hardware security primitive that can be used for authentication and key generation. PUFs depend on variability during the fabricati... 详细信息
来源: 评论
the Monte Carlo PUF  27
The Monte Carlo PUF
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27th international conference on field programmable logic and applications (FPL)
作者: Rozic, Vladimir Yang, Bohan Vliegen, Jo Mentens, Nele Verbauwhede, Ingrid Katholieke Univ Leuven COSIC Kasteelpk Arenberg 10 B-3001 Leuven Heverlee Belgium
Physically unclonable functions are used for IP protection, hardware authentication and supply chain security. While many PUF constructions have been put forward in the past decade, only few of them are applicable to ... 详细信息
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A Security Library for FPGA Interlays  27
A Security Library for FPGA Interlays
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27th international conference on field programmable logic and applications (FPL)
作者: Vaishnav, Anuj Ordaz, Jose Raul Garcia Koch, Dirk Univ Manchester Sch Comp Sci Manchester Lancs England
Many CPU design houses have added dedicated support for cryptography in recent processor generations, including Intel, IBM, and ARM. While adding accelerators and/or dedicated instructions boosts performance on crypto... 详细信息
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High-Speed Chromatic Dispersion Compensation Filtering in FPGAs for Coherent Optical Communication  30
High-Speed Chromatic Dispersion Compensation Filtering in FP...
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30th international conference on field-programmable logic and applications (FPL)
作者: Bae, Cheolyong Gustafsson, Oscar Linkoping Univ Dept Elect Engn Linkoping Sweden
Chromatic dispersion is one of the error sources limiting the transmission capacity in coherent optical communication that can be mitigated with digital signal processing. In this paper, the current status and plans o... 详细信息
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Self-healing circuits for space-applications
Self-healing circuits for space-applications
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17th international conference on field programmable logic and applications
作者: Panhofer, thomas Delvai, Martin Vienna Univ Technol Inst Comp Engn Embedded Comp Syst Grp Vienna Austria
No abstract available
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Optimizing Streaming Stencil Time-step Designs via FPGA Floorplanning  27
Optimizing Streaming Stencil Time-step Designs via FPGA Floo...
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27th international conference on field programmable logic and applications (FPL)
作者: Rabozzi, Marco Natale, Giuseppe Festa, Biagio Miele, Antonio Santambrogio, Marco D. Politecn Milan Milan Italy
Stencil computations represent a highly recurrent class of algorithms in various high performance computing scenarios. the Streaming Stencil Time-step (SST) architecture is a recent implementation of stencil computati... 详细信息
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Improving timing-driven FPGA packing with physical information
Improving timing-driven FPGA packing with physical informati...
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17th international conference on field programmable logic and applications
作者: Chen, Doris T. Vorwerk, Kristofer Kennings, Andrew Univ Waterloo Waterloo ON N2L 3G1 Canada
the traditional approach to FPGA packing and CLB-level placement has been shown to yield significantly worse quality than approaches which allow BLES to move during placement. In practice, however, modern FPGA archite... 详细信息
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Characterizing Latency Overheads in the Deployment of FPGA Accelerators  30
Characterizing Latency Overheads in the Deployment of FPGA A...
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30th international conference on field-programmable logic and applications (FPL)
作者: Cooke, Ryan A. Fahmy, Suhaib A. Univ Warwick Sch Engn Coventry W Midlands England
FPGA hardware accelerators have recently enjoyed significant attention as platforms for further accelerating computation in the datacenter but they potentially add additional layers of hardware and software interfacin... 详细信息
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Placing Partially Reconfigurable Stream Processing applications on FPGAs  25
Placing Partially Reconfigurable Stream Processing Applicati...
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25th international conference on field programmable logic and applications
作者: Grigore, Nicolae Bogdan Koch, Dirk Univ Manchester Manchester M13 9PL Lancs England
Finding placement locations for modules on an FPGA in a limited amount of time is a crucial task that determines the efficiency of a dynamic partially reconfigurable system. In this work, we will define a placement me... 详细信息
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