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检索条件"任意字段=16th International Conference on Field Programmable Logic and Applications"
2120 条 记 录,以下是291-300 订阅
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OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs  29
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping...
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29th international conference on field-programmable logic and applications (FPL)
作者: Tang, Xifan Giacomin, Edouard Alacchi, Aurelien Chauviere, Baudouin Gaillardon, Pierre-Emmanuel Univ Utah Lab NanoIntegrated Syst LNIS Salt Lake City UT 84112 USA
Driven by the strong need in data processing applications, field programmable Gate Arrays (FPGAs) are playing an ever-increasing role as programmable accelerators in modern computing systems. To fully unlock processin... 详细信息
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Quantifying the Benefits of Dynamic Partial Reconfiguration for Embedded Vision applications  29
Quantifying the Benefits of Dynamic Partial Reconfiguration ...
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29th international conference on field-programmable logic and applications (FPL)
作者: Nguyen, Marie Tamburo, Robert Narasimhan, Srinivasa Hoe, James C. Carnegie Mellon Univ Pittsburgh PA 15213 USA
Dynamic partial reconfiguration (DPR) allows parts of an FPGA to be reprogrammed at runtime (i.e., repurposed). though DPR has been supported by commercial devices and tools for more than a decade, it has been underut... 详细信息
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An Embedded Digital Multi-channel Analyzer for Radiation Detection Based on FPGA  7th
An Embedded Digital Multi-channel Analyzer for Radiation Det...
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7th EAI international conference on Industrial Networks and Intelligent Systems, INISCOM 2021
作者: Trinh, Quang-Kien Trinh, Van-Ninh Le, thanh-Bang Dinh, Tien-Hung Cao, Van-Hiep Le Quy Don Technical University Hanoi Viet Nam Military Institute of Chemistry and Environment/High Command of Chemical Hanoi Viet Nam
In recent years, digital processing algorithms have been widely applied in spectrum processing applications. Besides, FPGA technology, thanks to its undeniable advantages in flexibility, high integration, and cost-eff... 详细信息
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Area Optimized Hardware Architecture of Piccolo-80 Lightweight Block Cipher  5th
Area Optimized Hardware Architecture of Piccolo-80 Lightweig...
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5th international conference on Microelectronics, Computing and Communication Systems, MCCS 2020
作者: Mishra, Shubham Mishra, Zeesha Acharya, Bibhudendra Department of Electronics and Communication National Institute of Technology Raipur CG492010 India
Lightweight cryptography is a field of cryptography where implementation for resource constrained devices are in big demand. Piccolo is an ultra-lightweight block cipher having block size of 64-bit and key size of 80-... 详细信息
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Finding a Needle in the Haystack of Hardened Interconnect Patterns  29
Finding a Needle in the Haystack of Hardened Interconnect Pa...
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29th international conference on field-programmable logic and applications (FPL)
作者: Nikolic, Stefan Zgheib, Grace Ienne, Paolo Ecole Polytech Fed Lausanne Sch Comp & Commun Sci CH-1015 Lausanne Switzerland Intel Corp San Jose CA USA
Circuits naturally exhibit recurring patterns of local interconnect. Hardening those patterns when designing field programmable Gate Array (FPGA) clusters can both eliminate slow programmable connections from the crit... 详细信息
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A Flexible Design Automation Tool for Accelerating Quantized Spectral CNNs  29
A Flexible Design Automation Tool for Accelerating Quantized...
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29th international conference on field-programmable logic and applications (FPL)
作者: Rajat, Rachit Zeng, Hanqing Prasanna, Viktor Univ Southern Calif Los Angeles CA 90007 USA
CNNs have proven to be extremely powerful in various computer vision applications. To alleviate the computation burden and improve hardware efficiency, low-complexity convolution algorithms (e.g., spectral convolution... 详细信息
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Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA  29
Hybrid Dot-Product Calculation for Convolutional Neural Netw...
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29th international conference on field-programmable logic and applications (FPL)
作者: Vestias, Mario Duarte, Rui Policarpo de Sousa, Jose T. Neto, Horacio Inst Politecn Lisboa INESC ID ISEL Lisbon Portugal Univ Lisbon INESC ID Inst Super Tecn Lisbon Portugal
Convolutional Neural Networks (CNN) are quite useful in edge devices for security, surveillance, and many others. Running CNNs in embedded devices is a design challenge since these models require high computing power ... 详细信息
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Hardware Accelerator for Dual Standard Deblocking Filter
Hardware Accelerator for Dual Standard Deblocking Filter
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international conference on VLSI Design
作者: P. Saravanan B. Syndia Priyadarshini P. Vignesh Kanna P. Vaishnavi PSG College of Technology Coimbatore India
Advanced Video Coding (AVC) also known as H.264 is a popular video coding standard which is used in many image processing applications. In order to fulfill the increasing demand for better video quality with less comp... 详细信息
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A new CAD tool for Single Event Transient Analysis and mitigation on Flash-based FPGAs
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INTEGRATION-thE VLSI JOURNAL 2019年 67卷 73-81页
作者: Azimi, S. Du, B. Sterpone, L. Codinachs, D. M. Grimoldi, R. Cattaneo, L. Politecn Torino Dipartimento Automat & Informat Turin Italy European Space Agcy Noordwijk Netherlands OHB Italia Milan Italy Microchip Milan Italy
Flash-based field programmable Gate Array (FPGA) devices are nowadays golden core of many applications especially in space and avionic fields where reliability is an important concern. In particular, for Flash-based F... 详细信息
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On-the-Fly Parallel Data Shuffling for Graph Processing on OpenCL-based FPGAs  29
On-The-Fly Parallel Data Shuffling for Graph Processing on O...
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29th international conference on field-programmable logic and applications (FPL)
作者: Chen, Xinyu Bajaj, Ronak Chen, Yao He, Jiong He, Bingsheng Wong, Weng-Fai Chen, Deming Natl Univ Singapore Singapore Singapore Adv Digital Sci Ctr Singapore Singapore Alibaba Grp Hangzhou Peoples R China Univ Illinois Urbana IL 61801 USA
Graph processing has attracted much attention recently due to its popularity in many big data analytic applications. With high performance and energy efficiency, FPGAs can be an attractive architecture for graph proce... 详细信息
来源: 评论