检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

2,087 篇 会议
31 篇 期刊文献
8 册 图书

馆藏范围

2,126 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,363 篇 工学
- 1,143 篇 计算机科学与技术...
- 757 篇 软件工程
- 452 篇 电气工程
- 226 篇 电子科学与技术（可...
- 90 篇 信息与通信工程
- 79 篇 控制科学与工程
- 41 篇 机械工程
- 38 篇 仪器科学与技术
- 32 篇 动力工程及工程热...
- 29 篇 建筑学
- 19 篇 土木工程
- 19 篇 生物工程
- 17 篇 核科学与技术
- 15 篇 光学工程
- 13 篇 生物医学工程（可授...
- 9 篇 材料科学与工程（可...
- 9 篇 安全科学与工程
- 8 篇 交通运输工程
- 6 篇 石油与天然气工程
181 篇 理学
- 104 篇 数学
- 43 篇 物理学
- 22 篇 生物学
- 20 篇 系统科学
- 13 篇 统计学（可授理学、...
- 8 篇 化学
53 篇 管理学
- 41 篇 管理科学与工程(可...
- 21 篇 工商管理
- 15 篇 图书情报与档案管...
17 篇 法学
- 15 篇 社会学
13 篇 医学
11 篇 经济学
- 11 篇 应用经济学
6 篇 军事学
5 篇 农学
3 篇 教育学

主题

947 篇 field programmab...
735 篇 field programmab...
322 篇 hardware
172 篇 computer archite...
146 篇 logic gates
130 篇 table lookup
115 篇 clocks
96 篇 throughput
94 篇 random access me...
85 篇 routing
82 篇 software
80 篇 acceleration
75 篇 delays
74 篇 optimization
67 篇 kernel
62 篇 logic
62 篇 switches
61 篇 registers
56 篇 algorithm design...
52 篇 parallel process...

机构

17 篇 univ toronto dep...
9 篇 imperial coll lo...
9 篇 ecole polytech f...
8 篇 department of co...
8 篇 tokyo inst techn...
7 篇 univ british col...
7 篇 school of comput...
7 篇 brigham young un...
7 篇 imperial coll lo...
6 篇 univ tsukuba tsu...
6 篇 xilinx inc 2100 ...
6 篇 university of ch...
6 篇 department of el...
6 篇 univ warwick sch...
6 篇 xilinx inc san j...
5 篇 univ manchester ...
5 篇 department of el...
5 篇 univ toronto dep...
5 篇 department of el...
5 篇 fudan univ state...

作者

31 篇 luk wayne
21 篇 maruyama tsutomu
16 篇 koch dirk
13 篇 ienne paolo
12 篇 wayne luk
12 篇 wilton steven j....
12 篇 betz vaughn
11 篇 fahmy suhaib a.
11 篇 cheung peter y. ...
11 篇 chow paul
10 篇 constantinides g...
9 篇 vaughn betz
9 篇 prasanna viktor ...
8 篇 kapre nachiket
8 篇 suhaib a. fahmy
8 篇 alonso gustavo
8 篇 hutchings brad
8 篇 paolo ienne
8 篇 habib mehrez
8 篇 amano hideharu

语言

2,111 篇 英文
9 篇 其他
5 篇 中文
1 篇 俄文

检索条件"任意字段=16th International Conference on Field Programmable Logic and Applications"

共 2126 条记录，以下是31-40 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

An Efficient Clock Gated RSFQ Matrix Multiplier through FPGA Implementation 9

An Efficient Clock Gated RSFQ Matrix Multiplier through FPGA...

引用

9th international conference on Advanced Computing and Communication Systems, ICACCS 2023

作者： Kaarthik, K. Vivek, C. Sivaranjani, S. M. Kumarasamy College of Engineering Karur India Sri Eshwar College of Engineering Coimbatore India

ISBN: (纸本)9798350397376

Multiplier are one of the indispensible component in Arithmetic and logic Unit. Many applications for image and signal processing use matrix multiplication as their core operation. In order to speed up current solutions and adhere to real-time limitations. the proposed system depicts, the field programmable Gate Array features a clock-gated matrix multiplier. the clock-gating approach is used to impact a large number of bit-slicing multipliers in the suggested multiplier. the major goal of this clock-gating technology is to increase performance and decrease power consumption. this suggested multiplier's output bits be restricted to 16 bits. the fundamental gates like XOR,AND, D-flip flops and complete adders are used to create the multiplier that is being given. the multiplier design that is suggested is put into practise using the Altera Quartus II supporting *** CMOS uses two distinct technologies., such as 65nm and 90nm, are taken into consideration when developing the multiplier. Similar to this, the designing methodologies use two separate FPGA devices, Cyclone and Stratix. By testing the metrics such as delay, area and power, the proposed design is assessed. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

TRUSTED VIRTUALIZATION-BASED programmable logic CONTROLLER RESILIENCE USING A BACKFIT APPROACH 16th

TRUSTED VIRTUALIZATION-BASED PROGRAMMABLE LOGIC CONTROLLER R...

引用

16th international conference on Critical Infrastructure Protection

作者： Cervini, James Muller, Daniel Beall, Alexander Maurio, Joseph Rubin, Aviel Watkins, Lanier Johns Hopkins Univ Baltimore MD 21218 USA Johns Hopkins Univ Appl Phys Lab Laurel MD USA Johns Hopkins Univ Appl Phys Lab Crit Infrastruct Protect Grp Laurel MD USA Johns Hopkins Univ Comp Sci Baltimore MD USA Johns Hopkins Univ Informat Secur Inst Baltimore MD USA

ISBN: (纸本)9783031201394;9783031201370;9783031201363

Industrial control systems perform vital cyber-physical functions in critical infrastructure assets. programmable logic controllers, which are prominently found in industrial control environments, execute the operational control logic of cyber-physical systems. Due to the continued escalation of cyber attacks targeting industrial control systems and programmable logic controllers, strengthening the trust and resilience of these systems is paramount. this chapter proposes an approach that leverages virtualization, cryptographic attestation, software-defined networking, security orchestration and a proprietary programmable logic controller runtime application to advance programmable logic controller trust and resilience while facilitating integration in deployed systems. A proof-of-concept capability demonstrated on a physical industrial control system testbed validates the approach. the experimental results confirm that the approach is viable for industrial control applications.

关键词： Industrial control systems virtualization security

来源：评论

学校读者我要写书评

暂无评论

Preliminary Implementation of Toeplitz Hashing on Processor, Co-Processor and SoC 16

Preliminary Implementation of Toeplitz Hashing on Processor,...

引用

16th international conference on COMmunication Systems and NETworkS, COMSNETS 2024

作者： Pandeeti, Guru Satya Dattatreya Dixit, Janhvi Hussain, Asif Behera, Dibya Prakash Dubey, Umang Banerjee, Anindita Maity, Samrit Kumar Modani, Manish Centre for Development of Advanced Computing C-DAC Innovation Park Maharashtra Pune India Nvidia Commerce Zone IT Park Pune Maharashtra Pune India

ISBN: (纸本)9798350383119

Toeplitz Hashing is a class of functions in the 2-universal hash function family, that is widely adopted in quantum secure applications, particularly for the privacy amplification in quantum key distribution to generate secret keys, and as a strong randomness extractor for the quantum random number generators. In this work, we have investigated the preliminary implementation of Toepltiz hashing on processors, co-processors, and system-on-chip (SoC). We have implemented the fast-Fourier transform (FFT)-based Toepltiz hashing on Intel Xeon Cascade-lake 8268 processor and NVIDIA Tesla V100 GPU compute hardware. We have also implemented the binary multiplication-based Toeplitz hashing on the AMD Xilinx ZCU102 FPGA evaluation kit. Further, we present an example of heterogenous computing, by combining an Intel Core i7 CPU with the VEGA ET1031-based Aries v2.0 development board. Finally, we report, for the first time, an implementation of convolution of two matrices on an indigenously designed RISC-V VEGA SoC. Further, we have compared the implementation results following two approaches, i.e. normal matrix multiplication and the number theoretic transform (NTT) method. We report that there is a tenfold reduction in the computational time using the NTT method over the conventional method. © 2024 IEEE.

关键词： Cryptography field programmable Gate Array Graphics Processing Unit Number theoretic Transform Quantum Key Distribution Quantum Random Number Generator RISC-V-based processor Toeplitz Hashing

来源：评论

学校读者我要写书评

暂无评论

Design and Optimization of a Citrus Essential Oil Extraction System by Steam Distillation with Automated Control in Lima, Peru 9

Design and Optimization of a Citrus Essential Oil Extraction...

引用

9th international conference on Automation, Control and Robotics Engineering (CACRE)

作者： Torres-Taipe, Anderson Luigui Zevallos-Crisostomo, Nikolt Mijail Sullca-Mendoza, Yordan Cesar Berann-Espiritu, Manuel Michael Univ Continental Sch Mechatron Engn Huancayo Peru

ISBN: (纸本)9798350350319;9798350350302

the production of essential oils is widely used in the world to combat various diseases. In addition, these oils are essential in the seasoning and flavoring of food and have applications in the field of cosmetology, helping to reduce environmental pollution by avoiding the use of chemical products. Peru is one of the fourteen most outstanding countries for its rich biodiversity in flora and fauna, and is also the sixth largest exporter of citrus fruits in the world. therefore, a citrus essential oil extraction process is analyzed through the design of an industrial-scale essential oil distillation machine. this design includes the automation of the filling and emptying of the distiller to improve the results, as well as the implementation of a closed-loop control system for cooling. the objective is to facilitate operator control and monitoring of the cooling and water filling process through a control panel. After analyzing the distillation process, an average of 1% to 2% of essential oil and 50% of citrus peel hydrolate has been obtained, setting a new standard in the production of essential oils in the country.

关键词： Steam distillation Natural essences Automated control Essence distillation equipment Citrus peel programmable logic Controller

来源：评论

学校读者我要写书评

暂无评论

Design and Implementation of Innovative Workplaces for Education in the field of Smart Technologies with a Focus on Control and Computer Systems 25

Design and Implementation of Innovative Workplaces for Educa...

引用

25th international Carpathian Control conference (ICCC)

作者： Husar, Jozef Hrehova, Stella Zidek, Kamil Tech Univ Kosice Fac Mfg Technol Seat Presov Presov Slovakia

ISBN: (纸本)9798350350708;9798350350715

the paper deals with innovative approaches in engineering education, especially in the field of control and computer systems with an emphasis on the integration of Smart technologies. As part of the research project implemented in the Laboratory of Production Processes Digitization, three specialized workplaces were developed. they provide students with a unique platform for experimentation and innovation in control and computer systems. the first workplace is focused on practical teaching of the Smart technologies basics, where students can construct and program their own Smart systems. We emphasize the importance of a hands-on approach in engineering education, which allows students not only to acquire theoretical knowledge, but also to develop practical skills in the field of design and systems engineering implementation. the second workplace focuses on applications of Smart technologies in homes. Here, students analyze and investigate the interactions among different components of Smart systems, thereby gaining important knowledge about the integration and coordination of control systems in real conditions. the third workplace focuses on Smart industrial applications and contains complex technological equipment, including industrial computers, Internet of things (IoT) modules and peripherals for programmable logic control units (PLC). this workplace offers students the opportunity to design and implement sophisticated control systems for automated processes, expanding their skills in industrial automation and control technologies. Overall, this paper provides a thorough insight into innovative methods in engineering education and highlights how the integration of Smart technologies into educational programs contributes to the development of student competencies. these competencies are critically important to prepare future engineers for the challenges and needs of the modern industrial and business environment.

关键词： Smart technologies education workplace

来源：评论

学校读者我要写书评

暂无评论

Multi-objective and Randomly Distributed Fuzzy logic-Based Unequal Clustering in Heterogeneous Wireless Sensor Networks 16th

Multi-objective and Randomly Distributed Fuzzy Logic-Based U...

引用

16th international conference on Computational Collective Intelligence (ICCCI)

作者： Adnan, Mohd Ahmad, Tazeem Rafi, Saima Abdullah Vurity, Anudeep Inha Univ Incheon South Korea Univ Southern Queensland Brisbane Qld Australia Edinburgh Napier Univ Edinburgh Midlothian Scotland Univ Teknol Petronas Seri Iskandar Perak Malaysia George Mason Univ Fairfax VA 22030 USA

ISBN: (纸本)9783031708152;9783031708169

Wireless Sensor Networks (WSNs) are a crucial component in the fabric of the Internet of things (IoT) ecosystem, enabling a myriad of applications ranging from environmental monitoring to precision agriculture and smart cities. However, these sensors are constrained in terms of energy, computing power, and storage which makes reliable communication a critical research challenge. To address these challenges, unequal clustering has emerged as a promising solution where clusters are intentionally formed with varying sizes to accommodate heterogeneous capabilities and energy demands across the network. In this paper, we introduce a novel Multi-Objective and Randomly Distributed Fuzzy logic-based Unequal Clustering (MORF-UC) scheme to address the challenge of energy management and hotspot issues in WSNs. By leveraging fuzzy logic to account for variables such as distance to the base station (BS), residual energy, node concentration, and data forwarding ratio of nodes, this scheme aims to extend network lifetime, energy use, and data transmission reliability while mitigating the hot spot issues. Simulation results demonstrate that the proposed methodology outperforms existing methods such as TTDFP and MOUOC in the energy conservation, network lifetime extension, and throughput enhancement, thereby offering a significant advancement in the field of WSN optimization.

关键词： Wireless sensor networks Unequal clustering Fuzzy logic Network lifetime Multi-objective Network scalability

来源：评论

学校读者我要写书评

暂无评论

Assessing the Robustness of Real-Time Operating System on Soft Processor against Multiple Bit Upset 23

Assessing the Robustness of Real-Time Operating System on So...

引用

20th ACM international conference on Computing Frontiers, CF 2023

作者： Portaluri, Andrea De Sio, Corrado Sterpone, Luca Dipartimento di Automatica e Informatica Politecnico di Torino Turin Italy

ISBN: (纸本)9798400701405

field-programmable Gate Arrays (FPGAs) are becoming increasingly important for space applications due to their high flexibility, performance, and complexity. In particular, soft-core processors like Xilinx Microblaze are commonly implemented using the programmable logic of FPGAs, making them suitable for embedded applications. However, the netlist of soft microprocessors can be corrupted by the effects of radiation-induced soft errors, in particular Single-Event Effects (SEUs) [1-5]. this work presents a detailed evaluation of the impact of radiation-induced architectural faults affecting the application benchmarks running on the FreeRTOS of the Microblaze embedded soft processor. the effect of Multiple Bits Upsets (MBU) faults during the execution of different software applications on FreeRTOS supported by Microblaze implemented on Zynq-7020 FPGA was evaluated, and the outcome of the software application was investigated. Please, notice that the developed platform is targeting only hardware faults and their impact on the execution of the software running in the operating system. © 2023 Owner/Author.

关键词： Space applications

来源：评论

学校读者我要写书评

暂无评论

A low-cost 4 ps root-mean-square resolution time-todigital converter implemented in a 28 nm field-programmable gate array

A low-cost 4 ps root-mean-square resolution time-todigital c...

引用

7th international conference on Electronics Technology, ICET 2024

作者： Liu, Jinxin Deng, Peipei Liu, Juan Wang, Ying Microsystem and Terahertz Research Center China Academy of Engineering Physics Chengdu China

ISBN: (纸本)9798350363951

this paper presents the implementation of a 28 nm field-programmable gate array (FPGA)-based time-to-digital converter (TDC), which has both high resolution and low-cost characteristics. Due to the simple TDC structure, only a few resources are required, making it suitable for multi-channel applications. An eight-channel TDC was designed in this study. In addition, an automatic nonlinearity calibration logic is implemented within the FPGA, guaranteeing stable performance of the TDC over a wide temperature range. the test results show that the average bin size of a typical channel is 2.55 ps, and the single-shot precision is better than 4 ps. © 2024 IEEE.

关键词： Calibration

来源：评论

学校读者我要写书评

暂无评论

High-Performance SET Hardening Technique for Vision-Oriented applications 19

High-Performance SET Hardening Technique for Vision-Oriented...

引用

19th international conference on Synthesis, Modeling, Analysis and Simulation Methods, and applications to Circuit Design, SMACD 2023

作者： De Sio, Corrado Sterpone, Luca Politecnico di Torino Dipartimento di Automatica e Informatica Turin Italy

ISBN: (纸本)9798350332650

the decreasing feature size of VLSI circuits has led to a rise in Single Event Transients (SETs), making them the dominant cause of errors in modern VLSI devices, especially Flash-based FPGAs. the combinational logic in these devices is particularly vulnerable to SETs, making efficient SET hardening techniques essential. Given the demanding performance requirements for vision-oriented benchmarks, finding an efficient hardening technique that does not exceed area and performance limitations is challenging. this paper presents a SET hardening workflow based on an accurate SET analysis aimed at identifying vulnerable circuit nodes for selectively applying hardening techniques to Microchip RTG4 radiation-hardened Flash-based FPGAs. Results from experiments comparing plain, Global hardening, and proposed selective hardening techniques show the high efficiency of the proposed solution. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

FPGA-Supported HDL Approach to Implement Reversible logic Gate-Based ALU 11

FPGA-Supported HDL Approach to Implement Reversible Logic Ga...

引用

11th international conference on Internet of Everything, Microwave Engineering, Communication and Networks, IEMECON 2023

作者： Sen, Soumya Saha, Piyali Saha, Souvik Dr. B. R. Ambedkar National Institute of Technology Dept. of Electronics & Communication Engineering Jalandhar India Maulana Abul Kalam Azad University of Technology Dept. of Electronics & Communication Engineering West Bengal India University of Engineering & Management Dept. of Electronics & Communication Engineering Jaipur India

ISBN: (纸本)9781665475129

this manuscript banks on the design of reversible gates and implementation of an Arithmetic logic Unit - 16 bit (ALU) utilizing Verilog with Xilinx ISE 14.7, Spartan 6FPGA kit. the same functionality is compared with a basic logic gate- based ALU. Reversible gates can produce a distinct output vector from each input vector, and the opposite is also possible. Circuits with irreversible gates suffer from data erosion. Power loss results from a circuit' s loss of data. In conclusion, gates with reversible logic are preferable over irreversible counterparts. A library of reversible gates, comprising of AND, OR, NAND, NOR, and XOR, using Verification logic Hardware Description Language (HDL) is developed, which in turn contributes to the designing of arithmetic and combinational logic like full adder, decoder (2: 4), decoder (3: S), multiplier, full subtractor, and comparator. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共213页 << < 1 2 3 4 5 6 7 8 9 10 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：