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检索条件"任意字段=16th Symposium on Computer Architecture and High Performance Computing"

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A parallel implementation of the LTSn method for a radiative transfer problem

A parallel implementation of the LTSn method for a radiative...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： R.P. Souto H.F. de Campos Velho S. Stephany A.J. Preto C.F. Segatto M.T. Vilhena Postgraduate Program Applied Computing (CAP/INPE) Sao Paulo Brazil PPGMAp PROMEC UFRGS Universidade Federal do Rio Grande do Sul Porto Alegre Rio Grande do Sul Brazil

A radiative transfer solver that implements the LTSn method was optimized and parallelized using the MPI message passing communication library. Timing and profiling information was obtained for the sequential code in order to identify performance bottlenecks. performance tests were executed in a distributed memory parallel machine, a multicomputer based on IA-32 architecture. the radiative transfer equation was solved for a cloud test case to evaluate the parallel performance of the LTSn method. the LTSn code includes spatial discretization of the domain and Fourier decomposition of the radiances leading to independent azimuthal modes. this yields an independent radiative transfer equation for each mode that can be executed by a different processor in a parallel implementation. Speed-up results show that the parallel implementation is suitable for the used architecture.

关键词： Concurrent computing Message passing Testing computer architecture Libraries Timing Parallel machines Laplace equations Matrix decomposition Communication standards

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Parallel implementation of a lattice-gauge-theory code: studying quark confinement on PC clusters

Parallel implementation of a lattice-gauge-theory code: stud...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： A. Cucchieri T. Mendes G. Travieso A.R. Taurines Instituto de Física de São Carlos Universidade de Sáo Paulo Sao Paulo Brazil Instituto de Física Universidade Federal do Rio Grande do Sul Porto Alegre Rio Grande do Sul Brazil

We consider the implementation of a parallel Monte Carlo code for high-performance simulations on PC clusters with MPI. We carry out tests of speedup and efficiency. the code is used for numerical simulations of pure SU(2) lattice gauge theory at very large lattice volumes, in order to study the infrared behavior of gluon and ghost propagators. this problem is directly related to the confinement of quarks and gluons in the physics of strong interactions.

关键词： Lattices Physics Computational modeling Numerical simulation Protons Neutrons Quantum mechanics Electromagnetic forces Supercomputers computer simulation

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Profiling and optimization of software-based network-analysis applications

Profiling and optimization of software-based network-analysi...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： L. Degioanni M. Baldi F. Risso G. Varenni Dipartimento di Automatica e Informatica Politecnico di Turino Torino Italy

A large set of tools for network monitoring and accounting, security, traffic analysis and prediction - more broadly, for network operation and management - require direct and efficient real-time access to data traveling on the network. Software tools are often preferred because of their low cost and high versatility. However, these tools are often considered to suffer from performance problems on high-speed networks. We demonstrate that, despite the common belief, the performance limits for software real-time network analysis tools are still far from being reached and it can even be improved with limited hardware support. We analyze the performance of a widely used library for network analysis, WinPcap, highlight its bottlenecks, and propose some solutions that almost double the overall speed, thus enabling the deployment of software-based tools on high speed networks.

关键词： Application software performance analysis Software tools high-speed networks Monitoring Data security Telecommunication traffic Costs Software performance Hardware

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A simple low-energy instruction wakeup mechanism

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5th International symposium on high performance computing, ISHPC 2003

作者： Ramírez, Marco A. Cristal, Adrian Veidenbaum, Alexander V. Villa, Luis Valero, Mateo Computer Architecture Department U.P.C Spain University of California IrvineCA United States Mexican Petroleum Institut Mexico National Polytechnic Institute Mexico

ISBN: (纸本)3540203591

Instruction issue consumes a large amount of energy in out of order processors, largely in the wakeup logic. Proposed solutions to the problem require prediction or additional hardware complexity to reduce energy consumption and, in some cases, may have a negative impact on processor performance. this paper proposes a mechanism for instruction wakeup, which uses a multi-block instruction queue design. the blocks are turned off until the mechanism determines which blocks to access on wakeup using a simple successor tracking mechanism. the proposed approach is shown to require as little as 1.5 comparisons per committed instruction for SPEC2000 benchmarks. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Energy utilization

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JRastro: a trace agent for debugging multithreaded and distributed Java programs

JRastro: a trace agent for debugging multithreaded and distr...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： G.J. da Silva L.M. Schnorr B. de Oliveira Stein Laboratório de Sistemas de Computação Universidade Federal de Santa Maria Santa Maria Rio Grande do Sul Brazil

Program tracing is one of the most used techniques to debug parallel and distributed programs. In this technique, events are recorded in trace files during the execution of the program for post mortem visualization of its behavior. We describe JRastro, a trace agent capable of tracing Java programs. the agent was designed to cover three key features: to be transparent to the application developer, to use unmodified Java virtual machines and to observe remote method invocations. By integrating these three features, JRastro differentiates itself from similar tools. Unfortunately, for a complete and clean implementation of RMI visualization, additional support on the Java monitoring system is needed.

关键词： Debugging Java Virtual machining Data visualization Remote monitoring computerized monitoring Condition monitoring Virtual machine monitors Concurrent computing Distributed computing

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New parallel algorithms for frequent itemset mining in very large databases

New parallel algorithms for frequent itemset mining in very ...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： A. Veloso W. Meira Srinivasan Parthasarathy Computer Science Department Universidade Federal de Minas Gerais Brazil Computer and Information Science Department Ohio State Uinversity USA

Frequent itemset mining is a classic problem in data mining. It is a nonsupervised process which concerns in finding frequent patterns (or itemsets) hidden in large volumes of data in order to produce compact summaries or models of the database. these models are typically used to generate association rules, but recently they have also been used in far reaching domains like e-commerce and bio-informatics. Because databases are increasing in terms of both dimension (number of attributes) and size (number of records), one of the main issues in a frequent itemset mining algorithm is the ability to analyze very large databases. Sequential algorithms do not have this ability, especially in terms of run-time performance, for such very large databases. therefore, we must rely on high performance parallel and distributed computing. We present new parallel algorithms for frequent itemset mining. their efficiency is proven through a series of experiments on different parallel environments, that range from shared-memory multiprocessors machines to a set of SMP clusters connected together through a high speed network. We also briefly discuss an application of our algorithms to the analysis of large databases collected by a Brazilian Web portal.

关键词： Parallel algorithms Itemsets Data mining Databases Data analysis Algorithm design and analysis Association rules Runtime Distributed computing high-speed networks

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performance issues of bandwidth reservations for grid computing

Performance issues of bandwidth reservations for grid comput...

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： L.-O. Burchard H.-U. Heiss C.A.F. De Rose Communication and Operating Systems Group Technical University Berlin Germany Post-Graduate Program Computer Science Catholic University of Rio Grande do Sul Porto Alegre Brazil

In general, two types of resource reservations in computer networks can be distinguished: immediate reservations which are made in a just-in-time manner and advance reservations which allow to reserve resources a long time before they are actually used. Advance reservations are especially useful for grid computing but also for a variety of other applications that require network quality-of-service, such as content distribution networks or even mobile clients, which need advance reservation to support handovers for streaming video. With the emerged MPLS standard, explicit routing can be implemented also in IP networks, thus overcoming the unpredictable routing behavior which so far prevented the implementation of advance reservation services. the impact of such advance reservation mechanisms on the performance of the network with respect to the amount of admitted requests and the allocated bandwidth has so far not been examined in detail. We show that advance reservations can lead to a reduced performance of the network with respect to both metrics. the analysis of the reasons shows a fragmentation of the network resources. In advance reservation environments, additional new services can be defined such as malleable reservations and can lead to an increased performance of the network. Four strategies for scheduling malleable reservations are presented and compared. the results of the comparisons show that some strategies increase the resource fragmentation and are therefore unsuitable in the considered environment while others lead to a significantly better performance of the network. Besides discussing the performance issue, the software architecture of a management system for advance reservations is presented.

关键词： Bandwidth Grid computing computer networks Application software Quality of service Mobile computing Streaming media Multiprotocol label switching IP networks Software architecture

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Isolating critical cases for reciprocals using integer factorization

Isolating critical cases for reciprocals using integer facto...

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computer Arithmetic (ARIth)

作者： J. Harrison Intel Corporation Hillsboro OR USA

One approach to testing and/or proving correctness of a floating-point algorithm computing a function f is based on finding input floating-point numbers a such that the exact result f(a) is very close to a "rounding boundary", i.e. a floating-point number or a midpoint between them. We show how to do this for the reciprocal function by utilizing prime factorizations. We present the method and show examples, as well as making a fairly detailed study of its expected and worst-case behavior. We point out how this analysis of reciprocals can be useful in analyzing certain reciprocal algorithms, and also show how the approach can be trivially adapted to the reciprocal square root function.

关键词： computer aided software engineering Testing Algorithm design and analysis Approximation algorithms computer aided instruction computer architecture Concrete Sufficient conditions Error correction computer displays

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An evaluation of cJava system architecture

An evaluation of cJava system architecture

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International symposium on computer architecture and high performance computing (SBAC-PAD)

作者： A.F. da Silva M. Lobosco C.L. de Amorim COPPE Systems Engineering Federal University of Rio de Janeiro Brazil

We propose a new distributed run-time environment, which we called cJava, that enables multithread Java applications to execute in clusters transparently. Our implementation of cJava supports the distributed shared memory (DSM) which required significant extensions to the original Java virtual machine (JVM). First, a distributed object manager was incorporated to the JVM's memory management subsystem for creating a global object space. Second, synchronized accesses to the global object space were extended so that they could use the lock() and unlock() primitives that cJava's DSM supports. third, cJava adapted the thread subsystem to enable remote creation and global monitors. Last, a subsystem/or remote signaling was added to the original JVM. the main advantage of cJava is that it can execute existing multithread Java applications straightaway. Most importantly, our results of cJava's performance across several benchmarks show that cJava offers an efficient run-time system for executing transparently multithread Java applications in clusters.

关键词： Java Yarn Virtual machining Application software computer architecture Programming profession Multiprocessing systems Instruction sets Systems engineering and theory Runtime

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A hardware Gaussian noise generator for channel code evaluation 11

A hardware Gaussian noise generator for channel code evaluat...

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11th Annual IEEE symposium on Field-Programmable Custom computing Machines, FCCM 2003

作者： Lee, Dong-U. Luk, W. Villasenor, J. Cheung, P.Y.K. Department of Computing Imperial College London United Kingdom Electrical Engineering Department University of California Los AngelesCA United States Department of EEE Imperial College London United Kingdom

ISBN: (纸本)0769519792

Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation of PC-based simulation. We describe a hardware-based Gaussian noise generator used as a key component in a hardware simulation system, for exploring channel code behavior at very low bit error rates (BERs) in the range of 10-9 to 10-10. the main novelty is the design and use of nonuniform piecewise linear approximations in computing trigonometric and logarithmic functions. the parameters of the approximation are chosen carefully to enable rapid computation of coefficients from the inputs, while still retaining extremely high fidelity to the modeled functions. the output of the noise generator accurately models a true Gaussian PDF even at very high /spl sigma/ values. Its properties are explored using: (a) several different statistical tests, including the chi-square test and the Kolmogorov-Smirnov test, and (b) an application for decoding of low density parity check (LDPC) codes. An implementation at 133MHz on a Xilinx Virtex-II XC2V4000-6 FPGA produces 133 million samples per second, which is 40 times faster than a 2.13GHz PC;another implementation on a Xilinx Spartan-IIE XC2S300E-7 FPGA at 62MHz is capable of a 20 times speedup. the performance can be improved by exploiting parallelism: an XC2V4000-6 FPGA with three parallel instances of the noise generator at 126 MHz can run 100 times faster than a 2.13GHz PC. We illustrate the deterioration of clock speed with the increase in the number of instances. © 2003 IEEE.

关键词： Bit error rate

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