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检索条件"任意字段=16th Symposium on Computer Architecture and High Performance Computing"

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A simulation-based evaluation of a disk I/O subsystem for a massively parallel computer: JUMP-1

A simulation-based evaluation of a disk I/O subsystem for a ...

引用

International Conference on Distributed computing Systems

作者： H. Nakajo S. Ohtani Y. Kaneda PEDepartment of Computer and Systems Engineering Kobe University Japan

JUMP-1 is a distributed shared-memory massively parallel computer and is composed of multiple clusters of inter-connected network called RDT (Recursive Diagonal Torus). Each cluster in JUMP-1 consists of 4 element processors, secondary cache memories, and 2 MBP (Memory Based Processor) for high-speed synchronization and communication among clusters. the I/O subsystem is connected to a cluster via a high-speed serial link called STAFF-Link. the I/O buffer memory is mapped onto the JUMP-1 global shared-memory to permit each I/O access operation as memory access. In this paper we describe evaluation of the fundamental performance of the disk I/O subsystem using event-driven simulation, and estimated performance with a Video On Demand (VOD) application.

关键词： Computational modeling computer simulation Concurrent computing Distributed computing computer networks high performance computing Application software Research and development Systems engineering and theory Cache memory

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Towards Web/Java-based high performance distributed computing-an evolving virtual machine 96

Towards Web/Java-based high performance distributed computin...

引用

International symposium on high performance Distributed computing

作者： G. Fox W. Furmanski Northeast Parallel Architectures Center Syracuse University Syracuse NY USA

ISBN: (纸本)9780818675829

Discusses the emergent World Wide Web-based distributed environments for high-performance computing and communications (HPCC) on the National Information Infrastructure (NII) with the focus on Java as an enabling technology. We start with a review of the past, present and near-term future of the "Java phenomenon", exposed in the background of some related previous approaches towards a distributed interpretative virtual machine architecture. Next, we discuss the anticipated role of Java in building distributed Web-based computing environments. We outline an evolutionary path from the current Web technology "soup" towards "all-Java" systems and we illustrate this process in terms of the Northeast Parallel architectures Center (NPAC) Web technology prototypes (WebVM, WebFlow, Bridge-based Collaboratory) and selected applications (CareWeb, 3D Visible Human).

关键词： Java Distributed computing high performance computing Virtual machining computer architecture Buildings Parallel architectures Prototypes Collaboration Humans

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A task migration implementation of the Message-Passing Interface

A task migration implementation of the Message-Passing Inter...

引用

International symposium on high performance Distributed computing

作者： J. Robinson S.H. Russ B. Flachs B. Heckel NSF Engineering Research Center for Computatiorial Field Simulation Mississippi State University USA MicroMagnetic Inc. Sunnyvale CA USA

In order to use networks of workstations in parallel processing applications, several schemes have been devised to allow processes on different, possibly heterogeneous, platforms to communicate with one another. the Message-Passing Interface (MPI) is one such scheme that allows for message-passing across different architectures. the MPI specification does not make provisions for the migration of a process between machines. this paper describes the work required to modify, an MPI implementation to allow for task migration. It also describes "Hector", our heterogeneous computing task allocator that is used to migrate tasks automatically and improve the overall performance of a parallel program.

关键词： Workstations Concurrent computing Parallel processing Parallel programming computer networks Computational modeling computer architecture Scientific computing Floating-point arithmetic Distributed computing

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Meeting delay requirements in computer networks with wormhole routing

Meeting delay requirements in computer networks with wormhol...

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International Conference on Distributed computing Systems

作者： Biao Chen Hong Li Wei Zhao Department of Computer Science Texas A and M University College Station TX USA

ISBN: (纸本)0818673990

We study high performance networks with wormhole routing and investigate their performance in terms of meeting message delay constraints. Traditional system uses unregulated greedy transmission control. this may result in unfairness of network access and unbounded packet blocking time, making it very difficult to efficiently support real-time applications. To overcome this problem, we propose a regulated transmission control method in which packet transmission at the source is regulated and hence unnecessary network contention is eliminated the regulated method is a generalization of the unregulated method and can be easily implemented in most of the commercially available networks.

关键词： Intelligent networks computer networks Routing Real time systems computer science Control systems throughput Application software Prototypes Surveillance

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An evaluation of the Amoeba group communication system

An evaluation of the Amoeba group communication system

引用

International Conference on Distributed computing Systems

作者： M.F. Kaashoek A.S. Tanenbaum Laboratory for Computer Science M.I.T. Cambridge USA Department of Math and Computer Science Vrije Universiteit Amsterdam Netherlands

the Amoeba group communication system has two unique aspects: (1) it uses a sequencer-based protocol with negative acknowledgements for achieving a total order on all group messages; and (2) users choose the degree of fault tolerance they desire. this paper reports on our design decisions in retrospect, the performance of the Amoeba group system, and our experiences using the system. We conclude that sequencer-based group protocols achieve high performance (comparable to Amoeba's fast remote procedure call implementation), that the scalability of our sequencer-based protocols is limited by message processing time, and that the flexibility and modularity of user-level implementations of protocols is likely to outweigh the potential performance loss.

关键词： Protocols Broadcasting computer science Scalability performance loss Laboratories Fault tolerant systems Telecommunication network reliability Power system reliability Fault tolerance

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CNI: a high-performance network interface for workstation clusters 96

CNI: a high-performance network interface for workstation cl...

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International symposium on high performance Distributed computing

作者： P. Sarkar M. Bailey University of Arizona Tucson AZ US Dept. of Comput. Sci. Arizona Univ. Tucson AZ USA

ISBN: (纸本)9780818675829

Networks of workstations provide an economic solution for scalable computing because they do not require specialized components. Even though recent advances have shown that it is possible to obtain high bandwidth between applications, interconnect latency remains a serious concern. We present CNI, a cluster network interface that not only provides both low latency and high bandwidth but also efficiently supports multiple programming paradigms. this is done by functionally coupling the network adaptor board more closely to the CPU without changing the standard workstation architecture. CNI results in performance gains for applications, substantially reducing communication overhead and delay.

关键词： Network interfaces Workstations Delay Bandwidth computer networks performance gain

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A heterogeneous hierarchical solution to cost-efficient high performance computing

A heterogeneous hierarchical solution to cost-efficient high...

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International symposium on Parallel and Distributed Processing (IPDPS)

作者： Z.B. Miled J.A.B. Fortes Sch. of Electr. & Comput. Eng. Purdue Univ. West Lafayette IN USA School of Electrical and Computer Engineering Purdue University West Lafayette IN USA

Two facts that suggest the desirability of a hierarchical approach to cost-effective high-performance computing are empirically established in this paper. the first fact is the temporal locality of programs with respect to the degree of parallelism. Two temporal (instruction and data) locality principles are identified and empirically established for a set of programs. the impact of this behavior is discussed with respect to the proposed heterogeneous multilevel architecture. the second fact that supports the hierarchical architecture is the cost-efficiency advantage of heterogeneous over homogeneous multiprocessor systems. An initial performance analysis is presented which quantifies this fact for the proposed heterogeneous hierarchical organization. the proposed multilevel processor configuration uses fast and costly resources sparingly to reduce sequential and low parallelism bottlenecks. the resulting organization tries to balance cost, speed and parallelism granularity.

关键词： high performance computing Parallel processing Concurrent computing Costs Bridges Multiprocessing systems Research and development Application software computer applications Environmental economics

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Simulating the DASH architecture in HASE

Simulating the DASH architecture in HASE

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Annual symposium on Simulation

作者： L.M. Williams R.N. Ibbett Computer Systems Group Department of Computer Science University of Edinburgh Edinburgh UK

HASE (Hierarchical computer architecture design and Simulation Environment) allows for the rapid development and exploration of computer architectures at multiple levels of abstraction, encompassing both hardware and software. the user interacts with HASE via an X-Windows/Motif graphical interface, and one of the main forms of output is an animation of the design window. the DASH architecture was designed to prove the feasibility of building a scaleable high-performance machine with multiple coherent caches and a single address space. the HASE simulation therefore concentrates on implementing the cache coherency protocols, and the animator has been used to check that the simulation conforms to the architecture. Future work will involve performance checks of the simulator, and thence possible architectural enhancements.

关键词： Object oriented modeling Computational modeling computer architecture computer simulation Hardware Concurrent computing Windows Animation Education System testing

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Employing logic-enhanced memory for high-performance ATM network interfaces 96

Employing logic-enhanced memory for high-performance ATM net...

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International symposium on high performance Distributed computing

作者： H. Agusleo N. Soparkar Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA

ISBN: (纸本)9780818675829

With the advent of asynchronous transfer mode (ATM), network speeds are increasing substantially, and the greater communication bandwidth provides considerable potential for distributed applications. However, communication throughput delivered to the user applications has not increased as rapidly: network interfacing has become the next bottleneck. Consequently, better designs for network interfaces are essential to take full advantage of the higher-speed communication links such as the ATM. We present a novel hardware architecture for an ATM network interface employing memory with select on-chip data processing logic; i.e., logic-enhanced memory (LEM). We exhibit how LEM-based interfaces are particularly suitable for servers, where the majority of the operations are memory-intensive processing for client requests.

关键词： Network interfaces Asynchronous transfer mode Bandwidth Application software throughput computer networks Protocols Hardware Network-on-a-chip Logic

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Supporting HPDC applications over ATM networks with cell-based transport mechanisms 96

Supporting HPDC applications over ATM networks with cell-bas...

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International symposium on high performance Distributed computing

作者： J. Vila-Sallent J. Sole-Pareta Department of Computer Architecture Universitat Politecnica de Catalunya Catalonia Spain

ISBN: (纸本)9780818675829

We address the problem of supporting high performance distributed computing (HPDC) applications running over ATM networks. For this purpose, we consider a logically separate subnetwork for these applications. After presenting an architectural reference model for the HPDC subnetwork and distinguishing which functions should be installed over the ATM network in order to satisfy the needs of HPDC applications, we propose two mechanisms that aim at optimizing communications by taking advantage of both the special properties of HPDC traffic and the cell based nature of ATM. the performance of these mechanisms is evaluated and compared with that achieved by the SSCOP protocol. the results show that when the ATM network experiences high load and the HPDC applications make an intensive use of arrays, cell based mechanisms become more robust than standard SSCOP and provide low latency and efficient cell loss recovery. Since both situations are very likely to occur in HPDC environments, we conclude that the introduction of cell based retransmission mechanisms does contribute to enhance performance of HPDC systems over ATM networks.

关键词： Asynchronous transfer mode Workstations Application software Protocols Delay Distributed computing Costs Concurrent computing computer networks high-speed networks

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