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检索条件"任意字段=17th International Conference on Field Programmable Logic and Applications"
1932 条 记 录,以下是41-50 订阅
排序:
FPGA-based Real-time High-resolution Image Processing for rocket on-board processing
FPGA-based Real-time High-resolution Image Processing for ro...
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international conference on Computer Research and Development (ICCRD)
作者: Hui Zhou Xiaofeng Wang YuJia Xie Yongxiang Cao Yu Tang Yongchun Huo Huan Wen Xiongbo Zhao Chaoran Li Beijing Aerospace Automatic Control Institute National key Laboratory of Science and Technology on Aerospace Intelligent Control Beijing China Computer Science and Engineering Beihang University Beijing China National Superior College for Engineers Beihang University Beijing China
the structure of the rocket-borne model is inherently complex, with processed images exhibiting high resolution and generating substantial amounts of data and calculations. Achieving robust real-time computing on an e... 详细信息
来源: 评论
Self-healing circuits for space-applications
Self-healing circuits for space-applications
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17th international conference on field programmable logic and applications
作者: Panhofer, thomas Delvai, Martin Vienna Univ Technol Inst Comp Engn Embedded Comp Syst Grp Vienna Austria
No abstract available
来源: 评论
A design flow to map parallel applications onto FPGAS
A design flow to map parallel applications onto FPGAS
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17th international conference on field programmable logic and applications
作者: Le Beux, Sebastien Marquet, Philippe Dekeyser, Jean-Luc Univ Lille LIFL Lille France
this paper introduces a new flow able to fit a parallel application onto an FPGA according to the FPGA characteristics such as computing power and IOs. the flow is based on iterative refactoring and transformations of... 详细信息
来源: 评论
Multiplexer-based routing fabric for reconfigurable logic
Multiplexer-based routing fabric for reconfigurable logic
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17th international conference on field programmable logic and applications
作者: Bennebroek, Marlyn Danilin, Alexander Philips Res Europe High Tech Campus 5 NL-5656 AE Eindhoven Netherlands NXP Res NL-5656 AE Eindhoven Netherlands
A novel routing fabric is introduced that offers high flexibility at significant lower silicon cost compared to routing fabrics currently incorporated in many field programmable Gate Array (FPGA) devices, IP cores, an... 详细信息
来源: 评论
Hardware/software process migration and RTL simulation
Hardware/software process migration and RTL simulation
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17th international conference on field programmable logic and applications
作者: Blumer, Aric D. Patterson, Cameron D. Virginia Polytech Inst & State Univ Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA
this paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of field programmable Gate Arrays (FPGAs). the feasibility of such a ... 详细信息
来源: 评论
Implementation on FPGA of a lut-based ATAN(Y/X) operator suitable for synchronization algorithms
Implementation on FPGA of a lut-based <i>ATAN</i>(<i>Y</i>/<...
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17th international conference on field programmable logic and applications
作者: Gutierrez, Roberto Valls, Javier Física y Arquitectura de Computadores Miguel Hernandez University Institute of Telecommunication and Multimedia Applications Polytechnic University of Valencia
this paper presents an architecture for the computation of the atan(Y/X) operation suitable for broadband communication applications where a throughput of 20 MHz is required. the architecture is based on LUT methods a... 详细信息
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Ric fast adder and its set-tolerant implementation in FPGAS
Ric fast adder and its set-tolerant implementation in FPGAS
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17th international conference on field programmable logic and applications
作者: Mesquita, Eduardo Franck, Helen Agostini, Luciano Guentzel, Jose Luis Univ Fed Pelotas Dept Informat GACI Pelotas RS Brazil
FPGA is currently a very important design technology to implement electronic systems due to its high logic density, its fast time-to-market and its low cost. But in order to provide high logic density FPGA devices are... 详细信息
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Applying out-of-core QR decomposition algorithms on FPGA-based systems
Applying out-of-core QR decomposition algorithms on FPGA-bas...
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17th international conference on field programmable logic and applications
作者: Tai, Yi-Gang Lo, Chia-Tien Dan Psarris, Kleanthis Univ Texas San Antonio Dept Comp Sci San Antonio TX 78249 USA
QR decomposition, especially through the means of Householder transformation, is often used to solve least squares problems. A matrix to be decomposed with this method is usually very large, often large enough that it... 详细信息
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A high speed license plate recognition system on an FPGA
A high speed license plate recognition system on an FPGA
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17th international conference on field programmable logic and applications
作者: Kanamori, Takamasa Amano, Hideharu Arai, Masatoshi Ajioka, Yoshiaki Keio Univ Yokohama Kanagawa 223 Japan CalsonicKansei Co Ltd Ban Kao Thailand Echandes Inc Aichi Japan
A high speed FPGA off-loading engine for detecting the license plate itself in order to avoid the traffic accident is proposed. A complicated algorithm is written in Handel-C, and parallel processing is explicitly uti... 详细信息
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An FPGA based memory efficient shared buffer implementation
An FPGA based memory efficient shared buffer implementation
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17th international conference on field programmable logic and applications
作者: Burns, Dwayne Toal, Ciaran McLaughlin, Kieran Sezer, Sakir Hutton, Mike Cackovic, Kevin Queens Univ Belfast Inst Elect Commun & Informat Technol Belfast BT7 1NN Antrim North Ireland Altera Corp San Jose CA 95134 USA
this paper discusses the need for new high-speed hardware architectures for future networks and in particular the need for high speed, high capacity shared buffer designs. An implementation of such a buffer using FPGA... 详细信息
来源: 评论