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检索条件"任意字段=17th International Conference on Field Programmable Logic and Applications"
1932 条 记 录,以下是71-80 订阅
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Statistical generic and chip-specific skew assignment for improving timing yield of FPGAS
Statistical generic and chip-specific skew assignment for im...
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17th international conference on field programmable logic and applications
作者: Sivasivamy, Satish Bazargan, Kia Univ Minnesota Dept Elect Engn Minneapolis MN 55455 USA
this paper presents a technique to fix timing violations caused by process variations in FPGAs by adjusting the clock skews of flip-flops. this involves making the clock distribution network tunable by adding programm... 详细信息
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Embedded programmable logic core enhancements for system bus interfaces
Embedded programmable logic core enhancements for system bus...
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17th international conference on field programmable logic and applications
作者: Quinton, Bradley R. Wilton, Steven J. E. Univ British Columbia Dept Elect & Comp Engn Vancouver BC V5Z 1M9 Canada
programmable logic cores (PLCs) offer a means of providing post-fabrication re-configurability to a SoC design. Circuits implemented in a PLC will inevitably have lower timing performance and logic density than fixed ... 详细信息
来源: 评论
High level power optimization by type inference on the generation of application specific circuits on FPGAS
High level power optimization by type inference on the gener...
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17th international conference on field programmable logic and applications
作者: Claver, J. M. Leon, G. Univ Valencia Dept Comp Sci E-46100 Burjassot Spain Univ Jaume 1 Dept Comp Sci & Eng Castellon de La Plana Spain
We describe the optimization of power consumption obtained by a high level environment developed for the automatic generation of application specific circuits on FPGA. the methodology used is based on the transformati... 详细信息
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A design methodology for communication infrastructures on partially reconfigurable FPGAS
A design methodology for communication infrastructures on pa...
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17th international conference on field programmable logic and applications
作者: Hagemeyer, Jens Kettelhoit, Boris Koester, Markus Porrmann, Mario Univ Gesamthsch Paderborn Heinz Nixdorf Inst D-4790 Paderborn Germany
the ability of partial reconfiguration of today's FPGAs allows the exchange of dynamic system components at run-time, which enables the realization of self-reconfigurable systems. To ease the design of a partially... 详细信息
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An effective automatic memory allocation algorithm based on schedule length in a novel C to FPGA compiler
An effective automatic memory allocation algorithm based on ...
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17th international conference on field programmable logic and applications
作者: Peterson, Kristopher D. Tripp, Justin L. Univ London Imperial Coll London England Los Alamos Natl Lab Los Alamos NM 87545 USA
A significant challenge in designing algorithms for FPGA-based reconfigurable computers is the exposed, non-cached memory subsystem. In the absence of dedicated hardware to manage a cached memory hierarchy, the algori... 详细信息
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Solving RC5 challenges with hardware - a *** perspective
Solving RC5 challenges with hardware - a *** perspective
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17th international conference on field programmable logic and applications
作者: De Dormale, Guerric Meurice Bass, John Quisquater, Jean-Jacques UCL DICE Crypto Grp Pl Levant 3 B-1348 Louvaine La Neuve Belgium DMS Design Masonville CO 80541 USA
Encryption is the basic means to enforce confidentiality in digital communications. this work explores a hardware design alternative and a cost assessment of an FPGA-based brute force attack against RSA Secret-Key Cha... 详细信息
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Novel multi-layer floorplanning for heterogeneous FPGAs
Novel multi-layer floorplanning for heterogeneous FPGAs
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17th international conference on field programmable logic and applications
作者: Singhal, Love Bozorgzadeh, Elaheh Univ Calif Irvine Ctr Embedded Comp Syst Irvine CA 92697 USA
the current generations of FPGA comprise of many specialized hardware cores, like embedded processors, multipliers, RAMs and FIFOs, along with the regular arrays of reconfigurable logic. On any FPGA device, these embe... 详细信息
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A pipeline implementation of a watershed algorithm on FPGA
A pipeline implementation of a watershed algorithm on FPGA
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17th international conference on field programmable logic and applications
作者: Trieu, Dang Ba Khac Maruyama, Tsutomu Univ Tsukuba Tsukuba Ibaraki 3058573 Japan
the watershed transformation is a popular image segmentation technique for grey scale images. this paper describes a pipeline implementation of a watershed algorithm designed for hardware implementation. In the algori... 详细信息
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Fast and accurate interval-based timing estimator for variability-aware FPGA physical synthesis tools
Fast and accurate interval-based timing estimator for variab...
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17th international conference on field programmable logic and applications
作者: Lee, Chee Sing Loke, Wei Ting Zhang, Wenjuan Ha, Yajun Natl Univ Singapore ECE Dept Singapore 117576 Singapore
Process variations of deep sub-micron technologies have created significant timing uncertainty. this generates the need for a new variability-aware physical synthesis tool for field-programmable Gate-Arrays (FPGAs). I... 详细信息
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An FPGA solver for very large sat problems
An FPGA solver for very large sat problems
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17th international conference on field programmable logic and applications
作者: Kanazawa, Kenji Maruyama, Tsutomu Univ Tsukuba Tsukuba Ibaraki 3058573 Japan
WSAT and its variants are one of the best performing stochastic local search algorithms for the satisfiability (SAT) problem. In this paper, we propose an FPGA solver for very large SAT problems based on a WSAT algori... 详细信息
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