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检索条件"任意字段=18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 375 条记录，以下是101-110 订阅

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parallel Suffix Array and Least Common Prefix for the GPU 13

Parallel Suffix Array and Least Common Prefix for the GPU

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Deo, Mrinal Keely, Sean Adv Micro Devices Inc Sunnyvale CA 94088 USA Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781450319225

Suffix Array (SA) is a data structure formed by sorting the suffixes of a string into lexicographic order. SAs have been used in a variety of applications, most notably in pattern matching and Burrows-Wheeler Transform (BWT) based lossless data compression. SAs have also become the data structure of choice for many, if not all, string processing problems to which suffix tree methodology is applicable. Over the last two decades researchers have proposed many suffix array construction algorithm (SACAs). We do a systematic study of the main classes of SACAs with the intent of mapping them onto a data parallel architecture like the GPU. We conclude that skew algorithm [12], a linear time recursive algorithm, is the best candidate for GPUs as all its phases can be efficiently mapped to a data parallel hardware. Our OpenCL implementation of skew algorithm achieves a throughput of up to 25 MStrings/sec and a speedup of up to 34x and 5.8x over a single threaded CPU implementation using a discrete GPU and APU respectively. We also compare our OpenCL implementation against the fastest known CPU implementation based on induced copy in g and achieve a speedup of up to 3.7x. Using SA we construct BWT on GPU and achieve a speedup of 11x over the fastest known BWT on GPU. Suffix arrays are often augmented with the longest common prefix (LCP) information. We design a novel high-performance parallel algorithm for computing LCP on the GPU. Our GPU implementation of LCP achieves a speedup of up to 25x and 4.3x on discrete GPU and APU respectively.

关键词： Algorithms Performance Suffix Array Suffix Tree BWT Longest Common Prefix OpenCL GPU Prefix Sum Accelerated Processing Unit (APU)

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Pure: Evolving Message Passing To Better Leverage Shared Memory Within Nodes 24

Pure: Evolving Message Passing To Better Leverage Shared Mem...

引用

29th acm sigplan Annual symposium on principles and practice of parallel programming (PPoPP)

作者： Psota, James Solar-Lezama, Armando MIT CSAIL Cambridge MA 02139 USA

ISBN: (纸本)9798400704352

Pure is a new programming model and runtime system explicitly designed to take advantage of shared memory within nodes in the context of a mostly message passing interface enhanced with the ability to use tasks to make use of idle cores. Pure leverages shared memory in two ways: (a) by allowing cores to steal work from each other while waiting on messages to arrive, and, (b) by leveraging *** lock-free data structures in shared memory to achieve highperformance messaging and collective operations between the ranks within nodes. We use microbenchmarks to evaluate Pure's key messaging and collective features and also show application speedups up to 2.1 Chi on the CoMD molecular dynamics and the miniAMR adaptive mesh *** applications scaling up to 4,096 cores.

关键词： parallel programming models distributed runtime systems task-based parallelism concurrent data structures lock-free data structures

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parallelizing dynamic programming through rank convergence 14

Parallelizing dynamic programming through rank convergence

引用

2014 19th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2014

作者： Maleki, Saeed Musuvathi, Madanlal Mytkowicz, Todd Univerity of Illinois at Urbana-Champaign United States Microsoft Research United States

ISBN: (纸本)9781450326568

this paper proposes an efficient parallel algorithm for an important class of dynamic programming problems that includes Viterbi, Needleman-Wunsch, Smith-Waterman, and Longest Common Subsequence. In dynamic programming, the subproblems that do not depend on each other, and thus can be computed in parallel, form stages or wavefronts. the algorithm presented in this paper provides additional parallelism allowing multiple stages to be computed in parallel despite dependences among them. the correctness and the performance of the algorithm relies on rank convergence properties of matrix multiplication in the tropical semiring, formed with plus as the multiplicative operation and max as the additive operation. this paper demonstrates the efficiency of the parallel algorithm by showing significant speed ups on a variety of important dynamic programming problems. In particular, the parallel Viterbi decoder is up-to 24× faster (with 64 processors) than a highly optimized commercial baseline. Copyright © 2014 acm.

关键词： Dynamic programming

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Serialization Sets: A Dynamic Dependence-Based parallel Execution Model

Serialization Sets: A Dynamic Dependence-Based Parallel Exec...

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14th acm sigplan symposium on principles and practice of parallel programming

作者： Allen, Matthew D. Sridharan, Srinath Sohi, Gurindar S. Univ Wisconsin Dept Comp Sci Madison WI 53706 USA

ISBN: (纸本)9781605583976

this paper proposes a new parallel execution model where programmers augment a sequential program with pieces of code called serializers that dynamically map computational operations into serialization sets of dependent operations. A runtime system executes operations in the same serialization set in program order, and may concurrently execute operations in different sets. Because serialization sets establish a logical ordering on all operations, the resulting parallel execution is predictable and deterministic. We describe the API and design of Prometheus, a C++ library that implements the serialization set abstraction through compile-time template instantiation and a runtime support library. We evaluate a set of parallel programs running on the x86_64 and SPARC-V9 instruction sets and study their performance on multi-core, symmetric multiprocessor, and ccNUMA parallel machines. By contrast with conventional parallel execution models, we find that Prometheus programs are significantly easier to write, test, and debug, and their parallel execution achieves comparable performance.

关键词： Languages Performance parallel computing runtime system serialization sets serializer

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Proceedings of the 18th International symposium on principles and practice of Declarative programming, PPDP 2016

Proceedings of the 18th International Symposium on Principle...

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18th International symposium on principles and practice of Declarative programming, PPDP 2016

ISBN: (纸本)9781450341486

the proceedings contain 16 papers. the topics discussed include: description and evaluation of a generic design to integrate CLP and tabled execution;higher-order logic programming: an expressive language for representing qualitative preferences;a framework for easing the development of applications embedding answer set programming;proving inductive validity of constrained inequalities;analysis of access control policy updates through narrowing;strand spaces with choice via a process algebra semantics;reducing the overhead of assertion run-time checks via static analysis;and iterated process analysis over lattice-valued regular expressions.

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StreamScan: Fast Scan Algorithms for GPUs without Global Barrier Synchronization 13

StreamScan: Fast Scan Algorithms for GPUs without Global Bar...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Yan, Shengen Long, Guoping Zhang, Yunquan Chinese Acad Sci Inst Software Lab Parallel Software & Computat Sci Beijing 100864 Peoples R China Chinese Acad Sci State Key Lab Comp Sci Beijing 100864 Peoples R China Chinese Acad Sci Grad Univ Beijing 100864 Peoples R China

ISBN: (纸本)9781450319225

Scan (also known as prefix sum) is a very useful primitive for various important parallel algorithms, such as sort, BFS, SpMV, compaction and so on. Current state of the art of GPU based scan implementation consists of three consecutive Reduce-Scan-Scan phases. this approach requires at least two global barriers and 3N (N is the problem size) global memory accesses. In this paper we propose StreamScan, a novel approach to implement scan on GPUs with only one computation phase. the main idea is to restrict synchronization to only adjacent workgroups, and thereby eliminating global barrier synchronization completely. the new approach requires only 2N global memory accesses and just one kernel invocation. On top of this we propose two important optimizations to further boost performance speedups, namely thread grouping to eliminate unnecessary local barriers, and register optimization to expand the on chip problem size. We designed an auto-tuning framework to search the parameter space automatically to generate highly optimized codes for both AMD and Nvidia GPUs. We implemented our technique with OpenCL. Compared with previous fast scan implementations, experimental results not only show promising performance speedups, but also reveal dramatic different optimization tradeoffs between Nvidia and AMD GPU platforms.

关键词： Scan prefix-sum OpenCL CUDA GPU parallel algorithms

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Evaluating Graph Coloring on GPUs 11

Evaluating Graph Coloring on GPUs

引用

16th acm symposium on principles and practice of parallel programming

作者： Grosset, A. V. Pascal Zhu, Peihong Liu, Shusen Venkatasubramanian, Suresh Hall, Mary Univ Utah Sch Comp Salt Lake City UT 84112 USA

ISBN: (纸本)9781450301190

this paper evaluates features of graph coloring algorithms implemented on graphics processing units (GPUs), comparing coloring heuristics and thread decompositions. As compared to prior work on graph coloring for other parallel architectures, we find that the large number of cores and relatively high global memory bandwidth of a GPU lead to different strategies for the parallel implementation. Specifically, we find that a simple uniform block partitioning is very effective on GPUs and our parallel coloring heuristics lead to the same or fewer colors than prior approaches for distributed-memory cluster architecture. Our algorithm resolves many coloring conflicts across partitioned blocks on the GPU by iterating through the coloring process, before returning to the CPU to resolve remaining conflicts. With this approach we get as few color (if not fewer) than the best sequential graph coloring algorithm and performance is close to the fastest sequential graph coloring algorithms which have poor color quality.

关键词： Algorithms Performance Graph coloring parallel algorithm GPU CUDA

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POSTER: LB-HM: Load Balance-Aware Data Placement on Heterogeneous Memory for Task-parallel HPC Applications 27

POSTER: LB-HM: Load Balance-Aware Data Placement on Heteroge...

引用

27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Xie, Zhen Liu, Jie Ma, Sam Li, Jiajia Li, Dong Univ Calif Merced CA USA Coll William Mary Williamsburg WA USA

ISBN: (纸本)9781450392044

the emergence of heterogeneous memory (HM) provides a cost-effective and high-performance solution to memory-consuming HPC applications. However, using HM, wisely migrating data objects on it is critical for high performance. In this work, we introduce a load balance-aware page management system, named LB-HM. LB-HM introduces task semantics during memory profiling, rather than being application-agnostic. Evaluating with a set of memory-consuming HPC applications, we show that we show that LB-HM reduces existing load imbalance and leads to an average of 17.1% and 15.4% (up to 26.0% and 23.2%) performance improvement, compared with a hardware-based solution and an industry-quality software-based solution on Optane-based HM.

关键词： Semantics

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Typechecking Protocols with Mungo and StMungo 16

Typechecking Protocols with Mungo and StMungo

引用

18th International symposium on principles and practice of Declarative programming (PPDP)

作者： Kouzapas, Dimitrios Dardha, Ornela Perera, Roly Gay, Simon J. Univ Glasgow Sch Comp Sci Glasgow Lanark Scotland

ISBN: (纸本)9781450341486

We report on two tools that extend Java with support for static type-checking of communication protocols. Our Mungo tool extends Java with typestate definitions, which allow classes to be associated with state machines defining permitted sequences of method calls. A complementary tool, StMungo, takes a communication protocol specified in the Scribble protocol description language, and generates a typestate specification for each endpoint, capturing the permitted sequences of messages along that channel. Endpoint implementations can be validated by Mungo against their typestate definitions and then compiled as usual with j avac. We formalise Mungo's typestate inference system and demonstrate the Scribble, Mungo and StMungo toolchain via a typechecked SMTP client that can communicate with a real-world SMTP server.

关键词： Session types object-oriented programming typestate protocols typestate inference

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Load Balancing on Speed

Load Balancing on Speed

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Hofmeyr, Steven Iancu, Costin Blagojevic, Filip Lawrence Berkeley Natl Lab Berkeley CA USA

ISBN: (纸本)9781605587080

To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical workloads, the current load balancing support in operating systems may not be able to achieve efficient hardware utilization for parallel workloads. Balancing run queue length globally ignores the needs of parallel applications where threads are required to make equal progress. In this paper we present a load balancing technique designed specifically for parallel applications running on multicore systems. Instead of balancing run queue length, our algorithm balances the time a thread has executed on "faster" and "slower" cores. We provide a user level implementation of speed balancing on UMA and NUMA multi-socket architectures running Linux and discuss behavior across a variety of workloads, usage scenarios and programming models. Our results indicate that speed balancing when compared to the native Linux load balancing improves performance and provides good performance isolation in all cases considered. Speed balancing is also able to provide comparable or better performance than DWRR, a fair multi-processor scheduling implementation inside the Linux kernel. Furthermore, parallel application performance is often determined by the implementation of synchronization operations and speed balancing alleviates the need for tuning the implementations of such primitives.

关键词： Experimentation theory Performance Measurement Languages Design parallel programming Operating System Load Balancing Speed Balancing Multicore Multisocket

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