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17th acm sigplan symposium on principles and practice of parallel programming

作者： Chen, Yifeng Cui, Xiang Mei, Hong Peking Univ Sch EECS HCST Key Lab Beijing 100871 Peoples R China

ISBN: (纸本)9781450311601

this paper introduces a programming interface called PARRAY (or parallelizing ARRAYs) that supports system-level succinct programming for heterogeneous parallel systems like GPU clusters. the current practice of software development requires combining several low-level libraries like Pthread, OpenMP, CUDA and MPI. Achieving productivity and portability is hard with different numbers and models of GPUs. PARRAY extends mainstream C programming with novel array types of the following features:1)the dimensions of an array type are nested in a tree structure, conceptually reflecting the memory hierarchy;2) the definition of an array type may contain references to other array types, allowing sophisticated array types to be created for parallelization;3) threads also form arrays that allow programming in a Single-Program Multiple-Code block (SPMC) style to unify various sophisticated communication patterns. this leads to shorter, more portable and maintainable parallel codes, while the programmer still has control over performance-related features necessary for deep manual optimization. Although the source-to-source code generator only faithfully generates low-level library calls according to the type information,higher-level programming and automatic performance optimization are still possible through building libraries of subprograms on top of PARRAY. the case study on cluster FFT illustrates a simple 30-line code that 2x-outperforms Intel Cluster MKL on the Tianhe-1A system with 7168 Fermi GPUs and 14336 CPUs.

关键词： Languages Performance theory parallel programming Array Representation Heterogeneous parallelism GPU Clusters

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Backtracking-based Load Balancing

Backtracking-based Load Balancing

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14th acm sigplan symposium on principles and practice of parallel programming

作者： Hiraishi, Tasuku Yasugi, Masahiro Umatani, Seiji Yuasa, Taiichi Kyoto Univ Acad Ctr Comp & Media Studies Kyoto 6068501 Japan Kyoto Univ Grad Sch Informat Kyoto 6068501 Japan

ISBN: (纸本)9781605583976

High-productivity languages for parallel computing become more important as parallel environments including multicores become more common. Cilk is such a language. It provides good load balancing for many applications including irregular ones;that is, it keeps all workers busy by creating plenty of "logical" threads and adopting the oldest-first work stealing strategy. this paper proposes a "logical thread"-free framework called Tascell, which achieves a higher performance and supports a wider range of parallel environments including clusters without loss of productivity. A Tascell worker spawns a "real" task only when requested by another idle worker. the worker performs the spawning by temporarily "backtracking" and restoring its oldest task-spawnable state. Our approach eliminates the cost of spawning/managing logical threads. It also promotes the reuse of workspaces and improves the locality of reference since it does not need to prepare a workspace for each concurrently runnable logical thread. Furthermore, Tascell enables elegant and highly-efficient backtrack search algorithms with delayed workspace copying. For instance, our 16-queens problem solver is 1.86 times faster than Cilk on a system with two dual-core processors. Our approach also enables a single program to run in both shared and distributed memory environments with reasonable efficiency and scalability.

关键词： Design Languages Performance load balancing parallel computing backtracking backtrack search

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Effective Performance Measurement and Analysis of Multithreaded Applications

Effective Performance Measurement and Analysis of Multithrea...

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14th acm sigplan symposium on principles and practice of parallel programming

作者： Tallent, Nathan R. Mellor-Crummey, John M. Rice Univ Houston TX 77251 USA

ISBN: (纸本)9781605583976

Understanding why the performance of a multithreaded program does not improve linearly with the number of cores in a shared-memory node populated with one or more multicore processors is a problem of growing practical importance. this paper makes three contributions to performance analysis of multithreaded programs. First, we describe how to measure and attribute parallel idleness, namely, where threads are stalled and unable to work. this technique applies broadly to programming models ranging from explicit threading (e. g., Pthreads) to higher-level models such as Cilk and OpenMP. Second, we describe how to measure and attribute parallel overhead-when a thread is performing miscellaneous work other than executing the user's computation. By employing a combination of compiler support and post-mortem analysis, we incur no measurement cost beyond normal profiling to glean this information. Using idleness and overhead metrics enables one to pinpoint areas of an application where concurrency should be increased (to reduce idleness), decreased (to reduce overhead), or where the present parallelization is hopeless (where idleness and overhead are both high). third, we describe how to measure and attribute arbitrary performance metrics for high-level multithreaded programming models, such as Cilk. this requires bridging the gap between the expression of logical concurrency in programs and its realization at run-time as it is adaptively partitioned and scheduled onto a pool of threads. We have prototyped these ideas in the context of Rice University's HPCTOOLKIT performance tools. We describe our approach, implementation, and experiences applying this approach to measure and attribute work, idleness, and overhead in executions of Cilk programs.

关键词： Performance Measurement Algorithms Performance Analysis Call Path Profiling Multithreaded programming Models HPCTOOLKIT

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New model for integrated nested task and data parallel programming

New model for integrated nested task and data parallel progr...

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Proceedings of the 1997 6th acm sigplan symposium on principles and practice of parallel programming

作者： Subhlok, Jaspal Yang, Bwolen Carnegie Mellon Univ Pittsburgh United States

High Performance Fortran (HPF) has emerged as a standard language for data parallel computing. However, a wide variety of scientific applications are best programmed by a combination of task and data parallelism. therefore, a good model of task parallelism is important for continued success of HPF for parallel programming. this paper presents a task parallelism model that is simple, elegant, and relatively easy to implement in an HPF environment. Task parallelism is exploited by mechanisms for dividing processors into sub-groups and mapping computations and data onto processor subgroups. this model of task parallelism has been implemented in the Fx compiler at Carnegie Mellon University. the paper addresses the main issues in compiling integrated task and data parallel programs and reports on the use of this model for programming various flat and nested task structures. Performance results are presented for a set of programs spanning signal processing, image processing, computer vision and environment modeling. A variant of this task model is a new approved extension of HPF and this paper offers insight into the power of expression and ease of implementation of this extension.

关键词： parallel processing systems

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Using Data Structure Knowledge for Efficient Lock Generation and Strong Atomicity

Using Data Structure Knowledge for Efficient Lock Generation...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Upadhyaya, Gautam Midkiff, Samuel P. Pai, Vijay S. Purdue Univ W Lafayette IN 47907 USA

ISBN: (纸本)9781605587080

To achieve high-performance on multicore systems, shared-memory parallel languages must efficiently implement atomic operations. the commonly used and studied paradigms for atomicity are fine-grained locking, which is both difficult to program and error-prone;optimistic software transactions, which require substantial overhead to detect and recover from atomicity violations;and compiler-generation of locks from programmer-specified atomic sections, which leads to serialization whenever imprecise pointer analysis suggests the mere possibility of a conflicting operation. this paper presents a new strategy for compiler-generated locking that uses data structure knowledge to facilitate more precise alias and lock generation analyses and reduce unnecessary serialization. Implementing and evaluating these ideas in the Java language shows that the new strategy achieves eight-thread speedups of 0.83 to 5.9 for the five STAMP benchmarks studied, outperforming software transactions on all but one benchmark, and nearly matching programmer-specified fine-grained locks on all but one benchmark. the results also indicate that compiler knowledge of data structures improves the effectiveness of compiler analysis, boosting eight-thread performance by up to 300%. Further, the new analysis allows for software support of strong atomicity with less than 1% overhead for two benchmarks and less than 20% for three others. the strategy also nearly matches the performance of programmer-specified fine-grained locks for the SPECjbb2000 benchmark, which has traditionally not been amenable to static analyses.

关键词： Algorithms Performance Design Automatic lock generation transactional memory parallel programming

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CPMA: An Efficient Batch-parallel Compressed Set Without Pointers 24

CPMA: An Efficient Batch-Parallel Compressed Set Without Poi...

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29th acm sigplan Annual symposium on principles and practice of parallel programming (PPoPP)

作者： Wheatman, Brian Burns, Randal Buluc, Aydin Xu, Helen Johns Hopkins Univ Baltimore MD 21218 USA Lawrence Berkeley Natl Lab Lawrence KS USA Georgia Inst Technol Atlanta GA USA

ISBN: (纸本)9798400704352

this paper introduces the batch-parallel Compressed Packed Memory Array (CPMA), a compressed, dynamic, ordered set data structure based on the Packed Memory Array (PMA). Traditionally, batch-parallel sets are built on pointerbased data structures such as trees because pointer-based structures enable fast parallel unions via pointer manipulation. Whencompared with cache-optimized trees, PMAswere slower to update but faster to scan. the batch-parallel CPMA overcomes this tradeoff between updates and scans by optimizing for cache-friendliness. On average, the CPMA achieves 3x faster batch-insert throughput and 4x faster range-query throughput compared with compressed PaC-trees, a state-of-the-art batch-parallel set library based on cache-optimized trees. We further evaluate the CPMA compared with compressed PaC-trees and Aspen, a state-of-the-art system, on a realworld application of dynamic-graph processing. the CPMA is on average 1.2x faster on a suite of graph algorithms and 2x faster on batch inserts when compared with compressed PaC-trees. Furthermore, the CPMA is on average 1.3x faster on graph algorithms and 2x faster on batch inserts compared with Aspen.

关键词： packed memory array batch-parallel compression data structures dynamic graphs

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Identifying Scalability Bottlenecks for Large-Scale parallel Programs with Graph Analysis 20

Identifying Scalability Bottlenecks for Large-Scale Parallel...

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Jin, Yuyang Wang, Haojie Tang, Xiongchao Hoefler, Torsten Liu, Xu Zhai, Jidong Tsinghua Univ Beijing Peoples R China Swiss Fed Inst Technol Zurich Switzerland Coll William & Mary Williamsburg VA 23187 USA

ISBN: (纸本)9781450368186

Scaling a parallel program to modern supercomputers is challenging due to inter-process communication, code serialization, and resource contention. Performance analysis tools for finding such scaling bottlenecks either base on profiling or tracing. Profiling incurs lower overheads but does not capture detailed dependencies needed for root-cause analyses. Tracing collects all information at prohibitive overheads. In this work, we develop ScalAna that uses static analysis techniques to achieve the best of both worlds-it enables the analyzability of traces at a cost similar to profiling. We leverage compiler and runtime lightweight techniques to generate performance graph and perform graph analysis algorithm to detect the root cause of scaling issues. We evaluate ScalAna with real applications on the Tianhe-2 supercomputer. Results show that our approach can effectively locate the root cause of scalability bottlenecks for real applications and incur less than 6.38% overhead (1.89% on average) for up to 2,048 processes.

关键词： Profiling Tools Scaling Loss Analysis Performance Optimization

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Deadlock-free buffer configuration for stream computing

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INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2017年第5期31卷 441-450页

作者： Li, Peng Beard, Jonathan C. Buhler, Jeremy D. Washington Univ Dept Comp Sci & Engn St Louis MO 63130 USA

Stream computing is a popular paradigm for parallel and distributed computing, where compute nodes are connected by first-in first-out data channels. Each channel can be considered as a concatenation of several data buffers, including an output buffer for the sender and an input buffer for the receiver. the configuration of buffer sizes impacts the performance as well as the correctness of the application. In this article, we focus on application deadlocks that are caused by incorrect configuration of buffer sizes. We describe three types of deadlock in streaming applications, categorized by how they can be created. To avoid them, we first prove necessary and sufficient conditions for deadlock-free computations;then based on the theorems, we propose both compile-time and runtime solutions for deadlock avoidance.

关键词： Buffer configuration deadlock avoidance feedback channels parallel and distributed computing streaming computing

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POSTER: Stream-K:Work-centric parallel Decomposition for Dense Matrix-Matrix Multiplication on the GPU 28

POSTER: Stream-K:Work-centric Parallel Decomposition for Den...

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28th acm sigplan Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Osama, Muhammad Merrill, Duane Cecka, Cris Garland, Michael Owens, John D. University of California Davis United States NVIDIA Corporation

ISBN: (纸本)9798400700156

We introduce Stream-K, a work-centric parallelization of matrix multiplication (GEMM) and related computations in dense linear algebra. Whereas contemporary decompositions are primarily tile-based, our method operates by partitioning an even share of the aggregate inner loop iterations among physical processing elements. this provides a near-perfect utilization of computing resources, regardless of how efficiently the output tiling for any given problem quantizes across the underlying processing elements. © 2023 Owner/Author.

关键词： Graphics processing unit

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Scalable Top-K Retrieval with Sparta 20

Scalable Top-K Retrieval with Sparta

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Sheffi, Gali Basin, Dmitry Bortnikov, Edward Carmel, David Keidar, Idit Technion Haifa Israel Yahoo Res Haifa Israel Amazon Haifa Israel

ISBN: (纸本)9781450368186

Many big data processing applications rely on a top-k retrieval building block, which selects (or approximates) the k highest-scoring data items based on an aggregation of features. In web search, for instance, a document's score is the sum of its scores for all query terms. Top-k retrieval is often used to sift through massive data and identify a smaller subset of it for further analysis. Because it filters out the bulk of the data, it often constitutes the main performance bottleneck. Beyond the rise in data sizes, today's data processing scenarios also increase the number of features contributing to the overall score. In web search, for example, verbose queries are becoming mainstream, while state-of-the-art algorithms fail to process long queries in real-time. We present Sparta, a practical parallel algorithm that exploits multi-core hardware for fast (approximate) top-k retrieval. thanks to lightweight coordination and judicious context sharing among threads, Sparta scales both in the number of features and in the searched index size. In our web search case study on 50M documents, Sparta processes 12-term queries more than twice as fast as the state-of-the-art. On a tenfold bigger index, Sparta processes queries at the same speed, whereas the average latency of existing algorithms soars to be an order-of-magnitude larger than Sparta's.

关键词： parallel computing multi-threading performance information retrieval web search top-k search

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