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New grid scheduling and rescheduling methods in the GrADS project

New grid scheduling and rescheduling methods in the GrADS pr...

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international Symposium on parallel and distributed Processing (IPDPS)

作者： K. Cooper A. Dasgupta K. Kennedy C. Koelbel A. Mandal G. Marin M. Mazina J. Mellor-Crummey F. Berman H. Casanova A. Chien H. Dail X. Liu A. Olugbile O. Sievert H. Xia L. Johnsson B. Liu M. Patel D. Reed W. Deng C. Mendes Z. Shi A. YarKhan J. Dongarra Computer Science Department Rice University USA Department of Computer Science University of California San Diego USA Department of Computer Science University of Houston USA Department of Computer Science University of Illinois USA ICL University of Tennessee Knoxville USA

Summary form only given. the goal of the Grid Application Development Software (GrADS) project is to provide programming tools and an execution environment to ease program development for the grid. We present recent extensions to the GrADS software framework: 1. A new approach to scheduling workflow computations, applied to a 3D image reconstruction application; 2. A simple stop/migrate/restart approach to rescheduling grid applications, applied to a QR 3. A process-swapping approach to rescheduling, applied to an N-body simulation. Experiments validating these methods were carried out on both the GrADS MacroGrid (a small but functional grid) and the MicroGrid (a controlled emulation of the grid) and the results were demonstrated at the SC2003 conference.

关键词： Grid computing Application software Computer science distributed computing Contracts Processor scheduling Software tools Instruments Usability Runtime

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distributed Text Feature Selection Based On Bat Algorithm Optimization

Distributed Text Feature Selection Based On Bat Algorithm Op...

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IEEE international conference on Intelligent Data Acquisition and Advanced computing systems

作者： Hongwei Chen Qiao Hou Lin Han Zhou Hu Zhiwei Ye Jun Zeng Jiansen Yuan School of Computer Science Hubei University of Technology Wuhan China Wuhan Fiberhome Technical Services Co. Ltd. Wuhan

the feature selection effect directly affects the classification accuracy of the text. this paper introduces a new text feature selection method based on bat optimization. this method uses the traditional feature selection method to pre-select the original features, and then uses the bat group algorithm to optimize the preselected features in binary code form, and uses the classification accuracy as the individual fitness. However, when the amount of text information is large, the execution time of the single machine is long. According to this shortcoming, combining the Bat Algorithm and the Spark parallel computing framework, the text feature selection algorithm SBATFS is proposed. the algorithm combines the good search performance of the bat algorithm with the distributed and efficient calculation speed to realize the efficient solution of the text feature selection optimization model. the results show that compared with the traditional feature selection method, after SBATFS is used for feature optimization, the classification accuracy is effectively improved.

关键词： Feature extraction Optimization Classification algorithms Text categorization Sociology Statistics Sparks

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A Class of Fast and Accurate Multi-layer Block Summation and Dot Product Algorithms 18th

A Class of Fast and Accurate Multi-layer Block Summation a...

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18th IFIP WG 10.3 international conference on Network and parallel computing, NPC 2021

作者： He, Kang Barrio, Roberto Chen, Lin Jiang, Hao Liu, Jie Gu, Tongxiang Qi, Jin Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha410073 China Department of Applied Mathematics University of Zaragoza ZaragozaE50009 Spain College of Computer National University of Defense Technology Changsha410073 China Institute of Applied Physics and Computational Mathematics Beijing100000 China

ISBN: (纸本)9783030935702

Basic recursive summation and common dot product algorithm have a backward error bound that grows linearly with the vector dimension. Blanchard [1] proposed a class of fast and accurate summation and dot product algorithms respectively called FABsum and FABdot, which trades off the calculation accuracy and speed by the block size. Castaldo [2] proposed a multi-layer block summation and dot product algorithm called SuperBlocksum and SuperBlockdot that can increase the accuracy while adding almost no additional calculations. We combine the idea of [1] with the multi-layer block structure to propose SuperFABsum (for "super fast and accurate block summation") and SuperFABdot (for "super fast and accurate block dot product"). Our algorithms have two variants, one is SuperFAB(within), the other is SuperFAB(outside). Our algorithms further improve accuracy and speed compared with FAB and SuperBlock. We conducted accuracy and speed tests on the high-performance FT2000+ processor. Experimental results show that SuperFABdot(within) algorithm is more accurate than FABdot and SuperBlockdot. Compared with FABdot, SuperFABdot(outside) algorithm can achieve up to 1.2 × performance speedup while ensuring similar accuracy. © 2022, IFIP international Federation for Information Processing.

关键词： Artificial intelligence

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the Efficient In-band Management for Interconnect Network in Tianhe-2 System

The Efficient In-band Management for Interconnect Network in...

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Euromicro conference on parallel, distributed and Network-Based Processing

作者： Jijun Cao Liquan Xiao Zhengbin Pang Kefei Wang Jiaqing Xu College of Computer National University of Defense Technology China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology China

Interconnect network plays an important role in high performance computing systems. And its manageability directly affects the RAS (i.e., Reliability, Availability, and Serviceability) of the whole system. the Tianhe-2 system located in NSCC-gz (i.e., National Supercomputing Center of China in Guangzhou) uses proprietary interconnect network, which includes 5,856 high-radix network router chips (i.e., NRC) and 18,304 network interface chips (i.e., NIC). For such a very large-scale interconnect network, it is a great challenge to manage (such as configure, monitor, and debug) the numerous network chips and its network ports in an efficient way. By implementing the in-band management with very few hardware resources, the interconnect network in Tianhe-2 system achieves a highly efficient network management. In this paper, we introduce the design and implementation of the in-band management for interconnect network in Tianhe-2 system, especially emphasizing on several key features, including the set of achieved management functionalities, the architecture of network management, the format of management packets, the data flow and processing of management packets, etc. In this paper, we also evaluate the performance of in-band management by mainly comparing with out-band management scheme. the preliminary results demonstrate the efficiency of the in-band management for interconnect network in Tianhe-2 system.

关键词： Routing Ports (Computers) Network topology Optical switches Hardware Topology Registers

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AggrBoost: A Load-Balanced computing Engine for Boosting Aggregation in GCN Accelerators

AggrBoost: A Load-Balanced Computing Engine for Boosting Agg...

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IEEE international Workshop on Anti-counterfeiting, Security, Identification, ASID

作者： Fan Wang Wei Ni Shengji Yang Song Yu-kun Zhang Duo-li School of Microelectronics. Hefei University of Technology Hefei China

ISBN: (数字)9798331505639

ISBN: (纸本)9798331505646

the emergence of Graph Convolutional Network marks a significant breakthrough in machine learning techniques for non-Euclidean spaces. During the graph aggregation process, several challenges arise, including load imbalance, low data reuse rate, and high off-chip data traffic. this paper proposes a computing engine for aggregation phase in GCNs based on a multi-edge parallel aggregation strategy with source node partitioning. this work featuring local sharing of source node feature vectors through source node partitioning and an encoding method named CSB (Compressed Sparse Block), achieves efficient load balancing under high parallelism through the equitable distribution of edge streams. It addresses memory access conflicts during the feature update process of destination nodes by utilizing distributed storage of partial sums, and effectively eliminates the pipeline stalls within partitions by Index-Driven MAC (Multiply-Accumulate). the PE utilization can exceed 97% on several popular datasets, making it suitable for application in GCN hardware accelerators.

关键词： Graph convolutional networks Pipelines parallel processing Load management Vectors Security Object recognition Engines Streams Hardware acceleration

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Distributing Sparse Matrix/Graph Applications in Heterogeneous Clusters - an Experimental Study

Distributing Sparse Matrix/Graph Applications in Heterogeneo...

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international conference on High Performance computing

作者： Charilaos Tzovas Maria Predari Henning Meyerhenke Humboldt-Universität zu Berlin Berlin Germany

Many problems in scientific and engineering applications contain sparse matrices or graphs as main input objects, e.g., numerical simulations on meshes. Large inputs are abundant these days and require parallel processing for memory size and speed. To optimize the execution of such simulations on cluster systems, the input problem needs to be distributed suitably onto the processing units (PUs). More and more frequently, such clusters contain different CPUs or a combination of CPUs and GPUs. this heterogeneity makes the load distribution problem quite challenging. Our study is motivated by the observation that established partitioning tools do not handle such heterogeneous distribution problems as well as homogeneous ones. In this paper, we first formulate the problem of balanced load distribution for heterogeneous architectures as a multiobjective, single-constraint optimization problem. We then split the problem into two phases and propose a greedy approach to determine optimal block sizes for each PU. these block sizes are then fed into numerous existing graph partitioners, for us to examine how well they handle the above problem. One of the tools we consider is an extension of our own previous work (von Looz et al., ICPP'18) called Geographer. Our experiments on well-known benchmark meshes indicate that only two tools under consideration are able to yield good quality. these two are ParMetis (both the geometric and the combinatorial variant) and Geographer. While ParMetis is faster, Geographer yields better quality on average.

关键词： Greedy algorithms High performance computing Memory management Tools parallel processing Numerical simulation Numerical models

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Heterogeneous distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators

Heterogeneous Distributed SRAM Configuration for Energy-Effi...

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Annual IEEE Northeast Workshop on Circuits and systems (NEWCAS)

作者： Mehdi Ahmadi Shervin Vakili J. M. Pierre Langlois Polytechnique Montréal Canada

ISBN: (数字)9781728170442

ISBN: (纸本)9781728170459

Convolutional Neural Networks (CNNs) are often the first choice for visual recognition systems due to their high, even superhuman, recognition accuracy. the memory configuration of CNN accelerators highly impacts their area and energy efficiency, and employing on-chip memories such as SRAMs is unavoidable. SRAMs can reduce the number of energy-hungry DRAM accesses by storing a large amount of data locally. In this paper, we propose a new on-chip memory configuration, for a certain class of CNN accelerators that divides the memories into two groups. the first group consists of shallow but wide SRAMs into which parallel computational units accumulate intermediate results. the second group includes narrow but deep SRAMs shared between adjacent computational units to store then transfer final results to the external DRAM without interrupting the computation process. Implementation results show that the proposed configuration reduces the area by 21 % and improves the energy efficiency by 18% compared to designs which use an ordinary ping-pong structure for SRAM-DRAM data transfer.

关键词： Random access memory Convolution Copper Energy efficiency Computer architecture System-on-chip Engines

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Cost-Effective Low-Delay Design for Multiparty Cloud Video Conferencing

Cost-Effective Low-Delay Design for Multiparty Cloud Video C...

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作者： Hajiesmaili, Mohammad H. Mak, Lok To Wang, Zhi Wu, Chuan Chen, Minghua Khonsari, Ahmad Chinese University of Hong Kong Shatin Hong Kong Whiting School of Engineering Johns Hopkins University BaltimoreMD21218 United States Department of Information Engineering Chinese University of Hong Kong Shatin Hong Kong Graduate School at Shenzhen Tsinghua University Shenzhen518055 China Department of Computer Science University of Hong Kong Pokfulam Hong Kong School of Electrical and Computer Engineering College of Engineering University of Tehran Tehran*** Iran School of Computer Science Institute ForResearch in Fundamental Sciences Tehran193955746 Iran

Multiparty cloud video conferencing architecture has been recently advocated to exploit rich computing and bandwidth resources in the cloud to effectively improve video conferencing performance. As a typical design in this architecture, multiple agents, i.e., virtual machines, are deployed in different cloud sites, and users are assigned to the agents. then, the users communicate through the agents, and the agents might transcode the recorded videos given the heterogeneities among devices in terms of hardware specification and connectivity. In this architecture, two critical and nontrivial challenges are: 1) assigning users to agents to reduce the operational cost and the user-to-user conferencing delay and 2) identifying best agents to perform transcoding tasks, taking into account the heterogeneous bandwidth and processing availabilities. To address these challenges, we cast a joint problem of user-to-agent assignment and transcoding-agent selection. the ultimate objective is to simultaneously minimize the cost of the service provider and the conferencing delay. the problem is combinatorial in nature, which belongs to the NP-hard node assignment problems. We leverage the Markov approximation framework and devise an adaptive parallel algorithm that finds a close-to-optimal solution to our problem with a bounded performance guarantee. To evaluate the performance of our solution, we implement a prototype video conferencing system and carry out trace-driven experiments. In a set of large-scale experiments using PlanetLab traces, our solution decreases the operational cost by 77% and simultaneously yields lower conferencing delay compared with an existing alternative. © 2017 IEEE.

关键词： parallel algorithms

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AutoSec: Multidimensional Timing-Based Anomaly Detection for Automotive Cybersecurity

AutoSec: Multidimensional Timing-Based Anomaly Detection for...

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IEEE international conference on Embedded and Real-Time computing systems and Applications (RTCSA)

作者： Milan Tepić Mohamed Abdelaal Marc Weber Kurt Rothermel Institute of Parallel and Distributed Systems University of Stuttgart Vector Informatik GmbH

ISBN: (数字)9781728144030

ISBN: (纸本)9781728144047

Nowadays, autonomous driving and driver assistance applications are being developed at an accelerated pace. this rapid growth is primarily driven by the potential of such smart applications to significantly improve safety on public roads and offer new possibilities for modern transportation concepts. Such indispensable applications typically require wireless connectivity between the vehicles and their surroundings, i.e. roadside infrastructure and cloud services. Nevertheless, such connectivity to external networks exposes the internal systems of individual vehicles to threats from remotely-launched attacks. In this realm, it is highly crucial to identify any misbehavior of the software components which might occur owing to either these threats or even software/hardware malfunctioning. In this paper, we introduce AutoSec, a host-based anomaly detection algorithm which relies on observing four timing parameters of the executed software components to accurately detect malicious behavior on the operating system level. To this end, AutoSec formulates the task of detecting anomalistic executions as a clustering problem. Specifically, AutoSec devises a hybrid clustering algorithm for grouping a set of collected timing traces resulted from executing the legitimate code. During the runtime, AutoSec simply classifies a certain execution as an anomaly, if its timing parameters are distant enough from the boundaries of the predefined clusters. To show the effectiveness of AutoSec, we collected timing traces from a testbed composed of a set of real and virtual control units communicating over a CAN bus. We show that using our proposed AutoSec, compared to baseline methods, we can identify up to 21% less false positives and 18% less false negatives.

关键词： Timing Software Clustering algorithms Task analysis Anomaly detection Software algorithms Safety

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