检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,876 篇 会议
30 篇 期刊文献
7 册 图书

馆藏范围

1,913 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,244 篇 工学
- 1,042 篇 计算机科学与技术...
- 729 篇 软件工程
- 407 篇 电气工程
- 183 篇 电子科学与技术（可...
- 74 篇 信息与通信工程
- 63 篇 控制科学与工程
- 33 篇 仪器科学与技术
- 30 篇 机械工程
- 26 篇 动力工程及工程热...
- 23 篇 建筑学
- 17 篇 土木工程
- 15 篇 核科学与技术
- 13 篇 光学工程
- 13 篇 生物工程
- 10 篇 材料科学与工程（可...
- 10 篇 生物医学工程（可授...
- 8 篇 安全科学与工程
171 篇 理学
- 101 篇 数学
- 45 篇 物理学
- 18 篇 生物学
- 17 篇 系统科学
- 9 篇 统计学（可授理学、...
- 6 篇 化学
49 篇 管理学
- 38 篇 管理科学与工程(可...
- 19 篇 工商管理
- 14 篇 图书情报与档案管...
16 篇 医学
- 14 篇 临床医学
- 12 篇 特种医学
14 篇 法学
- 12 篇 社会学
9 篇 经济学
- 9 篇 应用经济学
5 篇 农学
5 篇 军事学
2 篇 教育学

主题

834 篇 field programmab...
688 篇 field programmab...
276 篇 hardware
157 篇 computer archite...
126 篇 logic gates
112 篇 table lookup
87 篇 throughput
87 篇 clocks
83 篇 random access me...
79 篇 routing
74 篇 software
72 篇 acceleration
66 篇 delays
65 篇 optimization
62 篇 kernel
54 篇 registers
54 篇 logic
50 篇 switches
49 篇 algorithm design...
47 篇 system-on-chip

机构

14 篇 univ toronto dep...
9 篇 imperial coll lo...
8 篇 school of comput...
8 篇 department of co...
8 篇 ecole polytech f...
7 篇 univ british col...
7 篇 brigham young un...
7 篇 imperial coll lo...
7 篇 tokyo inst techn...
6 篇 univ tsukuba tsu...
6 篇 university of ch...
6 篇 department of el...
6 篇 univ warwick sch...
6 篇 xilinx inc san j...
5 篇 univ manchester ...
5 篇 department of el...
5 篇 univ toronto dep...
5 篇 inesc-id univers...
5 篇 swiss fed inst t...
5 篇 department of el...

作者

31 篇 luk wayne
21 篇 maruyama tsutomu
16 篇 koch dirk
14 篇 wayne luk
12 篇 wilton steven j....
12 篇 ienne paolo
11 篇 betz vaughn
10 篇 fahmy suhaib a.
10 篇 cheung peter y. ...
9 篇 vaughn betz
9 篇 constantinides g...
9 篇 prasanna viktor ...
9 篇 amano hideharu
8 篇 paolo ienne
8 篇 chow paul
8 篇 akash kumar
7 篇 kapre nachiket
7 篇 teich juergen
7 篇 suhaib a. fahmy
7 篇 alonso gustavo

语言

1,885 篇 英文
24 篇 其他
4 篇 中文

检索条件"任意字段=18th International Conference on Field Programmable and Logic Applications"

共 1913 条记录，以下是1491-1500 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Domain-Specific Hybrid FPGA: Architecture and Floating Point applications

Domain-Specific Hybrid FPGA: Architecture and Floating Point...

引用

international conference on field programmable logic and applications

作者： Chun Hok Ho Chi Wai Yu Philip H.W. Leong Wayne Luk Steven J.E. Wilton Department of Computing Imperial College London London UK Department of Computer Science and Engineering Chinese University of Hong Kong Hong Kong China Department of Electrical and Computer Engineering University of British Columbia Vancouver BC Canada

this paper presents a novel architecture for domain-specific FPGA devices. this architecture can be optimised for both speed and density by exploiting domain-specific information to produce efficient reconfigurable logic with multiple granularity. In the reconfigurable logic, general-purpose fine-grained units are used for implementing control logic and bit-oriented operations, while domain-specific coarse-grained units and heterogeneous blocks are used for implementing datapaths; the precise amount of each type of resources can be customised to suit specific application domains. Issues and challenges associated with the design flow and the architecture modelling are addressed. Examples of the proposed architecture for speeding up floating point applications are illustrated. Current results indicate that the proposed architecture can achieve 2.5 times improvement in speed and 18 times reduction in area on average, when compared with traditional FPGA devices on selected floating point benchmark circuits.

关键词： field programmable gate arrays Computer architecture Fabrics Reconfigurable logic Table lookup Circuits Embedded computing Application software Educational institutions logic devices

来源：评论

学校读者我要写书评

暂无评论

Algorithm and Program for Block-Recurred Function Decomposition Using q-Minterm Partitioning Method

Algorithm and Program for Block-Recurred Function Decomposit...

引用

international conference on CAD Systems in Microelectronics (CADSM)

作者： Bohdan Rytsar Adrian Shvay Institute of Telecommunications Radio Electronics and Electronic Techniques of ĺviv PolytechnicNational University Lviv Ukraine

the algorithm and program BRASh for partitive block-recured decomposition of Boolean function has been given. It is based on the q-minterm partitioning. the proposed algorithm has a simpler computer realization due to... 详细信息

关键词： Partitioning algorithms programmable logic arrays Cloning Boolean functions logic devices field programmable gate arrays Set theory programmable logic devices Matrix decomposition

来源：评论

学校读者我要写书评

暂无评论

Efficient FPGA-Based Multipliers for F397 and F36.97

Efficient FPGA-Based Multipliers for F397 and F36.97

引用

international conference on field programmable logic and applications

作者： Jamshid Shokrollahi Elisa Gorla Christoph Puttmann B-IT University of Bonn Germany Department of Mathematics University of Zürich Switzerland Heinz Nixdorf Institute University of Paderborn Germany

In this work, we present a new structure for multiplication in finite fields. this structure is based on a digit-level LFSR (Linear Feedback Shift Register) multiplier, in which the area of the digit-multipliers is reduced using the Karatsuba method. We compare our results with the other works of the literature for F 3 97. Furthermore, we propose new formulas for multiplication in F 3 6 97. these new formulas reduce the number of F 3 97-multiplications from 18 to 15. the finite fields F 3 97 and F 3 6 97 are important fields for pairing based cryptography.

关键词： Galois fields Public key cryptography Polynomials Linear feedback shift registers Poles and towers field programmable gate arrays Elliptic curve cryptography Arithmetic National security Mathematics

来源：评论

学校读者我要写书评

暂无评论

Optimization of the Circuit of Compositional Microprogram Control Unit with Mutual Memory

Optimization of the Circuit of Compositional Microprogram Co...

引用

international conference on CAD Systems in Microelectronics (CADSM)

作者： A.A. Barkalov L. Titarenko R. Wisniewski University of Zielona Góra Donetsk National Technical University Zielona Góra Poland

the method of optimal addressing of microinstructions of CMCU with mutual memory is proposed. the method is based on the effective encoding of classes of the pseudo-equivalent operational linear chains. An example of ... 详细信息

关键词： Digital systems System-on-a-chip field programmable gate arrays logic circuits Control systems programmable logic arrays Table lookup Optimization methods Optimal control Encoding

来源：评论

学校读者我要写书评

暂无评论

IIP Diversity-Oriented SoPC Decisions

IIP Diversity-Oriented SoPC Decisions

引用

international conference on CAD Systems in Microelectronics (CADSM)

作者： Sergey Ostroumov Computer Systems and Networks Department Kharkov National Aerospace University KhAI Kharkiv Ukraine

In this paper different variants of IIP realizations for SoC are given. It is described possible variants for practical usage in aerospace technology by designing FPGA projects. Several diversity-oriented SoC decision... 详细信息

关键词： field programmable gate arrays Ice Protection Control systems Fault tolerance logic devices Cogeneration Resistance heating programmable logic arrays Computer architecture

来源：评论

学校读者我要写书评

暂无评论

Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support

Exploring Alternative 3D FPGA Architectures: Design Methodol...

引用

international conference on field programmable logic and applications

作者： K. Siozios K. Sotiriadis V.F. Pavlidis D. Soudris Democritus University of Thrace Greece University of Rochester USA

this paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPR0 for placement and routing on 3D FPGAs and (ii) the 3DPower for power/energy estimation on such architectures. We mainly focus our exploration on the total number of layers and the amount of vertical interconnects (or vias). the efficiency of the proposed architecture is evaluated by making an exhaustive exploration for via connections under the Energy x Delay Product criterion. Experimental results demonstrate the effectiveness of our solution, considering the 20 largest MCNC benchmarks. Considering 3D architectures with 4 layers and two scenarios of fabricated via densities (30% and 70%), we achieve an average decrease in the delay, the wire length, and the energy consumption of 18%, 17%, and 31%, respectively, as compared to 2D FPGAs. We also achieved high utilization of vias links.

关键词： field programmable gate arrays Design methodology Design automation Energy consumption Wire Delay Routing Integrated circuit interconnections Switches Manufacturing industries

来源：评论

学校读者我要写书评

暂无评论

Dynamically Optimizing FPGA applications by Monitoring Temperature and Workloads

Dynamically Optimizing FPGA Applications by Monitoring Tempe...

引用

international conference on VLSI Design

作者： Phillip H. Jones Young H. Cho John W. Lockwood Applied Research Laboratory Washington University Saint Louis MO USA

ISBN: (纸本)9780769527628;0769527620

In the past, field programmable gate array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed excessive power. Today, the temperature of FPGAs are a major concern due to increased logic density and speed. Large applications with highly pipelined datapaths can ultimately generate more heat than the package can dissipate. For FPGAs that operate in controlled environments, heat sinks and fans can be used to effectively dissipate heat from the device. However, FPGA devices operating under harsher thermal conditions in outdoor environments, or in systems with malfunctioning cooling systems need a thermal management control system. To address this issue, we had previously devised a reconfigurable temperature monitoring system that gives feedback to the FPGA circuit using the measured junction temperature of the device. Using this feedback, we designed a novel dual frequency switching system that allows the FPGA circuits to maintain the highest level of throughput performance for a given maximum junction temperature. this paper extends the previous work by additionally making this adaptive frequency mechanism workload aware and evaluating power and latency performance under bursty workload conditions. Our working system has been implemented on the field programmable port extender (FPX) platform developed at Washington University in St. Louis. Experimental results with a scalable image correlation circuit show up to a 30% saving in power for bursty workloads and up to a 2x factor improvement in latency performance as compared to a system without thermal or workload feedback. Our circuit provides power efficient high performance processing of bursty workloads, while ensuring the device always operates within a safe temperature range

关键词： field programmable gate arrays Temperature measurement Temperature sensors Frequency thermal management Feedback circuits programmable logic arrays Temperature control Heat sinks Delay

来源：评论

学校读者我要写书评

暂无评论

A Radio Astronomy Correlator Optimized for the Xilinx Virtex-4 SX FPGA

A Radio Astronomy Correlator Optimized for the Xilinx Virtex...

引用

international conference on field programmable logic and applications

作者： Ludovico de Souza John D. Bunton Duncan Campbell-Wilson Roger J. Cappallo Bart Kincaid Australia Telescope National Facility CSIRO Australia CSIRO ICT Centre Australia Molonglo Radio Observatory The University of Sydney Haystack Observatory Massachusetts Institute of Technology Haystack Observatory Massachusetts Institute of Technology USA

this paper describes a correlator that is optimized for the Xilinx Virtex-4 SX FPGA, and its application in the SKAMP radio telescope at the Molonglo Radio Observatory. the digital backend of the SKAMP telescope consists of more than 800 Virtex-4 FPGAs. Correlation is performed between each and every pairing of antenna inputs, so the SKAMP telescope, with its 384 inputs, has approximately 74,000 antenna correlations; with 100 MHz of input bandwidth from each antenna this requires real-time processing of more than 7 tera complex multiply-accumulates per second. the correlation cell described takes advantage of the hard IP blocks found within the Virtex-4 FPGA to perform one 4+4-bit complex correlation per cycle at a clock rate exceeding 256 MHz. At the core of each cell is an efficient 4-bit signed complex multiplier, implemented using the 18-bit signed multiplier of the Virtex-4 DSP slice, and a short term accumulator, implemented using the adjacent Block RAM. Nearly 30,000 correlation cells are instantiated across 192 Virtex-4 SX35 devices in order to process all the data from the SKAMP telescope.

关键词： Radio astronomy Correlators field programmable gate arrays Telescopes Optical interferometry Observatories Bandwidth Filter bank Radio interferometry Space technology

来源：评论

学校读者我要写书评

暂无评论

Optimization of Control Memory Size of Control Unit with Codes Sharing

Optimization of Control Memory Size of Control Unit with Cod...

引用

international conference on CAD Systems in Microelectronics (CADSM)

作者： A. Barkalov M. Kolopienczyk L. Titarenko Institute of Computer Engineering and Electronics University of Zielona Góra Poland

the method of design of compositional microprogram control unit with codes sharing is proposed. the proposed method is based on application of special address transformer to form an address of microinstruction on the ... 详细信息

关键词： Size control logic Digital systems Design optimization Design methodology Vectors field programmable gate arrays Digital multimedia broadcasting Optimization methods Control systems

来源：评论

学校读者我要写书评

暂无评论

Secure FPGA circuits using controlled placement and routing

Secure FPGA circuits using controlled placement and routing

引用

international conference on Hardware/Software Codesign and System Synthesis (CODES)

作者： Pengyuan Yu Patrick Schaumont ECE Department Virginia Polytechnic Institute and State University Blacksburg VA USA

In current field-programmable-logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an existing circuit within the same FPGA fabric. We have solved this problem in a way that still enables us to modify the logic function of the copied sub-module. Our technique has important applications in the design of side-channel resistant implementations in FPGA. Starting from an existing single-ended design, we are able to create a complementary circuit. the resulting overall circuit strongly reduces the power-consumption-dependent information leaks. We show that the direct mapping of a secure ASIC circuit-style in an FPGA does not preserve the same level of security, unless our symmetrical routing technique is employed. We demonstrate our approach on an FPGA prototype of a cryptographic design, and show through power-measurements followed by side-channel power analysis that secure logic implemented with our approach is resistant whereas non-routing-aware directly mapped circuits can be successfully attacked.

关键词： field programmable gate arrays Routing Table lookup Clocks logic gates Fabrics Power demand

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共192页 << < 146 147 148 149 150 151 152 153 154 155 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：