this paper proposes a new CLB architecture for FPGAs and an associated testing technique that detects routing errors caused by SEUs in the SRAM configuration memory of the FPGA. the proposed testing technique detects ...
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ISBN:
(纸本)0769522645
this paper proposes a new CLB architecture for FPGAs and an associated testing technique that detects routing errors caused by SEUs in the SRAM configuration memory of the FPGA. the proposed testing technique detects all possible routing errors including bridging faults, and requires a single configuration of only the LUTs of the FPGA. Any routing error that affects the logic of the circuit is detected by the proposed technique in a maximum of 8 clock cycles. It Is noteworthy that the time required for error detection is independent of boththe number of switch matrices and the number of logic blocks in the FPGA.
In this paper we present a Novel Fuzzy Cerebellar Model Articulation Controller (FCMAC) implementation using fieldprogrammable Gates Array (FPGA). the FPGA is available in a flexible software/hardware co-design platf...
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ISBN:
(纸本)9781604234817
In this paper we present a Novel Fuzzy Cerebellar Model Articulation Controller (FCMAC) implementation using fieldprogrammable Gates Array (FPGA). the FPGA is available in a flexible software/hardware co-design platform. Fuzzification of the input data is based on the Discrete Incremental Clustering (DIC). Modifications were made on the DIC algorithm to meet the hardware constraint. the FPGA used is the Spartan II FPGA. Test result for classification of 2-spiral problem is presented, which demonstrates the validity and generalization capability of the proposed architecture and its advantages with reduced memory requirement.
On-chip Built-In Self-Test (BIST) based diagnosis of the embedded fieldprogrammable Gate Array (FPGA) core in a generic System-on-Chip (SoC) is presented. In this approach, the embedded processor core in the SoC is u...
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ISBN:
(纸本)1880843544
On-chip Built-In Self-Test (BIST) based diagnosis of the embedded fieldprogrammable Gate Array (FPGA) core in a generic System-on-Chip (SoC) is presented. In this approach, the embedded processor core in the SoC is used for reconfiguration of the FPGA core for BIST, initiating the BIST sequence, retrieving the BIST results, and for performing diagnosis of faulty programmablelogic blocks, memory cores, programmable interconnect resources within the FPGA core based on failing BIST results. these BIST and BIST-based diagnostic procedures have been implemented and verified on a commercial SoC with fault injection emulation. Diagnostic resolution is achieved to the faulty logic or memory block and can be used for on-chip reconfiguration to bypass faulty resources for fault-tolerant applications.
MD5 is one of the algorithms used to provide authentication between two peers establishing secure Internet Protocol Security (IPSec) communications. the input message can be of any length up to 264 bits;however, the m...
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ISBN:
(纸本)9781604234817
MD5 is one of the algorithms used to provide authentication between two peers establishing secure Internet Protocol Security (IPSec) communications. the input message can be of any length up to 264 bits;however, the message is processed 512 bits at a time. the algorithm is used to compress the input message and provide a 128-bit one-way hash. this hash is used as a Message Authentication Code to verify that received messages come from the expected source and have not been altered. In this paper, we show that using hardware implementation of this algorithm is a faster approach when compared to the software approach. the hardware used is Xilinx Virtex II Pro 30 fieldprogrammable Gate Array chip. We present a timing analysis to prove that the hardware approach is faster than the software approach and is desirable for high speed network (multi-gigabit).
Fuzzy logic Controllers are generally implemented on microprocessors which offer a smooth design surface. the purpose of this article is the implementation of a fuzzy logic controller on a fieldprogrammable Gate Arra...
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ISBN:
(纸本)9789972611001
Fuzzy logic Controllers are generally implemented on microprocessors which offer a smooth design surface. the purpose of this article is the implementation of a fuzzy logic controller on a fieldprogrammable Gate Array. the use of fieldprogrammable gate array gives the designers the possibility to implement a wide variety of applications, test them and make modifications easily and quickly. Two approaches of fuzzy logic controller implementation are proposed. the first one traduces the whole fuzzy logic algorithm to a High Description Language and the second one is based on the use of the Look Up Table in order to reduce time treatment.
Summary form only for tutorial. Embedded systems design is a hot application field which merges logic design and processor-based hardware development in a single or few chips solution. Various technologies have been u...
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ISBN:
(纸本)0769525024
Summary form only for tutorial. Embedded systems design is a hot application field which merges logic design and processor-based hardware development in a single or few chips solution. Various technologies have been used in the development of embedded systems; microcontroller, DSP processor, ASIC, and now FPGA. fieldprogrammable gate arrays (FPGA) from Xilinx started as glue logic usage stitching functions together. Withthe introduction of Virtex-II Pro, Xilinx entered embedded processing area. In this tutorial, we show how Xilinx FPGAs can be used in embedded applications. the strengths of Xilinx FPGAs and the supporting development tools are described. A demonstration is provided to show the ease of design and development of a complete system using Xilinx embedded development kit (EDK) software.
FPGAs have been a popular topic among electrical engineers for over a decade. Modern FPGAs are denser, faster and use less power compared to PLD and CPLD. this paper presents a high speed FPGA that operates in the gig...
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the use of infrared (IR) images of the soil is an efficient technique to detect shallowly buried landmines. the detection is possible due to the different thermal properties of the soil and the mine. the core of this ...
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this paper describes a novel fieldprogrammable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit and describes how this problem can be...
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Sequential Function Chart (SFC) is a graphical programming language defined in IEC 61131-3 as a standard programming language for Programable logic Controllers (PLCs). It provides an excellent method for formal specif...
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ISBN:
(纸本)0889865027
Sequential Function Chart (SFC) is a graphical programming language defined in IEC 61131-3 as a standard programming language for Programable logic Controllers (PLCs). It provides an excellent method for formal specification of discrete events systems. In this paper we describe a method to implement SFCs using fieldprogrammable Gate Arrays (FPGAs). the method is based on converting the SFC to a Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) which is a standard language used to configure FPGAs. the algorithm is successfully employed on an experimental platform using Xilinx Spartan-3 FPGA. Implementing SFCs on FPGAs satisfy the requirements of downsizing, hiding information, reducing costs, while adding high speed capabilities.
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