检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,875 篇 会议
29 篇 期刊文献
7 册 图书

馆藏范围

1,911 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,243 篇 工学
- 1,041 篇 计算机科学与技术...
- 729 篇 软件工程
- 407 篇 电气工程
- 183 篇 电子科学与技术（可...
- 74 篇 信息与通信工程
- 63 篇 控制科学与工程
- 36 篇 仪器科学与技术
- 30 篇 机械工程
- 26 篇 动力工程及工程热...
- 23 篇 建筑学
- 17 篇 土木工程
- 15 篇 核科学与技术
- 13 篇 光学工程
- 13 篇 生物工程
- 10 篇 材料科学与工程（可...
- 10 篇 生物医学工程（可授...
- 8 篇 安全科学与工程
170 篇 理学
- 101 篇 数学
- 45 篇 物理学
- 18 篇 生物学
- 16 篇 系统科学
- 9 篇 统计学（可授理学、...
- 6 篇 化学
49 篇 管理学
- 38 篇 管理科学与工程(可...
- 19 篇 工商管理
- 14 篇 图书情报与档案管...
16 篇 医学
- 14 篇 临床医学
- 12 篇 特种医学
14 篇 法学
- 12 篇 社会学
9 篇 经济学
- 9 篇 应用经济学
5 篇 农学
5 篇 军事学
2 篇 教育学

主题

833 篇 field programmab...
688 篇 field programmab...
276 篇 hardware
156 篇 computer archite...
125 篇 logic gates
112 篇 table lookup
87 篇 throughput
87 篇 clocks
83 篇 random access me...
79 篇 routing
74 篇 software
72 篇 acceleration
65 篇 delays
65 篇 optimization
62 篇 kernel
54 篇 registers
54 篇 logic
50 篇 switches
49 篇 algorithm design...
47 篇 system-on-chip

机构

14 篇 univ toronto dep...
9 篇 imperial coll lo...
8 篇 school of comput...
8 篇 department of co...
8 篇 ecole polytech f...
7 篇 univ british col...
7 篇 brigham young un...
7 篇 imperial coll lo...
7 篇 tokyo inst techn...
6 篇 univ tsukuba tsu...
6 篇 university of ch...
6 篇 department of el...
6 篇 univ warwick sch...
6 篇 xilinx inc san j...
5 篇 univ manchester ...
5 篇 department of el...
5 篇 univ toronto dep...
5 篇 inesc-id univers...
5 篇 swiss fed inst t...
5 篇 department of el...

作者

31 篇 luk wayne
21 篇 maruyama tsutomu
16 篇 koch dirk
14 篇 wayne luk
12 篇 wilton steven j....
12 篇 ienne paolo
11 篇 betz vaughn
10 篇 fahmy suhaib a.
10 篇 cheung peter y. ...
9 篇 vaughn betz
9 篇 constantinides g...
9 篇 prasanna viktor ...
9 篇 amano hideharu
8 篇 paolo ienne
8 篇 chow paul
8 篇 akash kumar
7 篇 kapre nachiket
7 篇 teich juergen
7 篇 suhaib a. fahmy
7 篇 alonso gustavo

语言

1,898 篇 英文
9 篇 其他
4 篇 中文

检索条件"任意字段=18th International Conference on Field Programmable and Logic Applications"

共 1911 条记录，以下是1761-1770 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Time and energy efficient matrix factorization using FPGAs

Time and energy efficient matrix factorization using FPGAs

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Choi, Seonil Prasanna, Viktor K. Electrical Engineering-Systems University of Southern California Los Angeles United States

ISBN: (纸本)3540408223

In this paper, new algorithms and architectures for matrix factorization are presented. Two fully-parallel and block-based designs for LU decomposition on configurable devices are proposed. A linear array architecture is employed to minimize the usage of long interconnects, leading to lower energy dissipation. the designs are made scalable by using a fixed I/O bandwidth independent of the problem size. High level models for energy profiling are built and the energy performance of many possible designs is predicted. through the analysis of design tradeoffs, the block size that minimizes the total energy dissipation is identified. A set of candidate designs was implemented on the Xilinx Virtex-II to verify the estimates. Also, the performance of our designs is compared with that of state-of-the-art DSP based designs and with the performance of designs obtained using a state-of-the-art commercial compilation tool such as Celoxica DK1. Our designs on the FPGAs are significantly more time and energy efficient in both cases. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

Modified fuzzy C-means clustering algorithm for real-time applications

Modified fuzzy C-means clustering algorithm for real-time ap...

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Lázaro, Jesús Arias, Jagoba Martín, José L. Cuadrado, Carlos Escuela Superior de Ingenieros University of the Basque Country Alameda Urquijo s/n Bilbao48013 Spain

ISBN: (纸本)3540408223

the fuzzy approach in image processing is taking each day greater importance. It is greatly due to the fact that every new application of artificial vision is closer to human vision. this means that tightly knot algorithms are not always a good solution and a more "imprecise" and fuzzy approach is desirable. this paper describes a modified Fuzzy C-Means algorithm intended to be implemented in hardware. the original algorithm was modified to match the desired level of parallelism, speed and to simplify the hardware implementations. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Image processing

来源：评论

学校读者我要写书评

暂无评论

Efficient reconfigurable logic circuits for matching complex network intrusion detection patterns

Efficient reconfigurable logic circuits for matching complex...

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Clark, Christopher R. Schimmel, David E. School of Electrical and Computer Engineering Georgia Institute of Technology AtlantaGA30332 United States

ISBN: (纸本)3540408223

this paper presents techniques for designing pattern matching circuits for complex regular expressions, such as those found in network intrusion detection patterns. We have developed a pattern-matching coprocessor that supports all the pattern matching functions of the Snort rule language [3]. In order to achieve maximum pattern capacity and throughput, the design focuses on minimizing circuit area while maintaining high clock speed. Using our approach, we are able to store the entire current Snort rule database consisting of over 1,500 rules and 17,000 characters into a single one-million- gate FPGA while comparing all patterns against traffic at gigabit rates. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Pattern matching

来源：评论

学校读者我要写书评

暂无评论

Fully parameterized discrete wavelet packet transform architecture oriented to FPGA

Fully parameterized discrete wavelet packet transform archit...

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Payá, Guillermo Peiró, Marcos M. Ballester, Francisco Mora, Francisco Universidad Politécnica de Valencia Department of Electronic Engineering Camino de Vera s/n 46022 Spain

ISBN: (纸本)3540408223

the present paper describes a fully parameterized Discrete Wavelet Packet Transform (DWPT) architecture based on a folded Distributed Arithmetic implementation, which makes possible to design any kind of wavelet bases. the proposed parameterized architecture allows different CDF wavelet coefficient with variable bit precision (data input and output size, and coefficient length). Moreover, by combining different blocks in cascade, we can expand as many complete stages (wavelet packet levels) as we require. Our architecture need only two FIR filters to calculate various wavelet stages simultaneously, and specific VIRTEX family resources (SRL16E) have been instantiated to reduce area and increase frequency operation. Finally, a DWPT implementation for CDF(9,7) wavelet coefficients is synthesized on VIRTEX-II 3000-6 FPGA for different precisions. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

An algorithm designer’s workbench for platform FPGAs

An algorithm designer’s workbench for platform FPGAs

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Mohanty, Sumit Prasanna, Viktor K. Electrical Engineering Systems University of Southern California CA United States

ISBN: (纸本)3540408223

Growing gate density, availability of embedded multipliers and memory, and integration of traditional processors are some of the key advantages of Platform FPGAs. Such FPGAs are attractive for implementing compute intensive signal processing kernels used in wired as well as wireless mobile devices. However, algorithm design using Platform FPGAs, with energy dissipation as an additional performance metric for mobile devices, poses significant challenges. In this paper, we propose an algorithm designer’s workbench that addresses the above issues. the workbench supports formal modeling of the signal processing kernels, evaluation of latency, energy, and area of a design, and performance tradeoff analysis to facilitate optimization. the workbench includes a high-level estimator for rapid performance estimation and widely used low-level simulators for detailed simulation. Features include a confidence interval based technique for accurate power estimation and facility to store algorithm designs as library of models for reuse. We demonstrate the use of the workbench through design of matrix multiplication algorithm for Xilinx Virtex-II Pro. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

Design strategies and modified descriptions to optimize cipher FPGA implementations: Fast and compact results for DES and triple-DES

Design strategies and modified descriptions to optimize ciph...

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Rouvroy, Gaël Standaert, François-Xavier Quisquater, Jean-Jacques Legat, Jean-Didier UCL Crypto Group Laboratoire de Microélectronique Université catholique de Louvain Place du Levant 3 Louvain-La-NeuveB-1348 Belgium

ISBN: (纸本)3540408223

In this paper, we propose a new mathematical DES description that allows us to achieve optimized implementations in term of ratio throughput/Area. First, we get an unrolled DES implementation that works at data rates of 21.3 Gbps (333 MHz), using Virtex-II technology. In this design, the plaintext, the key and the mode (encryption/ decrytion) can be changed on a cycle-by-cycle basis with no dead cycles. In addition, we also propose sequential DES and triple-DES designs that are currently the most efficient ones in term of resources used as well as in term of throughput. Based on our DES and triple-DES results, we also set up conclusions for optimized FPGA design choices and possible improvement of cipher implementations with a modified structure description. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

FPGA implementations of the RC6 block cipher

FPGA implementations of the RC6 block cipher

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Beuchat, Jean-Luc Laboratoire de l’Informatique du Parallélisme Ecole Normale Supérieure de Lyon 46 Allée d’Italie Lyon Cedex 07F–69364 France

ISBN: (纸本)3540408223

RC6 is a symmetric-key algorithm which encrypts 128-bit plaintext blocks to 128-bit ciphertext blocks. the encryption process involves four operations: integer addition modulo 2w, bitwise exclusive or of two w-bit words, rotation to the left, and computation of f(X) = (X(2X + 1)) mod 2w, which is the critical arithmetic operation of this block cipher. In this paper, we investigate and compare four implementations of the f(X) operator on Virtex-E and Virtex-II devices. Our experiments show that the choice of an algorithm is strongly related to the target FPGA family. We also describe several architectures of a RC6 processor designed for feedback or non-feedback chaining modes. Our fastest implementation achieves a throughput of 15.2 Gb/s on a Xilinx XC2V3000-6 device. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

A data acquisition reconfigurable coprocessor for virtual instrumentation applications

A data acquisition reconfigurable coprocessor for virtual in...

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Dolores Valdés, M. Moure, María J. Quintáns, Camilo Mandado, Enrique Instituto de Electrónica Aplicada "Pedro Barrié de la Maza" Universidad de Vigo Spain Departamento de Tecnología Electrónica Universidad de Vigo Spain

ISBN: (纸本)3540408223

Virtual instruments intended for electronic circuits verification arose from the combination of computers supporting advanced graphical interfaces with data acquisition systems providing input/output capabilities. In order to increase the versatility and the operation rate of virtual instruments, we have designed several data acquisition/generation modules based on reconfigurable hardware. By this way, not only the software modules but also the hardware functions are dynamically changed according to the requirements of each specific instrument. the main basis of the software and hardware levels of reconfigurable virtual instruments are described in this paper. this methodology summarize our experience in the design of virtual instrumentation platforms oriented to different measurement applications. Finally, a new data acquisition/ generation coprocessor based on FPGAs and optimized for the implementation of portable instruments is described. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Data acquisition

来源：评论

学校读者我要写书评

暂无评论

Power analysis of FPGAs: How practical is the attack?

Power analysis of FPGAs: How practical is the attack?

引用

13th international conference on field-programmable logic and applications, FPL 2003

作者： Standaert, François-Xavier Van Oldeneel Tot Oldenzeel, Loïc Samyde, David Quisquater, Jean-Jacques UCL Crypto Group Laboratoire de Microélectronique Université Catholique de Louvain Place du Levant 3 Louvain-La-NeuveB-1348 Belgium

ISBN: (纸本)3540408223

Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve encryption rates that sometimes may require hardware implementations. Reprogrammable devices such as field programmable Gate Arrays are highly attractive solutions for hardware implementations of encryption algorithms and several papers underline their growing performances and flexibility for any digital processing application. Although cryptosystem designers frequently assume that secret parameters will be manipulated in closed reliable computing environments, Kocher et al. stressed in 1998 that actual computers and microchips leak information correlated with the data handled. Side-channel attacks based on time, power and electromagnetic measurements were successfully applied to the smart card technology, but we have no knowledge of any attempt to implement them against FPGAs. this paper examines how monitoring power consumption signals might breach FPGA-security. We propose first experimental results against FPGA-implementations of cryptographic algorithms in order to confirm that power analysis has to be considered as a serious threat for FPGA security. We also highlight certain features of FPGAs that increase their resistance against side-channel attacks. © Springer-Verlag Berlin Heidelberg 2003.

关键词： field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

Video signal encoder and decoder creation ways research [digital TV applications]

Video signal encoder and decoder creation ways research [dig...

引用

international conference on CAD Systems in Microelectronics (CADSM)

作者： V. Hlukhov A. Melnyk V. Puyda ICTAM Lviv Polytechnic National University L'viv Ukraine

In this article are described a TV information encoder and decoder algorithm; along with its research and development principals. Also these principals realized in consumer electronics using modern micro controllers a... 详细信息

关键词： Decoding Encoding programmable logic arrays Teletext Cable TV Signal processing Consumer electronics programmable control Viterbi algorithm Reed-Solomon codes

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共192页 << < 173 174 175 176 177 178 179 180 181 182 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：