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检索条件"任意字段=18th International Conference on Field Programmable and Logic Applications"
1909 条 记 录,以下是241-250 订阅
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On-the-Fly Parallel Data Shuffling for Graph Processing on OpenCL-based FPGAs  29
On-The-Fly Parallel Data Shuffling for Graph Processing on O...
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29th international conference on field-programmable logic and applications (FPL)
作者: Chen, Xinyu Bajaj, Ronak Chen, Yao He, Jiong He, Bingsheng Wong, Weng-Fai Chen, Deming Natl Univ Singapore Singapore Singapore Adv Digital Sci Ctr Singapore Singapore Alibaba Grp Hangzhou Peoples R China Univ Illinois Urbana IL 61801 USA
Graph processing has attracted much attention recently due to its popularity in many big data analytic applications. With high performance and energy efficiency, FPGAs can be an attractive architecture for graph proce... 详细信息
来源: 评论
Security Assessment of Microfluidic Fully-programmable-Valve-Array Biochips  32
Security Assessment of Microfluidic Fully-Programmable-Valve...
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32nd international conference on VLSI Design (VLSID) / 18th international conference on Embedded Systems (ES)
作者: Shayan, Mohammed Bhattacharjee, Sukanta Song, Yong-Ak Chakrabarty, Krishnendu Karri, Ramesh NYU New York NY 10003 USA New York Univ Abu Dhabi Abu Dhabi U Arab Emirates Duke Univ Durham NC 27706 USA
the fully-programmable-valve-array (FPVA) is a general-purpose programmable flow-based microfluidic platform, akin to the VLSI field-programmable gate array (FPGA). FPVAs are dynamically reconfigurable and hence are s... 详细信息
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DynaBurst: Dynamically Assemblying DRAM Bursts over a Multitude of Random Accesses  29
DynaBurst: Dynamically Assemblying DRAM Bursts over a Multit...
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29th international conference on field-programmable logic and applications (FPL)
作者: Asiatici, Mikhail Ienne, Paolo Ecole Polytech Fed Lausanne Sch Comp & Commun Sci CH-1015 Lausanne Switzerland
the effective bandwidth of the FPGA external memory, usually DRAM, is extremely sensitive to the access pattern. Nonblocking caches that handle thousands of outstanding misses (miss-optimized memory systems) can dynam... 详细信息
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Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack  29
Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
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29th international conference on field-programmable logic and applications (FPL)
作者: Ruiz, Mario Sidler, David Sutter, Gustavo Alonso, Gustavo Lopez-Buedo, Sergio Univ Autonoma Madrid Escuela Politecn Super High Performance Comp & Networking Res Grp Madrid Spain Swiss Fed Inst Technol Dept Comp Sci Syst Grp Zurich Switzerland NAUDIT HPCN Madrid Spain
the realization that the network is becoming an important bottleneck in computing clusters and in the cloud has led in the past years to an increase scrutiny of how networking functionality is deployed. From TCP Offlo... 详细信息
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Data stream statistics over sliding windows: How to summarize 150 Million updates per second on a single node  29
Data stream statistics over sliding windows: How to summariz...
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29th international conference on field-programmable logic and applications (FPL)
作者: Chrysos, Grigorios Papapetrou, Odysseas Pnevmatikatos, Dionisios Dollas, Apostolos Garofalakis, Minos Tech Univ Crete Sch Elect & Comp Engn Iraklion Greece Eindhoven Univ Technol Dept Math & Comp Sci Eindhoven Netherlands ATHENA Res & Innovat Ctr Athens Greece
Traditional data management systems map information using centralized and static data structures. Modern applications need to process in real time datasets much larger than system memory. To achieve this, they use dyn... 详细信息
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Automatic Compiler Based FPGA Accelerator for CNN Training  29
Automatic Compiler Based FPGA Accelerator for CNN Training
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29th international conference on field-programmable logic and applications (FPL)
作者: Venkataramanaiah, Shreyas Kolala Ma, Yufei Yin, Shihui Nurvithadhi, Eriko Dasu, Aravind Cao, Yu Seo, Jae-sun Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85281 USA Intel Corp Intel Labs Hillsboro OR USA Intel Corp Programmable Solut Grp San Jose CA USA
Training of convolutional neural networks (CNNs) on embedded platforms to support on-device learning is earning vital importance in recent days. Designing flexible training hardware is much more challenging than infer... 详细信息
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Software and Hardware Co-design for Low-Power HPC Platforms  1
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34th international conference on High Performance Computing (ISC High Performance)
作者: Ploumidis, Manolis Kallimanis, Nikolaos D. Asiminakis, Marios Chrysos, Nikos Xirouchakis, Pantelis Gianoudis, Michalis Tzanakis, Leandros Dimou, Nikolaos Psistakis, Antonis Peristerakis, Panagiotis Kalokairinos, Giorgos Papaefstathiou, Vassilis Katevenis, Manolis Fdn Res & Technol Hellas FORTH Iraklion Crete Greece
In order to keep an HPC cluster viable in terms of economy, serious cost limitations on the hardware and software deployment should be considered, prompting researchers to reconsider the design of modern HPC platforms... 详细信息
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Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range
Self-Parameterized Chaotic Map: A Hardware-efficient Scheme ...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: Partha Sarathi Paul Anurag Dhungel Maisha Sadia Md Razuan Hossain Barry Muldrey Md Sakib Hasan University of Mississippi MS USA
We present a general method called “self-parameterization” for designing one-dimensional (1-D) chaotic maps that provide wider chaotic regions than existing 1-D maps. A wide chaotic range is a desirable property as ... 详细信息
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Information Metamaterials and Information Systems
Information Metamaterials and Information Systems
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international conference on Infrared and Millimeter Waves
作者: Tie Jun Cui Institute of Electromagnetic Space Southeast University Nanjing China State Key Laboratory of Millimeter Waves Southeast University Nanjing China
Metamaterials have great capabilities and flexibilities in controlling electromagnetic (EM) waves since their subwavelength meta-atoms can be designed and tailored in desired ways. However, once the structure-only met... 详细信息
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A Novel FPGA Architecture of Commentz-Walter Algorithm using Bit-Split String-Matching Engines
A Novel FPGA Architecture of Commentz-Walter Algorithm using...
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international conference on Advances in ICT for Emerging Regions
作者: Sugandima M. Vidanagamachchi Shirley D. Dewasurendra Faculty of Science University of Ruhuna Sri Lanka Faculty of Engineering University of Peradeniya Sri Lanka
this paper describes a reconfigurable hardware implementation of CommentzWalter algorithm with bit-split string matching engines to match multiple protein sequences. It is reported that multiple pattern matching using... 详细信息
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