the proceedings contain 13 papers. the special focus in this conference is on appliedreconfigurablecomputing. the topics include: Light-Weight Permutation Generator for Efficient Convolutional Neural Network Da...
ISBN:
(纸本)9783031199820
the proceedings contain 13 papers. the special focus in this conference is on appliedreconfigurablecomputing. the topics include: Light-Weight Permutation Generator for Efficient Convolutional Neural Network Data Augmentation;real-Time Embedded Object Tracking with Discriminative Correlation Filters Using Convolutional Features;VenOS: A Virtualization Framework for Multiple Tenant Accommodation on reconfigurable Platforms;FPGA-Accelerated Tersoff Multi-body Potential for Molecular Dynamics Simulations;A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA;A Multi-FPGA Scalable Framework for Deep Reinforcement Learning through Neuroevolution;Development Progress of SWLBM a Framework Based on Lattice Boltzmann Method for Fluid Dynamics Simulation;Entropy-Based Early-Exit in a FPGA-Based Low-Precision Neural Network;FPGA-Extended General Purpose Computer Architecture;Multi-spectral In-Vivo FPGA-Based Surgical Imaging;hardware-Aware Optimizations for Deep Learning Inference on Edge Devices.
the rapid development of wireless mobile communication systems is highly affected by the availability of innovative antenna technologies such as reconfigurable antennas. In this paper, the reconfiguration feature is i...
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ISBN:
(纸本)9781538613382
the rapid development of wireless mobile communication systems is highly affected by the availability of innovative antenna technologies such as reconfigurable antennas. In this paper, the reconfiguration feature is implemented based on a novel concept, namely, reconfigurable printed ridge gap waveguide technology (RPRGW). this technology will enable the implementation of reconfigurable microwave components that needed for the construction of robust and adaptable communication systems. A reconfigurable patch antenna is designed based on this technology. the simulation results show that a frequency-reconfigurable patch antenna can he achieved using the proposed revolutionary configuration.
this paper presents development of reconfigurable numerical breast models to support advanced breast imaging research. these features are realized through application of a 3D modelling method to 3T magnetic resonance ...
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ISBN:
(纸本)9781538613382
this paper presents development of reconfigurable numerical breast models to support advanced breast imaging research. these features are realized through application of a 3D modelling method to 3T magnetic resonance imaging (MRI) scans. the reconfigurable model features are discussed in the context of supporting both initial and advanced development stages of emerging microwave breast imaging technologies. Further, these features are demonstrated through sample model reconstructions.
An architecture for a reconfigurable NIEMS based bandstop filter is presented. the architecture is comprised of a circulator and bandpass filters with embedded switches required to cycle through the allowable tuning s...
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ISBN:
(纸本)9781538613382
An architecture for a reconfigurable NIEMS based bandstop filter is presented. the architecture is comprised of a circulator and bandpass filters with embedded switches required to cycle through the allowable tuning states. the integration of MEWS switches and high temperature superconductors is proposed to realize high Q, low loss structures. A single switched channel bandstop filter and a three channel, 8 state bandstop filter implementing a reconfigurable manifold coupled switched multiplexer arc both presented with a combination of measured and simulated circuits to validate the proposed filtering architecture.
reconfigurablecomputing applications often need to divide computation between software running on a conventional desktop processor and hardware mapped to an FPGA. However, the reconfigurablecomputing development pla...
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ISBN:
(纸本)9780769540566
reconfigurablecomputing applications often need to divide computation between software running on a conventional desktop processor and hardware mapped to an FPGA. However, the reconfigurablecomputing development platforms available today either do not provide a sufficient mechanism for the communication and synchronization that is needed or else employ a complex & proprietary API specific to a given toolflow or device, limiting code portability. the Simple Interface for reconfigurablecomputing (SIRC) project provides a straightforward, portable and extensible open-source communication and synchronization API. It consists of both a software-side interface and a hardware-side interface that allows C++ code running on a host PC to communicate and synchronize with a Verilog-based circuit mapped to a FPGA. One key feature of this API is that boththe hardware and software user interfaces can remain consistent across all platforms and future releases. this allows applications built for existing systems to migrate to different platforms without significant modification to user code.
this paper proposes a design of a database system which accelerates the execution of database transactions by offloading database operators (e.g. joins, scans and sorting) in hardware algorithms executed on runtime re...
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ISBN:
(纸本)9780769540566
this paper proposes a design of a database system which accelerates the execution of database transactions by offloading database operators (e.g. joins, scans and sorting) in hardware algorithms executed on runtime reconfigurablecomputing platforms. Furthermore, a hybrid database system is described which exploits the strengths of the new reconfigurable hardware-based database system in combination with pre-existing technologies for main memory or disc resident database systems. Due to the parallel and pipelined design style of the hardware algorithms, the new database system offers a potential speedup over the traditional sequential execution on instruction stream processors. Moreover, data access times can be reduced by placing circuits on the reconfigurable fabric close to embedded memory which further allows for customizing high bandwidth memory interfaces. As a consequence of the accelerated execution speed, the new system has the potential to reliably meet constraints in real-time scenarios, to reduce the chance of lock contention and cache flushes, and to decrease the cost for concurrency control.
A reconfigurable wideb and power splitter is designed using Ridge Gap Waveguide technology. the splitter depends on using a flat sheet between two RGWs and controlling the sheet deflection using a mechanism integrated...
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ISBN:
(纸本)9781538613382
A reconfigurable wideb and power splitter is designed using Ridge Gap Waveguide technology. the splitter depends on using a flat sheet between two RGWs and controlling the sheet deflection using a mechanism integrated in the pins regions where the electromagnetic fields are negligible. the splitter achieves a flat 3 dB power splitting from 14 GHz to 22 GHz when the sheet is not deflected. When a force acts on the sheet ends, the power split ratio may be changed with matching level better than 15 dB on the same band.
A novel frequency reconfigurable microstrip monopole antenna with a fluidic channel milled on its substrate is proposed. the fluid in the channel modifies the effective permittivity of the dielectric medium and pertur...
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ISBN:
(纸本)9781538613382
A novel frequency reconfigurable microstrip monopole antenna with a fluidic channel milled on its substrate is proposed. the fluid in the channel modifies the effective permittivity of the dielectric medium and perturbs the E-field distribution in vicinity to antenna arm. the achieved frequency shift is 20.3%, the impedance bandwidth is 28.6% and 32.1% and the peak realized gain is 3.31 dBi and 1.81 dBi when the channel is empty and filled with distilled (DE water, respectively. Radiation pattern is omnidirectional in boththe cases with low cross-polar components.
In this paper, an enhancement design of reconfigurable integrated SIW and patch antenna using the varactor diodes is presented. To realize the concept, reconfigurable SIW filter and reconfigurable patch antenna were c...
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ISBN:
(纸本)9781538613382
In this paper, an enhancement design of reconfigurable integrated SIW and patch antenna using the varactor diodes is presented. To realize the concept, reconfigurable SIW filter and reconfigurable patch antenna were combined using the multilayer technique into a single structure. To validate the design technique, the equivalent circuit model of the tunable varactor diode network is presented to study the tunability mechanism. the experimental performance shows good agreement withthe tunable attenuation response up to 15.5 dB, better than 10 dB in the passband region. the investigation presented here may facilitate improvements in an integrated technique with a good tuning capability for wireless communication systems.
Existing in-storage processing (ISP) techniques mainly focus on maximizing data processing rate by always utilizing total storage data processing resources for all applications. We find that this "always running ...
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ISBN:
(纸本)9781538658154
Existing in-storage processing (ISP) techniques mainly focus on maximizing data processing rate by always utilizing total storage data processing resources for all applications. We find that this "always running in full gear" strategy wastes energy for some applications with a low data processing complexity. In this paper we propose RISP (reconfigurable ISP), an energy-aware reconfigurable ISP framework that employs FPGA as data processing cells and NVM controllers. It can reconfigure storage data processing resources to achieve a high energy-efficiency without any performance degradation for big data analysis applications. RISP is modeled and then validated on an FPGA board. Experimental results show that compared with traditional host-CPU based computing RISP (with 16 channels or more) improves performance by 1.6-25.4x while saving energy by a factor of 2.2-161. Further, its reconfigurability can provide up to 77.2% additional energy saving by judiciously enabling data processing resources that are sufficient for an application.
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