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检索条件"任意字段=19th International Conference on Logic Programming"
2634 条 记 录,以下是111-120 订阅
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SYNthESIS OF thE SR programming LANGUAGE FOR COMPLEX FPGAS
SYNTHESIS OF THE SR PROGRAMMING LANGUAGE FOR COMPLEX FPGAS
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19th international conference on Field Programmable logic and Applications
作者: Gasson, Nick Audsley, Neil Univ York Dept Comp Sci York YO10 5DD N Yorkshire England
Most existing approaches to targeting high-level software to FPGAs are based on extensions to C and do not map easily to the features and characteristics of modern FPGAs. these include massive parallelism and a variet... 详细信息
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Forward versus backward verification of logic programs
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19th international conference on logic programming
作者: King, A Lu, LJ Univ Kent Comp Lab Canterbury CT2 7NF Kent England Oakland Univ Dept Comp Sci Rochester MI 48309 USA
One recent development in logic programming has been the application of abstract interpretation to verify the partial correctness of a logic program with respect to a given set of assertions. One approach to verificat... 详细信息
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Introduction to the special issue of the 19th international conference on Runtime Verification
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international JOURNAL ON SOFTWARE TOOLS FOR TECHNOLOGY TRANSFER 2021年 第4期23卷 545-546页
作者: Finkbeiner, Bernd Mariani, Leonardo CISPA Helmholtz Ctr Informat Secur Saarbrucken Germany Univ Milano Bicocca Viale Sarca 336 I-2016 Milan Italy
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Building the Semantic Web Tower from RDF Straw
Building the Semantic Web Tower from RDF Straw
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19th international Joint conference on Artificial Intelligence (IJCAI 05)
作者: Patel-Schneider, Peter F. Bell Labs Res Murray Hill NJ 07974 USA
A same-syntax extension of RDF to first-order logic results in a collapse of the model theory due to logical paradoxes resulting from diagonalization. RDF is thus the wrong material for building the Semantic Web tower.
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Explainable and Ethical AI: A Perspective on Argumentation and logic programming  1
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19th international conference of the Italian-Association-for-Artificial-Intelligence (AIxIA)
作者: Calegari, Roberta Omicini, Andrea Sartor, Giovanni Alma Mater Studiorum Univ Bologna Alma AI Alma Mater Res Inst Human Ctr Artificial Bologna Italy Alma Mater Studiorum Univ Bologna DISI Cesena Italy
In this paper we sketch a vision of explainability of intelligent systems as a logic approach suitable to be injected into and exploited by the system actors once integrated with sub-symbolic techniques. In particular... 详细信息
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Synthesis of Multivalued logical Networks for FPGA Implementations  19
Synthesis of Multivalued Logical Networks for FPGA Implement...
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19th Euromicro conference on Digital System Design (DSD)
作者: Deniziak, Stanislaw Wisniewski, Mariusz Wieczorek, Karol Kielce Univ Technol Dept Comp Sci Kielce Poland
this paper presents the method of FPGA-oriented synthesis of multiple-valued logical networks. Multiple-valued network consists of modules connected by multiple-valued signals. During synthesis each module is decompos... 详细信息
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A Non-monotonic logic for Specifying and Querying Preferences
A Non-monotonic Logic for Specifying and Querying Preference...
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19th international Joint conference on Artificial Intelligence (IJCAI 05)
作者: Boella, Guido van der Torre, Leendert Univ Turin Dipartimento Informat I-10124 Turin Italy
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Conditional Narrowing Modulo SMT and Axioms  17
Conditional Narrowing Modulo SMT and Axioms
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19th international Symposium on Principles and Practice of Declarative programming (PPDP)
作者: Aguirre, Luis Marti-Oliet, Narciso Palomino, Miguel Pita, Isabel Univ Complutense Fac Informat Madrid Spain
this work presents a narrowing calculus for reachability problems in order-sorted conditional rewrite theories whose underlying equational logic is composed of some theories solvable via a satisfiability modulo theori... 详细信息
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Intensional sets in CLP
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19th international conference on logic programming
作者: Dovier, A Pontelli, E Rossi, G Univ Udine Dipartimento Matemat & Informat I-33100 Udine Italy New Mexico State Univ Dept Comp Sci Las Cruces NM 88003 USA Univ Parma Dipartimento Matemat I-43100 Parma Italy
We propose a parametric introduction of intensionally defined sets into any CLP(D) language. the result is a language CLP({D}), where constraints over sets of elements of D and over sets of sets of elements, and so on... 详细信息
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New procedures to identify redundant stuck-at faults and removal of redundant logic
New procedures to identify redundant stuck-at faults and rem...
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19th international conference on VLSI Design held jointly with the 5th international conference on Embedded System Design
作者: Chen, G Reddy, S Porneranz, I Rajski, J Univ Iowa Dept ECE Iowa City IA 52242 USA
We present new procedures for identifying redundant stuck-at faults including multiple line stuck-at faults on the branches of fan-out stems. the methods proposed include new procedures to identify stuck-at faults tha... 详细信息
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