the processes for design and release of LSI chips, thermal conduction modules (TCMs), and boards on the IBM 3081 Processor are highly automated, using the Engineering Design System. this paper describes the automated ...
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IDL is a hardware design language in use in the VLSI environment. It incorporates a significant number of high-level features such as groups, subroutines, and labels and is particularly well adapted to dealing with pa...
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the Planar Package Planner is a design aid aimed at helping to form a package layout plan, given only the information available during project initiation to digital system logic and package designers. A hierarchical a...
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the Planar Package Planner is a design aid aimed at helping to form a package layout plan, given only the information available during project initiation to digital system logic and package designers. A hierarchical approach is adopted, and a clustering program makes possible use of the layout scheme for bottom-up as well as top-down design. the layout plan for an experimental microprocessor is worked out as an example of the method.
IDL is a hardware design language in use in the VLSI environment. It incorporates a significant number of high-level features such as groups, subroutines, and labels and is particularly well adapted to dealing with pa...
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IDL is a hardware design language in use in the VLSI environment. It incorporates a significant number of high-level features such as groups, subroutines, and labels and is particularly well adapted to dealing with parallelism at the hardware level. In addition to being human intelligible (and therefore appropriate as a documentation medium), IDL code can be used to generate 2-level logic which, under the IDL system, can be manipulated in a number of ways, including product term factoring and minimization, feedback minimization, partitioning, merging, and verification. the IDL system contains several simulators that are driven by IDL code. the most common embodiment of IDL output in hardware is a PLA.
the development of the IBM 3081 established the methodology for designinc and manufacturing a high-performance computer from an LSI chip technology. the high density packaging of the LSI chip is used to minimize inter...
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the development of the IBM 3081 established the methodology for designinc and manufacturing a high-performance computer from an LSI chip technology. the high density packaging of the LSI chip is used to minimize interconnections and to support a fast machine cycle time. this paper will describe the methods used and will highlight some of the design problems that were solved, to offer an understanding of the challenges that LSI brings to the design cycle.
Due to the nature of chip design, the Very Large-Scale Integrated (VLSI) design data base is constantly changing. the changes may be caused by logical or physical design activities. In either case, there is a need to ...
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Due to the nature of chip design, the Very Large-Scale Integrated (VLSI) design data base is constantly changing. the changes may be caused by logical or physical design activities. In either case, there is a need to make sure that no matter what happens, the data base remains valid. this paper discusses a system which uses an AUtomated Data Integrity Technique (AUDIT) to eliminate errors prior to hardware build.
the processes for design and release of LSI chips, thermal conduction modules (TCMs), and boards on the IBM 3081 Processor are highly automated, using the Engineering Design System. this paper describes the automated ...
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the processes for design and release of LSI chips, thermal conduction modules (TCMs), and boards on the IBM 3081 Processor are highly automated, using the Engineering Design System. this paper describes the automated and manual operations involved in the process of design and release of the various packaging levels to Manufacturing for fabrication and test. the Engineering Design System (EDS) includes a data base of programs and rules for the operations involved in designing and documenting a product. the design system contains all rules, definitions, and programming requirements for system design and complete data transfer to Manufacturing and testing.
the Manufacturing Release Processing System for handling the dual design methodology employed by IBM in the design of the 3081 is described in this paper. this methodology consists of (Part 1) the design of basic buil...
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the Manufacturing Release Processing System for handling the dual design methodology employed by IBM in the design of the 3081 is described in this paper. this methodology consists of (Part 1) the design of basic building blocks, such as standard circuits and structured gate arrays, on which these standard circuits can be placed and interconnected during (Part 2), when numerous unique devices are designed to perform the various logical functions within the processor. this dual design methodology created some difficult challenges to IBM's CAD/CAM system designers. this paper focuses on the automated release process and how it meets the specific challenges of processing large volumes of design data in the minimum time demanded by fast, controlled implementation of engineering changes.
PROCEEDINGS INCLUDES 285 PAPERS thAT ARE GROUPED INTO 35 SECTIONS DEALING WIth MAGNETIC PRINTING, RECORDING PROCESSES, BUBBLE MEMORIES, COMPUTER MEthODS IN MAGNETICS, AMORPHOUS ALLOYS, PERMANENT MAGNETS, BUBBLE DEVICE...
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PROCEEDINGS INCLUDES 285 PAPERS thAT ARE GROUPED INTO 35 SECTIONS DEALING WIth MAGNETIC PRINTING, RECORDING PROCESSES, BUBBLE MEMORIES, COMPUTER MEthODS IN MAGNETICS, AMORPHOUS ALLOYS, PERMANENT MAGNETS, BUBBLE DEVICES AND PROCESSING, RECORDING SYSTEMS, BUBBLE PHYSICS, MAGNETIC SEPARATION, IRON SILICON AND RELATED ALLOYS, RECORDING HEADS, ION IMPLANTED BUBBLES, SOFT MATERIALS, MICROWAVE MATERIALS, RECORDING MEDIA, BUBBLE DEVICES, DOMAINS AND WALLS, SOFT FERRITES, MAGNETOOPTICS, EDDY CURRENT AND FIELD CALCULATIONS, POWER AND TRANSFORMERS, MAGNETOMETRY, COMPUTER-AIDED DESIGN OF ELECTROMAGNETIC DEVICES, AND SUPERCONDUCTORS. TOPICS CONSIDERED INCLUDE: GARNETS, TAPE RECORDERS, MAGNETIZATION, MAGNETOSTATICS, thIN FILMS, ELECTRIC MACHINERY, HYSTERESIS, MAGNETIC TAPE, NUCLEAR FUELS, MAGNETIC CORES, CRYSTALS, SPUTTERING, ORE TREATMENT, DIGITAL AND MAGNETIC MEMORIES, COILS, COMPUTER SIMULATION, SENSORS, TRANSDUCERS, LASERS, logic DEVICES, MAGNETIC CIRCUITS, MAGNETIC RESONANCE PIGMENTS, IMAGE PROCESSING, VIDEO RECORDING, MAGNETIC FIELDS, NUCLEAR REACTORS, SOLENOIDS, SEWAGE TREATMENT, EQUALIZERS, ELECTRIC FILTERS, logic CIRCUITS, ANDVARIOUS ALLOYS AND COMPOUNDS HAVING MAGNETIC CHARACTERISTICS. ALL PAPERS ARE ABSTRACTED SEPARATELY.
PROCEEDINGS INCLUDES 285 PAPERS thAT ARE GROUPED INTO 35 SECTIONS DEALING WIth MAGNETIC PRINTING, RECORDING PROCESSES, BUBBLE MEMORIES, COMPUTER MEthODS IN MAGNETICS, AMORPHOUS ALLOYS, PERMANENT MAGNETS, BUBBLE DEVICE...
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PROCEEDINGS INCLUDES 285 PAPERS thAT ARE GROUPED INTO 35 SECTIONS DEALING WIth MAGNETIC PRINTING, RECORDING PROCESSES, BUBBLE MEMORIES, COMPUTER MEthODS IN MAGNETICS, AMORPHOUS ALLOYS, PERMANENT MAGNETS, BUBBLE DEVICES AND PROCESSING, RECORDING SYSTEMS, BUBBLE PHYSICS, MAGNETIC SEPARATION, IRON SILICON AND RELATED ALLOYS, RECORDING HEADS, ION IMPLANTED BUBBLES, SOFT MATERIALS, MICROWAVE MATERIALS, RECORDING MEDIA, BUBBLE DEVICES, DOMAINS AND WALLS, SOFT FERRITES, MAGNETOOPTICS, EDDY CURRENT AND FIELD CALCULATIONS, POWER AND TRANSFORMERS, MAGNETOMETRY, COMPUTER-AIDED DESIGN OF ELECTROMAGNETIC DEVICES, AND SUPERCONDUCTORS. TOPICS CONSIDERED INCLUDE: GARNETS, TAPE RECORDERS, MAGNETIZATION, MAGNETOSTATICS, thIN FILMS, ELECTRIC MACHINERY, HYSTERESIS, MAGNETIC TAPE, NUCLEAR FUELS, MAGNETIC CORES, CRYSTALS, SPUTTERING, ORE TREATMENT, DIGITAL AND MAGNETIC MEMORIES, COILS, COMPUTER SIMULATION, SENSORS, TRANSDUCERS, LASERS, logic DEVICES, MAGNETIC CIRCUITS, MAGNETIC RESONANCE PIGMENTS, IMAGE PROCESSING, VIDEO RECORDING, MAGNETIC FIELDS, NUCLEAR REACTORS, SOLENOIDS, SEWAGE TREATMENT, EQUALIZERS, ELECTRIC FILTERS, logic CIRCUITS, ANDVARIOUS ALLOYS AND COMPOUNDS HAVING MAGNETIC CHARACTERISTICS. ALL PAPERS ARE ABSTRACTED SEPARATELY.
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