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检索条件"任意字段=2003 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 560 条记录，以下是181-190 订阅

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POSTER: LB-HM: Load Balance-Aware Data Placement on Heterogeneous Memory for Task-parallel HPC Applications 27

POSTER: LB-HM: Load Balance-Aware Data Placement on Heteroge...

引用

27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Xie, Zhen Liu, Jie Ma, Sam Li, Jiajia Li, Dong Univ Calif Merced CA USA Coll William Mary Williamsburg WA USA

ISBN: (纸本)9781450392044

The emergence of heterogeneous memory (HM) provides a cost-effective and high-performance solution to memory-consuming HPC applications. However, using HM, wisely migrating data objects on it is critical for high performance. In this work, we introduce a load balance-aware page management system, named LB-HM. LB-HM introduces task semantics during memory profiling, rather than being application-agnostic. Evaluating with a set of memory-consuming HPC applications, we show that we show that LB-HM reduces existing load imbalance and leads to an average of 17.1% and 15.4% (up to 26.0% and 23.2%) performance improvement, compared with a hardware-based solution and an industry-quality software-based solution on Optane-based HM.

关键词： Semantics

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AUTOGEN: Automatic Discovery of Cache-Oblivious parallel Recursive Algorithms for Solving Dynamic Programs 16

AUTOGEN: Automatic Discovery of Cache-Oblivious Parallel Rec...

引用

21st acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Chowdhury, Rezaul Ganapathi, Pramod Tithi, Jesmin Jahan Bachmeier, Charles Kuszmaul, Bradley C. Leiserson, Charles E. Solar-Lezama, Armando Tang, Yuan SUNY Stony Brook Dept Comp Sci Stony Brook NY 11794 USA MIT Comp Sci & Artificial Intelligence Lab Cambridge MA 02139 USA Fudan Univ Shanghai Key Lab Intelligent Informat Proc Sch Software Shanghai Peoples R China

ISBN: (纸本)9781450340922

We present AUTOGEN-an algorithm that for a wide class of dynamic programming (DP) problems automatically discovers highly efficient cache-oblivious parallel recursive divide-and-conquer algorithms from inefficient iterative descriptions of DP recurrences. AUTOGEN analyzes the set of DP table locations accessed by the iterative algorithm when run on a DP table of small size, and automatically identifies a recursive access pattern and a corresponding provably correct recursive algorithm for solving the DP recurrence. We use AUTOGEN to autodiscover efficient algorithms for several well-known problems. Our experimental results show that several autodiscovered algorithms significantly outperform parallel looping and tiled loop-based algorithms. Also these algorithms are less sensitive to fluctuations of memory and bandwidth compared with their looping counterparts, and their running times and energy profiles remain relatively more stable. To the best of our knowledge, AUTOGEN is the first algorithm that can automatically discover new nontrivial divide-and-conquer algorithms.

关键词： AutoGen automatic discovery dynamic programming recursive divide-and-conquer cache-efficient parallel cacheoblivious energy-efficient cache-adaptive

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Scaling LAPACK Panel Operations Using parallel Cache Assignment

Scaling LAPACK Panel Operations Using Parallel Cache Assignm...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Castaldo, Anthony M. Whaley, R. Clint Univ Texas San Antonio Dept Comp Sci San Antonio TX 78249 USA

ISBN: (纸本)9781605587080

In LAPACK many matrix operations are cast as block algorithms which iteratively process a panel using an unblocked algorithm and then update a remainder matrix using the high performance Level 3 BLAS. The Level 3 BLAS have excellent weak scaling, but panel processing tends to be bus bound, and thus scales with bus speed rather than the number of processors (p). Amdahl's law therefore ensures that as p grows, the panel computation will become the dominant cost of these LAPACK routines. Our contribution is a novel parallel cache assignment approach which we show scales well with p. We apply this general approach to the QR and LU panel factorizations on two commodity 8-core platforms with very different cache structures, and demonstrate superlinear panel factorization speedups on both machines. Other approaches to this problem demand complicated reformulations of the computational approach, new kernels to be tuned, new mathematics, an inflation of the high-order flop count, and do not perform as well. By demonstrating a straight-forward alternative that avoids all of these contortions and scales with p, we address a critical stumbling block for dense linear algebra in the age of massive parallelism.

关键词： ATLAS LAPACK QR LU factorization parallel multicore multi-core GPU

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Keep calm and react with foresight: strategies for low-latency and energy-efficient elastic data stream processing 16

Keep calm and react with foresight: strategies for low-laten...

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21st acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： De Matteis, Tiziano Mencagli, Gabriele Univ Pisa Dept Comp Sci Largo BPontecorvo 3 I-56127 Pisa Italy

ISBN: (纸本)9781450340922

This paper addresses the problem of designing scaling strategies for elastic data stream processing. Elasticity allows applications to rapidly change their configuration on-the-fly (e.g., the amount of used resources) in response to dynamic workload fluctuations. In this work we face this problem by adopting the Model Predictive Control technique, a control-theoretic method aimed at finding the optimal application configuration along a limited prediction horizon in the future by solving an online optimization problem. Our control strategies are designed to address latency constraints, using Queueing Theory models, and energy consumption by changing the number of used cores and the CPU frequency through the Dynamic Voltage and Frequency Scaling (DVFS) support available in the modern multicore CPUs. The proactive capabilities, in addition to the latency- and energy-awareness, represent the novel features of our approach. To validate our methodology, we develop a thorough set of experiments on a high-frequency trading application. The results demonstrate the high-degree of flexibility and configurability of our approach, and show the effectiveness of our elastic scaling strategies compared with existing state-of-the-art techniques used in similar scenarios.

关键词： Data Stream Processing Elasticity Multicore programming Model Predictive Control DVFS

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PAM: parallel Augmented Maps 18

PAM: Parallel Augmented Maps

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23rd acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Sun, Yihan Ferizovic, Daniel Belloch, Guy E. Carnegie Mellon Univ Pittsburgh PA 15213 USA Karlsruhe Inst Technol Karlsruhe Germany

ISBN: (纸本)9781450349826

Ordered (key-value) maps are an important and widely-used data type for large-scale data processing frameworks. Beyond simple search, insertion and deletion, more advanced operations such as range extraction, filtering, and bulk updates form a critical part of these frameworks. We describe an interface for ordered maps that is augmented to support fast range queries and sums, and introduce a parallel and concurrent library called PAM (parallel Augmented Maps) that implements the interface. The interface includes a wide variety of functions on augmented maps ranging from basic insertion and deletion to more interesting functions such as union, intersection, filtering, extracting ranges, splitting, and range-sums. We describe algorithms for these functions that are efficient both in theory and practice. As examples of the use of the interface and the performance of PAM we apply the library to four applications: simple range sums, interval trees, 2D range trees, and ranked word index searching. The interface greatly simplifies the implementation of these data structures over direct implementations. Sequentially the code achieves performance that matches or exceeds existing libraries designed specially for a single application, and in parallel our implementation gets speedups ranging from 40 to 90 on 72 cores with 2-way hyperthreading.

关键词： Data handling

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Shared-memory performance profiling 97

Shared-memory performance profiling

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Proceedings of the 1997 6th acm sigplan symposium on principles and practice of parallel programming

作者： Xu, Zhichen Larus, James R. Miller, Barton P. Univ of Wisconsin Madison WI United States

ISBN: (纸本)9780897919067

This paper describes a new approach to finding performance bottlenecks in shared-memory parallel programs and its embodiment in the Paradyn parallel Performance Tools running with the Blizzard fine-grain distributed shared memory system. This approach exploits the underlying system's cache coherence protocol to detect data sharing patterns that indicate potential performance bottlenecks and presents performance measurements in a data-centric manner. As a demonstration, Paradyn helped us improve the performance of a new shared-memory application program by a factor of four.

关键词： parallel processing systems

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parallel programming with big operators 13

Parallel programming with big operators

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18th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2013

作者： Park, Changhee Steele Jr., Guy L. Tristan, Jean-Baptiste KAIST Seoul Korea Republic of Oracle Labs. Burlington MA United States

ISBN: (纸本)9781450319225

In the sciences, it is common to use the so-called "big operator" notation to express the iteration of a binary operator (the reducer) over a collection of values. Such a notation typically assumes that the reducer is associative and abstracts the iteration process. Consequently, from a programming point-of-view, we can organize the reducer operations to minimize the depth of the overall reduction, allowing a potentially parallel evaluation of a big operator expression. We believe that the big operator notation is indeed an effective construct to express parallel computations in the Generate/Map/Reduce programming model, and our goal is to introduce it in programming languages to support parallel programming. The effective definition of such a big operator expression requires a simple way to generate elements, and a simple way to declare algebraic properties of the reducer (such as its identity, or its commutativity). In this poster, we want to present an extension of Scala with support for big operator expressions. We show how big operator expressions are defined and how the API is organized to support the simple definition of reducers with their algebraic properties. © 2013 Authors.

关键词： parallel programming

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Leveraging parallel Nesting in Transactional Memory

Leveraging Parallel Nesting in Transactional Memory

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Barreto, Joao Dragojevic, Aleksandar Ferreira, Paulo Guerraoui, Rachid Kapalka, Michal Univ Tecn Lisboa INESC ID Lisbon Portugal Swiss Fed Inst Technol CH-1015 Lausanne Switzerland

ISBN: (纸本)9781605587080

Exploiting the emerging reality of affordable multi-core architectures goes through providing programmers with simple abstractions that would enable them to easily turn their sequential programs into concurrent ones that expose as much parallelism as possible. While transactional memory promises to make concurrent programming easy to a wide programmer community, current implementations either disallow nested transactions to run in parallel or do not scale to arbitrary parallel nesting depths. This is an important obstacle to the central goal of transactional memory, as programmers can only start parallel threads in restricted parts of their code. This paper addresses the intrinsic difficulty behind the support for parallel nesting in transactional memory, and proposes a novel solution that, to the best of our knowledge, is the first practical solution to meet the lowest theoretical upper bound known for the problem. Using a synthetic workload configured to test parallel transactions on a multi-core machine, a practical implementation of our algorithm yields substantial speed-ups (up to 22x with 33 threads) relatively to serial nesting, and shows that the time to start and commit transactions, as well as to detect conflicts, is independent of nesting depth.

关键词： Algorithms Nested parallel programs fork-join work-stealing transactional memory

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POSTER: Towards OmpSs-2 and OpenACC Interoperation 27

POSTER: Towards OmpSs-2 and OpenACC Interoperation

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Korakitis, Orestis De Gonzalo, Simon Garcia Guidotti, Nicolas Barreto, Joao Pedro Monteiro, Jose C. Pena, Antonio J. Barcelona Supercomputing Ctr Barcelona Spain Univ Lisbon Inst Super Tecnico INESC ID Lisbon Portugal

ISBN: (纸本)9781450392044

The increasing demand in HPC to utilize accelerators has motivated the development of pragma-based directives to target these devices. OmpSs-2 and OpenACC are both directive-based solutions that allow application programmers to utilize accelerators. The two leverage distinct types of parallelism: task parallelism and data parallelism, respectively. Non-trivial scientific applications can benefit from both types of available parallelism. However, the combination of pragma-based models is difficult to coordinate, as both assume full control and are unaware of each other at runtime. We propose an interoperation mechanism to enable novel composability across pragma-based programming models. We study and propose a clear separation of duties and implement our approach by augmenting the OmpSs-2 programming model, compiler and runtime to support OmpSs-2 + OpenACC programming.

关键词： programming Productivity Data-flow Paradigm Runtime Scheduling Code Transformation parallelism GPU

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Communication-Avoiding parallel Minimum Cuts and Connected Components 18

Communication-Avoiding Parallel Minimum Cuts and Connected C...

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23rd acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Gianinazzi, Lukas Kalvoda, Pavel De Palma, Alessandro Besta, Maciej Hoefler, Torsten Swiss Fed Inst Technol Dept Comp Sci Zurich Switzerland Google Inc Mountain View CA USA

ISBN: (纸本)9781450349826

We present novel scalable parallel algorithms for finding global minimum cuts and connected components, which are important and fundamental problems in graph processing. To take advantage of future massively parallel architectures, our algorithms are communication-avoiding: they reduce the costs of communication across the network and the cache hierarchy. The fundamental technique underlying our work is the randomized sparsification of a graph: removing a fraction of graph edges, deriving a solution for such a sparsified graph, and using the result to obtain a solution for the original input. We design and implement sparsification with O(1) synchronization steps. Our global minimum cut algorithm decreases communication costs and computation compared to the state-of-the-art, while our connected components algorithm incurs few cache misses and synchronization steps. We validate our approach by evaluating MPI implementations of the algorithms on a petascale supercomputer. We also provide an approximate variant of the minimum cut algorithm and show that it approximates the exact solutions well while using a fraction of cores in a fraction of time.

关键词： parallel Computing Minimum cuts Randomized Algorithms Graph Algorithms

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