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检索条件"任意字段=2003 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 560 条记录，以下是261-270 订阅

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Ordered vs. Unordered: a Comparison of parallelism and Work-efficiency in Irregular Algorithms 11

Ordered <i>vs</i>. Unordered: a Comparison of Parallelism an...

引用

16th acm symposium on principles and practice of parallel programming

作者： Hassaan, M. Amber Burtscher, Martin Pingali, Keshav Texas State Univ San Marcos Dept Comp Sci San Marcos TX USA Univ Texas Austin Dept Comp Sci Austin TX 78712 USA

ISBN: (纸本)9781450301190

Outside of computational science, most problems are formulated in terms of irregular data structures such as graphs, trees and sets. Unfortunately, we understand relatively little about the structure of parallelism and locality in irregular algorithms. In this paper, we study several algorithms for four such problems: discrete-event simulation, single-source shortest path, breadth-first search, and minimal spanning trees. We show that these algorithms can be classified into two categories that we call unordered and ordered, and demonstrate experimentally that there is a trade-off between parallelism and work efficiency: unordered algorithms usually have more parallelism than their ordered counterparts for the same problem, but they may also perform more work. Nevertheless, our experimental results show that unordered algorithms typically lead to more scalable implementations, demonstrating that less work-efficient irregular algorithms may be better for parallel execution.

关键词： Irregular Algorithms Amorphous Data-parallelism parallel Breadth-first Search Single-Source Shortest Path Discrete-Event Simulation Minimal Spanning Tree Multicore processors Galois system Algorithms Languages Performance

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The STAPL parallel Container Framework 11

The STAPL Parallel Container Framework

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16th acm symposium on principles and practice of parallel programming

作者： Tanase, Gabriel Buss, Antal Fidel, Adam Harshvardhan Papadopoulos, Ioannis Pearce, Olga Smith, Timmie Thomas, Nathan Xu, Xiabing Mourad, Nedal Vu, Jeremy Bianco, Mauro Amato, Nancy M. Rauchwerger, Lawrence Texas A&M Univ Parasol Lab Dept Comp Sci & Engn College Stn TX 77843 USA

ISBN: (纸本)9781450301190

The Standard Template Adaptive parallel Library (STAPL) is a parallel programming infrastructure that extends C++ with support for parallelism. It includes a collection of distributed data structures called pContainers that are thread-safe, concurrent objects, i.e., shared objects that provide parallel methods that can be invoked concurrently. In this work, we present the STAPL parallel Container Framework (PCF), that is designed to facilitate the development of generic parallel containers. We introduce a set of concepts and a methodology for assembling a pContainer from existing sequential or parallel containers, without requiring the programmer to deal with concurrency or data distribution issues. The PCF provides a large number of basic parallel data structures (e.g., pArray, pList, pVector, pMatrix, pGraph, pMap, pSet). The PCF provides a class hierarchy and a composition mechanism that allows users to extend and customize the current container base for improved application expressivity and performance. We evaluate STAPL pContainer performance on a CRAY XT4 massively parallel system and show that pContainer methods, generic pAlgorithms, and different applications provide good scalability on more than 16,000 processors.

关键词： parallel programming Languages Libraries Data Structures Languages Design Performance

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COREMU: A Scalable and Portable parallel Full-system Emulator 11

COREMU: A Scalable and Portable Parallel Full-system Emulato...

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16th acm symposium on principles and practice of parallel programming

作者： Wang, Zhaoguo Liu, Ran Chen, Yufei Wu, Xi Chen, Haibo Zhang, Weihua Zang, Binyu Fudan Univ Parallel Proc Inst Shanghai Peoples R China

ISBN: (纸本)9781450301190

This paper presents the open-source COREMU, a scalable and portable parallel emulation framework that decouples the complexity of parallelizing full-system emulators from building a mature sequential one. The key observation is that CPU cores and devices in current (and likely future) multiprocessors are loosely-coupled and communicate through well-defined interfaces. Based on this observation, COREMU emulates multiple cores by creating multiple instances of existing sequential emulators, and uses a thin library layer to handle the inter-core and device communication and synchronization, to maintain a consistent view of system resources. COREMU also incorporates lightweight memory transactions, feedback-directed scheduling, lazy code invalidation and adaptive signal control to provide scalable performance. To make COREMU useful in practice, we also provide some preliminary tools and APIs that can help programmers to diagnose performance problems and (concurrency) bugs. A working prototype, which reuses the widely-used QEMU as the sequential emulator, is with only 2500 lines of code (LOCs) changes to QEMU. It currently supports x64 and ARM platforms, and can emulates up to 255 (1) cores running commodity OSes with practical performance, while QEMU cannot scale above 32 cores. A set of performance evaluation against QEMU indicates that, COREMU has negligible uniprocessor emulation overhead, performs and scales significantly better than QEMU. We also show how COREMU could be used to diagnose performance problems and concurrency bugs of both OS kernel and parallel applications.

关键词： Full-system Emulator parallel Emulator Multicore Design Experimentation Performance

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Lifeline-based Global Load Balancing 11

Lifeline-based Global Load Balancing

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16th acm symposium on principles and practice of parallel programming

作者： Saraswat, Vijay Kambadur, Prabhanjan Kodali, Sreedhar Grove, David Krishnamoorthy, Sriram Pacific NW Natl Lab Richland WA 99352 USA

ISBN: (纸本)9781450301190

On shared-memory systems, Cilk-style work-stealing [5] has been used to effectively parallelize irregular task-graph based applications such as Unbalanced Tree Search (UTS) [24, 28]. There are two main difficulties in extending this approach to distributed memory. In the shared memory approach, thieves (nodes without work) constantly attempt to asynchronously steal work from randomly chosen victims until they find work. In distributed memory, thieves cannot autonomously steal work from a victim without disrupting its execution. When work is sparse, this results in performance degradation. In essence, a direct extension of traditional work-stealing to distributed memory violates the work-first principle underlying work-stealing. Further, thieves spend useless CPU cycles attacking victims that have no work, resulting in system inefficiencies in multi-programmed contexts. Second, it is non-trivial to detect active distributed termination (detect that programs at all nodes are looking for work, hence there is no work). This problem is well-studied and requires careful design for good performance. Unfortunately, in most existing languages/frameworks, application developers are forced to implement their own distributed termination detection. In this paper, we develop a simple set of ideas that allow work-stealing to be efficiently extended to distributed memory. First, we introduce lifeline graphs: low-degree, low-diameter, fully-connected directed graphs. Such graphs can be constructed from k-dimensional hypercubes. When a node is unable to find work after w unsuccessful steals, it quiesces after informing the outgoing edges in its lifeline graph. Quiescent nodes do not disturb other nodes. A quiesced node is reactivated when work arrives from a lifeline, and itself shares this work with those of its incoming lifelines that are activated. Termination occurs precisely when computation at all nodes has quiesced. In a language such as X10, such passive distributed terminati

关键词： UTS global load balancing distributed computing X10 work-stealing parallel programming Algorithms Design

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A Domain-Specific Approach To Heterogeneous parallelism

A Domain-Specific Approach To Heterogeneous Parallelism

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16th acm symposium on principles and practice of parallel programming

作者： Chafi, Hassan Sujeeth, Arvind K. Brown, Kevin J. Lee, HyoukJoong Atreya, Anand R. Olukotun, Kunle Stanford Univ Pervas Parallelism Lab Stanford CA 94305 USA

Exploiting heterogeneous parallel hardware currently requires mapping application code to multiple disparate programming models. Unfortunately, general-purpose programming models available today can yield high performance but are too low-level to be accessible to the average programmer. We propose leveraging domain-specific languages (DSLs) to map high-level application code to heterogeneous devices. To demonstrate the potential of this approach we present OptiML, a DSL for machine learning. OptiML programs are implicitly parallel and can achieve high performance on heterogeneous hardware with no modification required to the source code. For such a DSL-based approach to be tractable at large scales, better tools are required for DSL authors to simplify language creation and parallelization. To address this concern, we introduce De lite, a system designed specifically for DSLs that is both a framework for creating an implicitly parallel DSL as well as a dynamic runtime providing automated targeting to heterogeneous parallel hardware. We show that OptiML running on De lite achieves single-threaded, parallel, and GPU performance superior to explicitly parallelized MATLAB code in nearly all cases.

关键词： parallel programming Domain-Specific Languages Dynamic Optimizations Languages Performance

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Proceedings of the 2009 acm sigplan symposium on principles and practice of parallel programming, PPoPP'09

Proceedings of the 2009 ACM SIGPLAN Symposium on Principles ...

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2009 acm sigplan symposium on principles and practice of parallel programming, PPoPP'09

ISBN: (纸本)9781605583976

The proceedings contain 37 papers. The topics discussed include: how much parallelism is there in irregular applications?;an efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs;Atomic Quake: using transactional memory in an interactive multiplayer game server;application-aware management of parallel simulation collections;efficient and scalable multiprocessor fair scheduling using distributed weighted round-robin;mapping parallelism to multi-cores: a machine learning based approach;serialization sets: a dynamic dependence-based parallel execution model;OpenMP to GPGPU: a compiler framework for automatic translation and optimization;comparability graph coloring for optimizing utilization of stream register files in stream processors;and solving dense linear systems on platforms with multiple hardware accelerators.

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A Domain-Specific Approach To Heterogeneous parallelism 11

A Domain-Specific Approach To Heterogeneous Parallelism

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International acm Special Interest Group on programming Languages Conference on principles and practice of Declarative programming

作者： Hassan Chafi HyoukJoong Lee Arvind K. Sujeeth Anand R. Atreya Kevin J. Brown Kunle Olukotun Pervasive Parallelism Laboratory Stanford University

ISBN: (纸本)9781450313742

Exploiting heterogeneous parallel hardware currently requires mapping application code to multiple disparate programming models. Unfortunately, general-purpose programming models available today can yield high performance but are too low-level to be accessible to the average programmer. We propose leveraging domain-specific languages (DSLs) to map high-level application code to heterogeneous devices. To demonstrate the potential of this approach we present OptiML, a DSL for machine learning. OptiML programs are implicitly parallel and can achieve high performance on heterogeneous hardware with no modification required to the source code. For such a DSL-based approach to be tractable at large scales, better tools are required for DSL authors to simplify language creation and parallelization. To address this concern, we introduce Delite, a system designed specifically for DSLs that is both a framework for creating an implicitly parallel DSL as well as a dynamic runtime providing automated targeting to heterogeneous parallel hardware. We show that OptiML running on Delite achieves single-threaded, parallel, and GPU performance superior to explicitly parallelized MATLAB code in nearly all cases.

关键词： Languages Performance parallel programming Domain-Specific Languages Dynamic Optimizations

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Proceedings of the acm sigplan symposium on principles and practice of parallel programming, PPOPP: Chairs' welcome

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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Proceedings of the acm sigplan symposium on principles and practice of parallel programming, PPOPP 2009年 iii页

作者： Reed, Daniel Sarkar, Vivek Microsoft Research Rice University

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Intra-Application Shared Cache Partitioning For Multithreaded Applications

Intra-Application Shared Cache Partitioning For Multithreade...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Muralidhara, Sai Prashanth Kandemir, Mahmut Raghavan, Padma Penn State Univ University Pk PA 16802 USA

In this paper, we address the problem of partitioning a shared cache when the executing threads belong to the same application.

ISBN: (纸本)9781605587080

In this paper, we address the problem of partitioning a shared cache when the executing threads belong to the same application.

关键词： Cache Multicore parallel Applications

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Applying the Concurrent Collections programming Model to Asynchronous parallel Dense Linear Algebra

Applying the Concurrent Collections Programming Model to Asy...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Chandramowlishwaran, Aparna Knobe, Kathleen Vuduc, Richard Georgia Inst Technol Atlanta GA 30332 USA Intel Corp Santa Clara CA 95051 USA

ISBN: (纸本)9781605587080

This poster is a case study on the application of a novel programming model, called Concurrent Collections (CnC), to the implementation of an asynchronous-parallel algorithm for computing the Cholesky factorization of dense matrices. In CnC, the programmer expresses her computation in terms of application-specific operations, partially-ordered by semantic scheduling constraints. We demonstrate the performance potential of CnC in this poster, by showing that our Cholesky implementation nearly matches or exceeds competing vendor-tuned codes and alternative programming models. We conclude that the CnC model is well-suited for expressing asynchronous-parallel algorithms on emerging multicore systems.

关键词： Algorithms Performance

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