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2003 acm sigplan symposium on principles and practice of parallel programming

作者： McDowell, Luke K. Eggers, Susan J. Gribble, Steven D. University of Washington Department of Computer Science Box 352350 Seattle WA 98195 United States

Simultaneous multithreading (SMT) represents a fundamental shift in processor capability. SMTs ability to execute multiple threads simultaneously within a single CPU offers tremendous potential performance benefits. However, the structure and behavior of software affects the extent to which this potential can be achieved. Consequently, just like the earlier arrival of multiprocessors, the advent of SMT processors prompts a needed re-evaluation of software that will run on them. This evaluation is complicated, since SMT adopts architectural features and operating costs of both its predecessors (uniprocessors and multiprocessors). The crucial task for researchers is to determine which software structures and policies - multiprocessor, uniprocessor, or neither - are most appropriate for SMT. This paper evaluates how SMT's changes to the underlying hardware affects server software, and in particular, SMT's effects on memory allocation and synchronization. Using detailed simulation of an SMT server implemented in three different thread models, we find that the default policies often provided with multiprocessor operating systems produce unacceptably low performance. For each area that we examine, we identify better policies that combine techniques from both uniprocessors and multiprocessors. We also uncover a vital aspect of multi-threaded synchronization (interaction with operating system thread scheduling) that previous research on SMT synchronization had overlooked. Overall, our results demonstrate how a few simple changes to applications' run-time support libraries can dramatically boost the performance of multi-threaded servers on SMT, without requiring modifications to the applications themselves.

关键词： parallel processing systems

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CC-MPI: A compiled communication capable MPI prototype for ethernet switched clusters 03

CC-MPI: A compiled communication capable MPI prototype for e...

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2003 acm sigplan symposium on principles and practice of parallel programming

作者： Karwande, Amit Yuan, Xin Lowenthal, David K. Dept. of Computer Science Florida State University Tallahassee FL 32306 United States Dept. of Computer Science University of Georgia Athens GA 30602 United States

ISBN: (纸本)9781581135886

Compiled communication has recently been proposed to improve communication performance for clusters of workstations. The idea of compiled communication is to apply more aggressive optimizations to communications whose information is known at compile time. Existing MPI libraries do not support compiled communication. In this paper, we present an MPI prototype, CC-MPI, that supports compiled communication on Ethernet switched clusters. The unique feature of CC-MPI is that it allows the user to manage network resources such as multicast groups directly and to optimize communications based on the availability of the communication information. CC-MPI optimizes one-to-all, one-to-many, all-to-all, and many-to-many collective communication routines using the compiled communication technique. We describe the techniques used in CC-MPI and report its performance. The results show that communication performance of Ethernet switched clusters can be significantly improved through compiled communication.

关键词： parallel processing systems

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Conditional Narrowing without Conditions 03

Conditional Narrowing without Conditions

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Fifth acm sigplan Conference on Principle and practice of Declarative programming

作者： Antoy, Sergio Brassel, Bernd Hanus, Michael Department of Computer Science Portland State University P.O. Box 751 Portland OR 97207 United States Institut für Informatik Christian-Albrechts-Univ. Kiel Olshausenstr. 40 D-24098 Kiel Germany

ISBN: (纸本)1581137052

We present a new evaluation strategy for functional logic programs described by weakly orthogonal conditional term rewriting systems. Our notion of weakly orthogonal conditional rewrite system extends a notion of Bergstra and Klop and covers a large part of programs defined by conditional equations. Our strategy combines the flexibility of logic programming (computation of solutions for logic variables) with efficient evaluation methods from functional programming. In particular, it is the first known narrowing strategy for this class of programs that evaluates ground terms deterministically. This is achieved by a transformation of conditional term rewriting systems (CTRS) into unconditional ones which is sound and complete w.r.t. the semantics of the original CTRS. We show that the transformation preserves weak orthogonality for the terms of interest. This property allows us to apply a relatively efficient evaluation strategy for weakly orthogonal unconditional term rewriting systems (parallel narrowing) on the transformed programs.

关键词： Logic programming

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Refining Weakly Outermost-Needed Rewriting and Narrowing 03

Refining Weakly Outermost-Needed Rewriting and Narrowing

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Fifth acm sigplan Conference on Principle and practice of Declarative programming

作者： Escobar, Santiago Dept. of Computer Systems Technical University of Valencia Camino de Vera s/n E-46022 Valencia Spain

ISBN: (纸本)1581137052

Outermost-needed rewriting/narrowing is a sound and complete optimal demand-driven strategy for the class of inductively sequential constructor systems. Its parallel extension (known as weakly) deals with non-inductively sequential constructor systems. In this paper, we present natural rewriting, a suitable extension of (weakly) outermost-needed rewriting which is based on a refinement of the demandness notion associated to the latter, and we extend it to narrowing. Intuitively, natural rewriting (narrowing) always reduces (narrows) the most often demanded position in a term. We formalize the strategy for left-linear constructor systems though, for the class of inductively sequential constructor systems, natural rewriting (narrowing) behaves even better than outermost-needed rewriting (narrowing) in the avoidance of failing computations. With regard to inductively sequential constructor systems, we introduce a larger class of systems called inductively sequential preserving where natural rewriting and narrowing preserve optimality for sequential parts of the program. We also provide a prototype interpreter of natural rewriting and narrowing.

关键词： Computer programming languages

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The design and implementation of a parallel array operator for the arbitrary remapping of data

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acm sigplan NOTICES 2003年第10期38卷 154-165页

作者： Deitz, SJ Chamberlain, BL Choi, SE Snyder, L Univ Washington Seattle WA 98195 USA Cray Inc Seattle WA 98104 USA Los Alamos Natl Lab Los Alamos NM 87545 USA

Gather and scatter are data redistribution functions of long-standing importance to high performance computing. In this paper, we present a highly-general array operator with powerful gather and scatter capabilities unmatched by other array languages. We discuss an efficient parallel implementation, introducing three new optimizations-schedule compression, dead array reuse, and direct communication-that reduce the costs associated with the operator's wide applicability. In our implementation of this operator in ZPL, we demonstrate performance comparable to the hand-coded Fortran + MPI versions of the NAS FT and CC benchmarks.

关键词： languages parallel programming gather scatter array languages ZPL

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User-controllable coherence for high performance shared memory multiprocessors

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acm sigplan NOTICES 2003年第10期38卷 73-83页

作者： McCurdy, C Fischer, C Univ Wisconsin Dept Comp Sci Madison WI 53706 USA

In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suitable for coarse-grained computation. However, currently only distributed address-space systems scale beyond the low hundreds of processors. In this paper we introduce a hybrid architecture that allows users to trade off local memory usage for coherence communication, making possible larger-scale shared memory architectures. We introduce a programming model and examine possible implementations of hardware mechanisms, evaluating some of the trade-offs inherent in each. Preliminary experiments on an application with particularly fine-grained communication requirements indicate that effective placement of directives can reduce coherence communication by more than a factor of 10 for 64 processors.

关键词： performance design languages parallel computation shared memory architectures distributed memory architectures irregular computation

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Using thread-level speculation to simplify manual parallelization

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acm sigplan NOTICES 2003年第10期38卷 1-12页

作者： Prabhu, MK Olukotun, K Stanford Univ Comp Syst Lab Stanford CA 94305 USA

In this paper, we provide examples of how thread-level speculation (TLS) simplifies manual parallelization and enhances its performance. A number of techniques for manual parallelization using TLS are presented and results are provided that indicate the performance contribution of each technique on seven SPEX CPU2000 benchmark applications. We also provide indications of the programming effort required to parallelize each benchmark. TLS parallelization yielded a 110% speedup on our four floating point applications and a 70% speedup on our three integer applications, while requiring only approximately 80 programmer hours and 150 lines of non-template code per application. These results support the idea that manual parallelization using TLS is an efficient way to extract fine-grain thread-level parallelism.

关键词： design algorithms performance measurement chip multiprocessor data speculation manual parallel programming multithreading feedback-driven optimization

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Exploiting task-level concurrency in a programmable network interface

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acm sigplan NOTICES 2003年第10期38卷 61-72页

作者： Kim, HY Pai, VS Rixner, S Rice Univ Houston TX 77251 USA

Programmable network interfaces provide the potential to extend the functionality of network services but lead to instruction processing overheads when compared to application-specific network interfaces. This paper aims to offset those performance disadvantages by exploiting task-level concurrency in the workload to parallelize the network interface firmware for a programmable controller with two processors. By carefully partitioning the handler procedures that process various events related to the progress of a packet, the system can minimize sharing, achieve load balance, and efficiently utilize on-chip storage. Compared to the uniprocessor firmware released by the manufacturer, the parallelized network interface firmware increases throughput by 65% for bidirectional UDP traffic of maximum-sized packets, 157% for bidirectional UDP traffic of minimum-sized packets, and 32-107% for real network services. This parallelization results in performance within 10-20% of a modem ASIC-based network interface for real network services.

关键词： experimentation, performance programmable network interface parallel programming ethernet firmware

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ARMI: An adaptive, platform independent communication library

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acm sigplan NOTICES 2003年第10期38卷 229-240页

作者： Saunders, S Rauchwerger, L Texas A&M Univ Dept Comp Sci College Stn TX 77843 USA

ARMI is a communication library that provides a framework for expressing fine-grain parallelism and mapping it to a particular machine using shared-memory and message passing library calls. The library is an advanced implementation of the RMI protocol and handles low-level details such as scheduling incoming communication and aggregating outgoing communication to coarsen parallelism when necessary. These details can be tuned for different platforms to allow user codes to achieve the highest performance possible without manual modification. ARMI is used by STAPL, our generic parallel library, to provide a portable, user transparent communication layer, We present the basic design as well as the mechanisms used in the current Pthreads/OpenMP, MPI implementations and/or a combination thereof. Performance comparisons between ARMI and explicit use of Pthreads or MPI are given on a variety of machines, including an HP V2200, SGI Origin 3800, IBM Regatta-HPC and IBM RS6000 SP cluster.

关键词： languages RMI MPI pthreads OpenMP RPC run-time system communication library parallel programming

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Phoenix: a parallel programming model for accommodating dynamically joining/leaving resources

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acm sigplan NOTICES 2003年第10期38卷 215-228页

作者： Taura, K Kaneda, K Endo, T Yonezawa, A Univ Tokyo Bunkyo Ku Tokyo 1130033 Japan PRESTO JST Kawaguchi Saitama 3320012 Japan

This paper proposes Phoenix, a programming model for writing parallel and distributed applications that accommodate dynamically joining/leaving compute resources. In the proposed model, nodes involved in an application see a large and fixed virtual node name space. They communicate via messages, whose destinations are specified by virtual node names, rather than names bound to a physical resource. We describe Phoenix API and show how it allows a transparent migration of application states, as well as dynamically joining/leaving nodes as its by-product. We also demonstrate through several application studies that Phoenix model is close enough to regular message passing, thus it is a general programming model that facilitates porting many parallel applications/algorithms to more dynamic environments. Experimental results indicate applications that have a small task migration cost can quickly take advantage of dynamically joining resources using Phoenix. Divide-and-conquer algorithms written in Phoenix achieved a good speedup with a large number of nodes across multiple LANs (120 times speedup using 169 CPUs across three LANs). We believe Phoenix provides a useful programming abstraction and platform for emerging parallel applications that must be deployed across multiple LANs and/or shared clusters having dynamically varying resource conditions.

关键词： performance parallel programming distributed programming message passing migration resource reconfiguration

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