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检索条件"任意字段=2005 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 05"

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Shangri-La: Achieving high performance from compiled network applications while enabling ease of programming

Shangri-La: Achieving high performance from compiled network...

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2005 acm sigplan conference on programming language design and implementation, pldi 05

作者： Chen, Michael K. Li, Xiao Feng Lian, Ruiqi Lin, Jason H. Liu, Lixia Liu, Tao Ju, Roy Microprocessor Technology Labs. Intel Corporation Santa Clara CA United States Intel China Research Center Ltd. Beijing China Institute of Computing Technology China Academy of Sciences Beijing China

programming network processors is challenging. To sustain high line rates, network processors have extremely tight memory access and instruction budgets. Achieving desired performance has traditionally required hand-coded assembly. Researchers have recently proposed high-level programming languages for packet processing, but the challenges of compiling these languages into code that is competitive with hand-tuned assembly remain unanswered. This paper describes the Shangri-La compiler, which accepts a packet program written in a C-like high-level language and applies scalar and specialized optimizations to generate a highly optimized binary. Hot code paths identified by profiling are mapped across processing elements to maximize processor utilization. Since our compilation target has no hardware caches, software-controlled caches are generated for frequently accessed application data structures. Packet handling optimizations significantly reduce perpacket memory access and instruction counts. Finally, a custom stack model maps stack frames to the fastest levels of the target processor's heterogeneous memory hierarchy. Binaries generated by the compiler were evaluated on the Intel 1XP2400 network processor with eight packet processing cores and eight threads per core. Our results show the importance of both traditional and specialized optimization techniques for achieving the maximum forwarding rates on three network applications, L3-Switch, MPLS and Firewall. Copyright 2005 acm.

关键词： Program processors

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A Simpler, Safer programming and Execution Model for Intermittent Systems 15

A Simpler, Safer Programming and Execution Model for Intermi...

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36th acm sigplan conference on programming language design and implementation

作者： Lucia, Brandon Ransford, Benjamin Carnegie Mellon Univ Pittsburgh PA 15213 USA Univ Washington Seattle WA 98195 USA

ISBN: (纸本)9781450334686

Energy harvesting enables novel devices and applications without batteries, but intermittent operation under energy harvesting poses new challenges to memory consistency that threaten to leave applications in failed states not reachable in continuous execution. This paper presents analytical models that aid in reasoning about intermittence. Using these, we develop DINO (Death Is Not an Option), a programming and execution model that simplifies programming for intermittent systems and ensures volatile and nonvolatile data consistency despite near-constant interruptions. DINO is the first system to address these consistency problems in the context of intermittent execution. We evaluate DINO on three energy-harvesting hardware platforms running different applications. The applications fail and exhibit error without DINO, but run correctly with DINO's modest 1.8-2.7x run-time overhead. DINO also dramatically simplifies programming, reducing the set of possible failure-related control transfers by 5-9x.

关键词： Intermittent computing

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Exploring and Enforcing Security Guarantees via Program Dependence Graphs 15

Exploring and Enforcing Security Guarantees via Program Depe...

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36th acm sigplan conference on programming language design and implementation

作者： Johnson, Andrew Waye, Lucas Moore, Scott Chong, Stephen MIT Lincoln Lab Cambridge MA 02139 USA Harvard Univ Cambridge MA 02138 USA

ISBN: (纸本)9781450334686

We present PIDGIN, a program analysis and understanding tool that enables the specification and enforcement of precise application-specific information security guarantees. PIDGIN also allows developers to interactively explore the information flows in their applications to develop policies and investigate counter-examples. PIDGIN combines program dependence graphs (PDGs), which precisely capture the information flows in a whole application, with a custom PDG query language. Queries express properties about the paths in the PDG;because paths in the PDG correspond to information flows in the application, queries can be used to specify global security policies. PIDGIN is scalable. Generating a PDG for a 330k line Java application takes 90 seconds, and checking a policy on that PDG takes under 14 seconds. The query language is expressive, supporting a large class of precise, application-specific security guarantees. Policies are separate from the code and do not interfere with testing or development, and can be used for security regression testing. We describe the design and implementation of PIDGIN and report on using it: (1) to explore information security guarantees in legacy programs;(2) to develop and modify security policies concurrently with application development;and (3) to develop policies based on known vulnerabilities.

关键词： Application-specific security program dependence graph graph query language

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Efficient discovery of regular stride patterns in irregular programs and its use in compiler prefetching

Efficient discovery of regular stride patterns in irregular ...

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conference on programming language design and implementation (pldi 02)

作者： Wu, YF Intel Labs Programming Syst Res Santa Clara CA 95052 USA

Irregular data references are difficult to prefetch, as the future memory address of a load instruction is hard to anticipate by a compiler. However, recent studies as well as our experience indicate that some important load instructions in irregular programs contain stride access patterns. Although the load instructions with stride patterns are difficult to identify with static compiler techniques, we developed an efficient profiling method to discover these load instructions. The new profiling method integrates the profiling for stride information and the traditional profiling for edge frequency into a single profiling pass. The integrated profiling pass runs only 17% slower than the frequency profiling alone. The collected stride information helps the compiler to identify load instructions with stride patterns that can be prefetched efficiently and beneficially. We implemented the new profiling and prefetching techniques in a research compiler for Itanium(TM) Processor Family (IPF), and obtained significant performance improvement for the SPECINT2000 programs running on Itanium machines. For example, we achieved a 1.59x speedup for *** 1.14x for ***, and 1.08x for ***. We also showed that the performance gain is stable across input data sets. These benefits make the new profiling and prefetching techniques suitable for production compilers.

关键词： languages performance design experimentation algorithms integrated stride and frequency profiling data prefetching strongly single-strided loads phased multi-strided loads performance evaluation

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MixT: A language for Mixing Consistency in Geodistributed Transactions 2018

MixT: A Language for Mixing Consistency in Geodistributed Tr...

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39th acm sigplan conference on programming language design and implementation (pldi)

作者： Milano, Matthew Myers, Andrew C. Cornell Univ Dept Comp Sci Ithaca NY 14853 USA

ISBN: (纸本)9781450356985

programming concurrent, distributed systems is hard-especially when these systems mutate shared, persistent state replicated at geographic scale. To enable high availability and scalability, a new class of weakly consistent data stores has become popular. However, some data needs strong consistency. To manipulate both weakly and strongly consistent data in a single transaction, we introduce a new abstraction: mixed-consistency transactions, embodied in a new embedded language, MixT. Programmers explicitly associate consistency models with remote storage sites;each atomic, isolated transaction can access a mixture of data with different consistency models. Compile-time information-flow checking, applied to consistency models, ensures that these models are mixed safely and enables the compiler to automatically partition transactions. New run-time mechanisms ensure that consistency models can also be mixed safely, even when the data used by a transaction resides on separate, mutually unaware stores. Performance measurements show that despite their stronger guarantees, mixed-consistency transactions retain much of the speed of weak consistency, significantly outperforming traditional serializable transactions.

关键词： Consistency Transactions Information Flow

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Halide: A language and Compiler for Optimizing Parallelism, Locality, and Recomputation in Image Processing Pipelines

Halide: A Language and Compiler for Optimizing Parallelism, ...

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34th acm sigplan conference on programming language design and implementation (pldi)

作者： Ragan-Kelley, Jonathan Barnes, Connelly Adams, Andrew Paris, Sylvain Durand, Fredo Amarasinghe, Saman MIT CSAIL United States Adobe United States

ISBN: (纸本)9781450320146

Image processing pipelines combine the challenges of stencil computations and stream programs. They are composed of large graphs of different stencil stages, as well as complex reductions, and stages with global or data-dependent access patterns. Because of their complex structure, the performance difference between a naive implementation of a pipeline and an optimized one is often an order of magnitude. Efficient implementations require optimization of both parallelism and locality, but due to the nature of stencils, there is a fundamental tension between parallelism, locality, and introducing redundant recomputation of shared values. We present a systematic model of the tradeoff space fundamental to stencil pipelines, a schedule representation which describes concrete points in this space for each stage in an image processing pipeline, and an optimizing compiler for the Halide image processing language that synthesizes high performance implementations from a Halide algorithm and a schedule. Combining this compiler with stochastic search over the space of schedules enables terse, composable programs to achieve state-of-the-art performance on a wide range of real image processing pipelines, and across different hardware architectures, including multicores with SIMD, and heterogeneous CPU+GPU execution. From simple Halide programs written in a few hours, we demonstrate performance up to 5x faster than hand-tuned C, intrinsics, and CUDA implementations optimized by experts over weeks or months, for image processing applications beyond the reach of past automatic compilers.

关键词： domain specific language compiler image processing locality parallelism redundant computation optimization GPU vectorization

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A framework for interprocedural optimization in the presence of dynamic class loading

A framework for interprocedural optimization in the presence...

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acm sigplan' 00 conference on programming language design and implementation (pldi)

作者： Sreedhar, VC Burke, M Choi, JD IBM TJ Watson Res Ctr Yorktown Heights NY 10598 USA

Dynamic class loading during program execution in the Java(TM) programming language is an impediment for generating code that is as efficient as code generated using static whole-program analysis and optimization. Whole-program analysis and optimization is possible for languages, such as C++, that do not allow new classes and/or methods to be loaded during program execution. One solution for performing whole-program analysis and avoiding incorrect execution after a new class is loaded is to invalidate and recompile affected methods. Runtime invalidation and recompilation mechanisms can be expensive in both space and time, and, therefore, generally restrict optimization. To address these drawbacks, we propose a new framework, called the errant analysis framework, for interprocedural optimization of programs that support dynamic class (or method) loading. Given a set of classes comprising the closed world, we perform an offline static analysis which partitions references into two categories: (1) unconditionally extant references which point only to objects whose runtime type is guaranteed to be in the closed world;and (2) conditionally extant references which point to objects whose runtime type is not guaranteed to be in the closed world. Optimizations solely dependent on the first category can be statically performed, and are guaranteed to be correct even with any future class/method loading. Optimizations dependent on the second category are guarded by dynamic tests, called extane safety tests, for correct execution behavior. We describe the properties for extant safety tests, and provide algorithms for their generation and placement.

关键词： Java programming language

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A new perspective on processing-in-memory architecture design 13

A new perspective on processing-in-memory architecture desig...

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acm sigplan Workshop on Memory Systems Performance and Correctness, MSPC 2013, co-located with the 34th annual acm sigplan conference on programming language design and implementation, pldi

作者： Zhang, Dong Ping Jayasena, Nuwan Lyashevsky, Alexander Greathouse, Joseph Meswani, Mitesh Nutter, Mark Ignatowski, Mike Research Group AMD CA United States

ISBN: (纸本)9781450321037

As computation becomes increasingly limited by data movement and energy consumption, exploiting locality throughout the memory hierarchy becomes critical for maintaining the performance scaling that many have come to expect from the computing industry. Moving computation closer to main memory presents an opportunity to reduce the overheads associated with data movement. We explore the potential of using 3D die stacking to move memory-intensive computations closer to memory. This approach to processing-in-memory addresses some drawbacks of prior research on in-memory computing and appears commercially viable in the foreseeable future. We show promising early results from this approach and identify areas that are in need of research to unlock its full potential. © 2013 acm.

关键词： Memory architecture

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Synthesising Graphics Card Programs from DSLs 12

Synthesising Graphics Card Programs from DSLs

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33rd acm sigplan conference on programming language design and implementation

作者： Cartey, Luke Lyngsoe, Rune de Moor, Oege Univ Oxford Oxford OX1 2JD England

ISBN: (纸本)9781450312059

Over the last five years, graphics cards have become a tempting target for scientific computing, thanks to unrivaled peak performance, often producing a runtime speed-up of x10 to x25 over comparable CPU solutions. However, this increase can be difficult to achieve, and doing so often requires a fundamental rethink. This is especially problematic in scientific computing, where experts do not want to learn yet another architecture. In this paper we develop a method for automatically parallelising recursive functions of the sort found in scientific papers. Using a static analysis of the function dependencies we identify sets - partitions - of independent elements, which we use to synthesise an efficient GPU implementation using polyhedral code generation techniques. We then augment our language with DSL extensions to support a wider variety of applications, and demonstrate the effectiveness of this with three case studies, showing significant performance improvement over equivalent CPU methods, and similar efficiency to hand-tuned GPU implementations.

关键词： language Performance gpu scientific applications program synthesis dynamic programming

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implementation of complete, asynchronous, distributed garbage collection

Implementation of complete, asynchronous, distributed garbag...

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Proceedings of the 1998 Annual acm sigplan conference on programming language design and implementation, pldi

作者： Le Fessant, Fabrice Piumarta, Ion Shapiro, Marc INRIA Roquencourt Le Chesnay France

Most existing reference-based distributed object systems include some kind of acyclic garbage collection, but fail to provide acceptable collection of cyclic garbage. Those that do provide such GC currently suffer from one or more problems: synchronous operation, the need for expensive global consensus or termination algorithms, susceptibility to communication problems, or an algorithm that does not scale. We present a simple, complete, fault-tolerant, asynchronous extension to the (acyclic) cleanup protocol of the SSP Chains system. This extension is scalable, consumes few resources, and could easily be adapted to work in other reference-based distributed object systems - rendering them usable for very large-scale applications.

关键词： Computer systems programming

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