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Fast RMWs for TSO: Semantics and implementation 13

Fast RMWs for TSO: Semantics and Implementation

引用

acm sigplan conference on programming language design and implementation

作者： Bharghava Rajaram Vijay Nagarajan Susmit Sarkar Marco Elver University of Edinburgh University of St Andrews

ISBN: (纸本)9781450320146

Read-Modify-Write (RMW) instructions are widely used as the building blocks of a variety of higher level synchronization constructs, including locks, barriers, and lock-free data structures. Unfortunately, they are expensive in architectures such as x86 and SPARC which enforce (variants of) Total-Store-Order (TSO). A key reason is that RMWs in these architectures are ordered like a memory barrier, incurring the cost of a write-buffer drain in the critical path. Such strong ordering semantics are dictated by the requirements of the strict atomicity definition (type-1) that existing TSO RMWs use. Programmers often do not need such strong semantics. Besides, weakening the atomicity definition of TSO RMWs, would also weaken their ordering - thereby leading to more efficient hardware implementations. In this paper we argue for TSO RMWs to use weaker atomicity definitions - we consider two weaker definitions: type-2 and type-3, with different relaxed ordering differences. We formally specify how such weaker RMWs would be ordered, and show that type-2 RMWs, in particular, can seamlessly replace existing type-1 RMWs in common synchronization idioms - except in situations where a type-1 RMW is used as a memory barrier. Recent work has shown that the new C/C++11 concurrency model can be realized by generating conventional (type-1) RMWs for C/C++11 SC-atomic-writes and/or SC-atomic-reads. We formally prove that this is equally valid using the proposed type-2 RMWs; type-3 RMWs, on the other hand, could be used for SC-atomic-reads (and optionally SC-atomic-writes). We further propose efficient microarchitectural implementations for type-2 (type-3) RMWs - simulation results show that our implementation reduces the cost of an RMW by up to 58.9% (64.3%), which translates into an overall performance improvement of up to 9.0% (9.2%) on a set of parallel programs, including those from the SPLASH-2, PARSEC, and STAMP benchmarks.

关键词： Read-Modify-Write (RMW) Total-Store-Order (TSO) Atomics design Performance Experimentation

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CLAP: Recording Local Executions to Reproduce Concurrency Failures 13

CLAP: Recording Local Executions to Reproduce Concurrency Fa...

引用

acm sigplan conference on programming language design and implementation

作者： Jeff Huang Charles Zhang Julian Dolby Hong Kong University of Science and Technology IBM Thomas J. Watson Research Center

ISBN: (纸本)9781450320146

We present CLAP, a new technique to reproduce concurrency bugs. CLAP has two key steps. First, it logs thread local execution paths at runtime. Second, offline, it computes memory dependencies that accord with the logged execution and are able to reproduce the observed bug. The second step works by combining constraints from the thread paths and constraints based on a memory model, and computing an execution with a constraint solver. CLAP has four major advantages. First, logging purely local execution of each thread is substantially cheaper than logging memory interactions, which enables CLAP to be efficient compared to previous approaches. Second, our logging does not require any synchronization and hence with no added memory barriers or fences; this minimizes perturbation and missed bugs due to extra synchronizations foreclosing certain racy behaviors. Third, since it uses no synchronization, we extend CLAP to work on a range of relaxed memory models, such as TSO and PSO, in addition to sequential consistency. Fourth, CLAP can compute a much simpler execution than the original one, that reveals the bug with minimal thread context switches. To mitigate the scalability issues, we also present an approach to parallelize constraint solving, which theoretically scales our technique to programs with arbitrary execution length. Experimental results on a variety of multithreaded benchmarks and real world concurrent applications validate these advantages by showing that our technique is effective in reproducing concurrency bugs even under relaxed memory models; furthermore, it is significantly more efficient than a state-of-the-art technique that records shared memory dependencies, reducing execution time overhead by 45% and log size by 88% on average.

关键词： Concurrency Bug Reproduction Local Execution Constraint Solving Algorithms design Performance Theory

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Reagents: Expressing and Composing Fine-grained Concurrency 12

Reagents: Expressing and Composing Fine-grained Concurrency

引用

33rd acm sigplan conference on programming language design and implementation

作者： Turon, Aaron Northeastern Univ Boston MA 02115 USA

ISBN: (纸本)9781450312059

Efficient communication and synchronization is crucial for fine-grained parallelism. Libraries providing such features, while indispensable, are difficult to write, and often cannot be tailored or composed to meet the needs of specific users. We introduce reagents, a set of combinators for concisely expressing concurrency algorithms. Reagents scale as well as their hand-coded counterparts, while providing the composability existing libraries lack.

关键词： design Algorithms languages Performance fine-grained concurrency nonblocking algorithms monads arrows compositional concurrency

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Compiling a high-level language for GPUs: Via language support for architectures and compilers

Compiling a high-level language for GPUs: Via language suppo...

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33rd acm sigplan conference on programming language design and implementation, pldi'12

作者： Dubach, Christophe Cheng, Perry Rabbah, Rodric Bacon, David F. Fink, Stephen J. University of Edinburgh United Kingdom IBM Research United States

ISBN: (纸本)9781450312059

languages such as OpenCL and CUDA offer a standard interface for general-purpose programming of GPUs. However, with these languages, programmers must explicitly manage numerous lowlevel details involving communication and synchronization. This burden makes programming GPUs difficult and error-prone, rendering these powerful devices inaccessible to most programmers. We desire a higher-level programming model that makes GPUs more accessible while also effectively exploiting their computational power. This paper presents features of Lime, a new Javacompatible language targeting heterogeneous systems, that allow an optimizing compiler to generate high quality GPU code. The key insight is that the language type system enforces isolation and immutability invariants that allow the compiler to optimize for a GPU without heroic compiler analysis. Our compiler attains GPU speedups between 75% and 140% of the performance of native OpenCL code. Copyright © 2012 acm.

关键词： Lime

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language-Based Control and Mitigation of Timing Channels 12

Language-Based Control and Mitigation of Timing Channels

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33rd acm sigplan conference on programming language design and implementation

作者： Zhang, Danfeng Askarov, Aslan Myers, Andrew C. Cornell Univ Dept Comp Sci Ithaca NY 14853 USA Harvard Univ Sch Engn & Comp Sci Cambridge MA 02138 USA

ISBN: (纸本)9781450312059

We propose a new language-based approach to mitigating timing channels. In this language, well-typed programs provably leak only a bounded amount of information over time through external timing channels. By incorporating mechanisms for predictive mitigation of timing channels, this approach also permits a more expressive programming model. Timing channels arising from interaction with underlying hardware features such as instruction caches are controlled. Assumptions about the underlying hardware are explicitly formalized, supporting the design of hardware that efficiently controls timing channels. One such hardware design is modeled and used to show that timing channels can be controlled in some simple programs of real-world significance.

关键词： languages Security Timing channels mitigation information flow

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Synthesising Graphics Card Programs from DSLs 12

Synthesising Graphics Card Programs from DSLs

引用

33rd acm sigplan conference on programming language design and implementation

作者： Cartey, Luke Lyngsoe, Rune de Moor, Oege Univ Oxford Oxford OX1 2JD England

ISBN: (纸本)9781450312059

Over the last five years, graphics cards have become a tempting target for scientific computing, thanks to unrivaled peak performance, often producing a runtime speed-up of x10 to x25 over comparable CPU solutions. However, this increase can be difficult to achieve, and doing so often requires a fundamental rethink. This is especially problematic in scientific computing, where experts do not want to learn yet another architecture. In this paper we develop a method for automatically parallelising recursive functions of the sort found in scientific papers. Using a static analysis of the function dependencies we identify sets - partitions - of independent elements, which we use to synthesise an efficient GPU implementation using polyhedral code generation techniques. We then augment our language with DSL extensions to support a wider variety of applications, and demonstrate the effectiveness of this with three case studies, showing significant performance improvement over equivalent CPU methods, and similar efficiency to hand-tuned GPU implementations.

关键词： language Performance gpu scientific applications program synthesis dynamic programming

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Deterministic Parallelism via Liquid Effects 12

Deterministic Parallelism via Liquid Effects

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33rd acm sigplan conference on programming language design and implementation

作者： Kawaguchi, Ming Rondon, Patrick Bakst, Alexander Jhala, Ranjit Univ Calif San Diego San Diego CA 92103 USA

ISBN: (纸本)9781450312059

Shared memory multithreading is a popular approach to parallel programming, but also fiendishly hard to get right. We present Liquid Effects, a type-and-effect system based on refinement types which allows for fine-grained, low-level, shared memory multithreading while statically guaranteeing that a program is deterministic. Liquid Effects records the effect of an expression as a formula in first-order logic, making our type-and-effect system highly expressive. Further, effects like Read and Write are recorded in Liquid Effects as ordinary uninterpreted predicates, leaving the effect system open to extension by the user. By building our system as an extension to an existing dependent refinement type system, our system gains precise value- and branch-sensitive reasoning about effects. Finally, our system exploits the Liquid Types refinement type inference technique to automatically infer refinement types and effects. We have implemented our type-and-effect checking techniques in CSOLVE, a refinement type inference system for C programs. We demonstrate how CSOLVE uses Liquid Effects to prove the determinism of a variety of benchmarks.

关键词： languages Reliability Verification Liquid Types Type Inference Dependent Types C Safe Parallel programming Determinism

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Static Analysis and Compiler design for Idempotent Processing 12

Static Analysis and Compiler Design for Idempotent Processin...

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33rd acm sigplan conference on programming language design and implementation

作者： de Kruijf, Marc Sankaralingam, Karthikeyan Jha, Somesh Univ Wisconsin Madison WI 53706 USA

ISBN: (纸本)9781450312059

Recovery functionality has many applications in computing systems, from speculation recovery in modern microprocessors to fault recovery in high-reliability systems. Modern systems commonly recover using checkpoints. However, checkpoints introduce overheads, add complexity, and often save more state than necessary. This paper develops a novel compiler technique to recover program state without the overheads of explicit checkpoints. The technique breaks programs into idempotent regions-regions that can be freely re-executed-which allows recovery without checkpointed state. Leveraging the property of idempotence, recovery can be obtained by simple re-execution. We develop static analysis techniques to construct these regions and demonstrate low overheads and large region sizes for an LLVM-based implementation. Across a set of diverse benchmark suites, we construct idempotent regions close in size to those that could be obtained with perfect runtime information. Although the resulting code runs more slowly, typical performance overheads are in the range of just 2-12%. The paradigm of executing entire programs as a series of idempotent regions we call idempotent processing, and it has many applications in computer systems. As a concrete example, we demonstrate it applied to the problem of compiler-automated hardware fault recovery. In comparison to two other state-of-the-art techniques, redundant execution and checkpoint-logging, our idempotent processing technique outperforms both by over 15%.

关键词： Algorithms design Performance Reliability Idempotent processing idempotent regions

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design and implementation of Sparse Global Analyses for C-like languages 12

Design and Implementation of Sparse Global Analyses for C-li...

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33rd acm sigplan conference on programming language design and implementation

作者： Oh, Hakjoo Heo, Kihong Lee, Wonchan Lee, Woosuk Yi, Kwangkeun Seoul Natl Univ Seoul 151 South Korea

ISBN: (纸本)9781450312059

In this article we present a general method for achieving global static analyzers that are precise, sound, yet also scalable. Our method generalizes the sparse analysis techniques on top of the abstract interpretation framework to support relational as well as non-relational semantics properties for C-like languages. We first use the abstract interpretation framework to have a global static analyzer whose scalability is unattended. Upon this underlying sound static analyzer, we add our generalized sparse analysis techniques to improve its scalability while preserving the precision of the underlying analysis. Our framework determines what to prove to guarantee that the resulting sparse version should preserve the precision of the underlying analyzer. We formally present our framework;we present that existing sparse analyses are all restricted instances of our framework;we show more semantically elaborate design examples of sparse non-relational and relational static analyses;we present their implementation results that scale to analyze up to one million lines of C programs. We also show a set of implementation techniques that turn out to be critical to economically support the sparse analysis process.

关键词： Static analysis abstract interpretation sparse analysis

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Speculative Separation for Privatization and Reductions 12

Speculative Separation for Privatization and Reductions

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33rd acm sigplan conference on programming language design and implementation

作者： Johnson, Nick P. Kim, Hanjun Prabhu, Prakash Zaks, Ayal August, David I. Princeton Univ Princeton NJ 08544 USA Intel Corp Haifa Israel

ISBN: (纸本)9781450312059

Automatic parallelization is a promising strategy to improve application performance in the multicore era. However, common programming practices such as the reuse of data structures introduce artificial constraints that obstruct automatic parallelization. Privatization relieves these constraints by replicating data structures, thus enabling scalable parallelization. Prior privatization schemes are limited to arrays and scalar variables because they are sensitive to the layout of dynamic data structures. This work presents Privateer, the first fully automatic privatization system to handle dynamic and recursive data structures, even in languages with unrestricted pointers. To reduce sensitivity to memory layout, Privateer speculatively separates memory objects. Privateer's lightweight runtime system validates speculative separation and speculative privatization to ensure correct parallel execution. Privateer enables automatic parallelization of general-purpose C/C++ applications, yielding a geomean whole-program speedup of 11.4x over best sequential execution on 24 cores, while non-speculative parallelization yields only 0.93x.

关键词： languages Performance design Experimentation Automatic parallelization Separation Speculation

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