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检索条件"任意字段=2011 4th International Symposium on Parallel Architectures, Algorithms and Programming, PAAP 2011"

共 29 条记录，以下是21-30 订阅

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Message from the program co-chairs paap 2011

Proceedings - 2011 4th International Symposium on Parallel A...

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Proceedings - 2011 4th international symposium on parallel architectures, algorithms and programming, paap 2011 2011年 12-12页

作者： Wu, Jigang Srikanthan, thambipillai

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Message from the general co-chair paap 2011

Proceedings - 2011 4th International Symposium on Parallel A...

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Proceedings - 2011 4th international symposium on parallel architectures, algorithms and programming, paap 2011 2011年 11-11页

作者： Shen, Hong

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algorithms and architectures for parallel Processing 1

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丛书名： Lecture Notes in Computer Science

1000年

作者： Yang Xiang Wanlei Zhou Alfredo Cuzzocrea Michael Hobbs

ISBN: (数字)9783642246692

ISBN: (纸本)9783642246685

this two volume set LNCS 7016 and LNCS 7017 constitutes the refereed proceedings of the 11th international Conference on algorithms and architectures for parallel Processing, ICA3PP 2011, held in Melbourne, Australia, in October 2011. the second volume includes 37 papers from one symposium and three workshops held together with ICA3PP 2011 main conference. these are 16 papers from the 2011 international symposium on Advances of Distributed Computing and Networking (ADCN 2011), 10 papers of the 4th IEEE international Workshop on Internet and Distributed Computing Systems (IDCS 2011), 7 papers belonging to the III international Workshop on Multicore and Multithreaded architectures and algorithms (M2A2 2011), as well as 4 papers of the 1st IEEE international Workshop on parallel architectures for Bioinformatics Systems (HardBio 2011).

关键词： Algorithm Analysis and Problem Complexity Artificial Intelligence Software Engineering Information Systems Applications (incl. Internet) Computer Communication Networks Management of Computing and Information Systems

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programming Real-time Autofocus on a Massively parallel Reconfigurable Architecture using Occam-pi

Programming Real-time Autofocus on a Massively Parallel Reco...

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IEEE 19th Annual international symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Zain-ul-Abdin Ahlander, Anders Svensson, Bertil Halmstad Univ Ctr Res Embedded Syst Halmstad Sweden Saab Grp Business Area Elect Def Syst Gothenburg Sweden

ISBN: (纸本)9780769543017

Recently we proposed occam-pi as a high-level language for programming massively parallel reconfigurable architectures. the design of occam-pi incorporates ideas from CSP and pi-calculus to facilitate expressing parallelism and reconfigurability. the feasability of this approach was illustrated by building three occam-pi implementations of DCT executing on an Ambric. However, because DCT is a simple and well-studied algorithm it remained uncertain whether occam-pi would also be effective for programming novel, more complex algorithms. In this paper, we demonstrate the applicability of occam-pi for expressing various degrees of parallelism by implementing a significantly large case-study of focus criterion calculation in an autofocus algorithm on the Ambric architecture. Autofocus is a key component of synthetic aperture radar systems. Two implementations of focus criterion calculation were developed and evaluated on the basis of performance. the comparison of the performance results with a single threaded software implementation of the same algorithm show that the throughput of the two implementations are 11x and 23x higher than the sequential implementation despite a much lower (9x) clock frequency. the two designs are, respectively, 29x and 40x more energy efficient.

关键词： Ambric architecture CSP Computer architecture Concurrent programming models DCT Hardware Interpolation Mobile communication parallel processing Pixel Reconfigurable Arcitectures Semantics high level languages high-level language massively parallel reconfigurable architecture occam-pi parallel architectures pi-calculus real-time autofocus reconfigurable architectures single threaded software implementation synthetic aperture radar systems

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4th international Workshop on Network on Chip architectures, NoCArc 2011 - In Conjunction with the 44th Annual IEEE/ACM international symposium on Microarchitecture, MICRO-44

4th International Workshop on Network on Chip Architectures,...

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4th international Workshop on Network on Chip architectures, NoCArc 2011, in Conjunction with the 44th Annual IEEE/ACM international symposium on Microarchitecture, MICRO44

ISBN: (纸本)9781450309479

the proceedings contain 10 papers. the topics discussed include: floodgate: application-driven flow control in network-on-chip for manycore architectures;ROBUST: a new self-healing fault-tolerant NoC router;B2RAC: a physical express link addition methodology for network on chip;BOFAR: buffer occupancy factor based adaptive router for mesh NoCs;floor-planning-aware design space exploration for application-specific hierarchical networks-on-chip;contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study;selecting the optimal system: automated design of application-specific systems-on-chip;partitioning and mapping on NoC-based MPSoC: an energy consumption saving approach;enhancing the security of time-division-multiplexing networks-on-chip through the use of multipath routing;and dynamic clustering for distinct parallel programming models on NoC-based MPSoCs.

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Dynamic clustering for distinct parallel programming models on NoC-based MPSoCs

Dynamic clustering for distinct parallel programming models ...

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4th international Workshop on Network on Chip architectures, NoCArc 2011, in Conjunction with the 44th Annual IEEE/ACM international symposium on Microarchitecture, MICRO44

作者： Girão, Gustavo Santini, thiago Wagner, Flávio R. Federal University of Rio Grande Do Sul Institute of Informatics Porto Alegre Brazil

ISBN: (纸本)9781450309479

this paper investigates the impact of dynamic clustering and the use of hardware support for distinct parallel programming models in an NoC-based MPSoC environment. Using a dynamically adaptable hardware, the platform provides clusters that implement either a shared memory organization or a distributed memory organization in order to meet applications' requirements without any computational overhead. the entire process is completely transparent for the programmer. In addition, a scheduler is used to take advantage of changes on the degree of parallelism of an application to improve workload balancing. Experimental results show that dynamic clustering can improve performance up to 77% (54% in average) and can provide energy savings up to 58% (42% in average). © 2011 ACM.

关键词： Network-on-chip

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parallel ripple search - Scalable and efficient pathfinding for multi-core architectures

Parallel ripple search - Scalable and efficient pathfinding ...

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4th international Conference on Motion in Games, MIG 2011

作者： Brand, Sandy Bidarra, Rafael Delft University of Technology Mekelweg 4 2628 CD Delft Netherlands

ISBN: (纸本)9783642250897

Game developers are often faced with very demanding requirements on huge numbers of agents moving naturally through increasingly large and detailed virtual worlds. With the advent of multi-core architectures, new approaches to accelerate expensive pathfinding operations are worth being investigated. Traditional single-processor pathfinding strategies, such as A*and its derivatives, have been long praised for their flexibility. We implemented several parallel versions of such algorithms to analyze their intrinsic behavior, concluding that they either have a large overhead, yield far from optimal paths, do not scale up to many cores, or are cache unfriendly. In this paper we propose parallel Ripple Search, a novel parallel pathfinding algorithm that largely solves these limitations. It utilizes a high-level graph to assign local search areas to CPU cores at 'equidistant' intervals. these cores then use A*flooding behavior to expand towards each other, yielding good 'guesstimate points' at border touch on. the process does not rely on expensive parallel programming synchronization locks, but instead relies on the opportunistic use of node collisions among cooperating cores, exploiting the multi-core's shared memory architecture. As a result, all cores effectively run at full speed until enough way-points are found. We show that this approach is a fast, practical and scalable solution, and that it flexibly handles dynamic obstacles in a natural way. © 2011 Springer-Verlag.

关键词： parallel programming

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parallelizing methods analysis for solving large sparse power network equations on multi-core processor platforms

Parallelizing methods analysis for solving large sparse powe...

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international Conference on Intelligent Computation Technology and Automation

作者： Jia-An, Zhang Na, Zhang Yi-Lang, Jiang School of Electrical Engineering and Automation Tianjin University Tianjin 300072 China

ISBN: (纸本)9780769543536

the solution of large sparse network equations is a recurrent problem in almost every algorithm of power system simulation, which is widely used in offline analysis, online stability assessment and control. Nowadays, processor architectures are moving toward the integration of more cores on one chip, whilst traditional serial and parallel software can not fully exploit the performance of multi-core processors. the paper discusses the parallelizing methods for solving large sparse network equations on multi-core processor platforms. the available and feasible parallelizing algorithms such as W-matrix method and BBDF method are investigated. Implicit and explicit parallelization strategies are studied. the parallelizing complexity and computation efficiency are analyzed as well. Refactoring software code to parallel code is a significant ongoing topic of research not only for PCs but also for parallel systems. © 2011 IEEE.

关键词： parallel programming

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TMbox: A Flexible and Reconfigurable 16-core Hybrid Transactional Memory System

TMbox: A Flexible and Reconfigurable 16-core Hybrid Transact...

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IEEE 19th Annual international symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Sonmez, Nehir Arcas, Oriol Pflucker, Otto Unsal, Osman S. Cristal, Adrian Hur, Ibrahim Singh, Satnam Valero, Mateo Barcelona Supercomp Ctr Barcelona Spain Univ Politecn Cataluna E-08028 Barcelona Spain CSIC Spanish Natl Res Council Madrid Spain Microsoft Res Cambridge Cambridge England

ISBN: (纸本)9780769543017

In this paper we present the design and implementation of TMbox: An MPSoC built to explore trade-offs in multicore design space and to evaluate parallel programming proposals such as Transactional Memory (TM). Our flexible system, comprised of MIPS R3000-compatible cores is easily modifiable to study different architecture, library and operating system extensions. For this paper we evaluate a 16-core Hybrid Transactional Memory implementation based on the TinySTM-ASF proposal on a Virtex-5 FPGA and we accelerate three benchmarks written to investigate TM.

关键词： Field programmable gate arrays Hardware MIPS R3000-compatible core MPSoC Multicore processing Proposals Registers Software TMbox TinySTM-ASF Virtex-5 FPGA electronic engineering computing field programmable gate arrays flexible 16-core hybrid transactional memory system flexible system logic design multicore design space multicore prototyping multiprocessing systems parallel programming parallel programming reconfigurable 16-core hybrid transactional memory system reconfigurable architectures reconfigurable computing system-on-chip transactional memory

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